STM32L4xx_HAL_Driver  1.14.0
Functions
AHB3
STM32L4xx_LL_Driver » BUS » BUS Exported Functions

Functions

__STATIC_INLINE void LL_AHB3_GRP1_EnableClock (uint32_t Periphs)
 Enable AHB3 peripherals clock. AHB3ENR FMCEN LL_AHB3_GRP1_EnableClock
AHB3ENR QSPIEN LL_AHB3_GRP1_EnableClock
AHB3ENR OSPI1EN LL_AHB3_GRP1_EnableClock
AHB3ENR OSPI2EN LL_AHB3_GRP1_EnableClock. More...
 
__STATIC_INLINE uint32_t LL_AHB3_GRP1_IsEnabledClock (uint32_t Periphs)
 Check if AHB3 peripheral clock is enabled or not AHB3ENR FMCEN LL_AHB3_GRP1_IsEnabledClock
AHB3ENR QSPIEN LL_AHB3_GRP1_IsEnabledClock
AHB3ENR OSPI1EN LL_AHB3_GRP1_IsEnabledClock
AHB3ENR OSPI2EN LL_AHB3_GRP1_IsEnabledClock. More...
 
__STATIC_INLINE void LL_AHB3_GRP1_DisableClock (uint32_t Periphs)
 Disable AHB3 peripherals clock. AHB3ENR FMCEN LL_AHB3_GRP1_DisableClock
AHB3ENR QSPIEN LL_AHB3_GRP1_DisableClock
AHB3ENR OSPI1EN LL_AHB3_GRP1_DisableClock
AHB3ENR OSPI2EN LL_AHB3_GRP1_DisableClock. More...
 
__STATIC_INLINE void LL_AHB3_GRP1_ForceReset (uint32_t Periphs)
 Force AHB3 peripherals reset. AHB3RSTR FMCRST LL_AHB3_GRP1_ForceReset
AHB3RSTR QSPIRST LL_AHB3_GRP1_ForceReset
AHB3RSTR OSPI1RST LL_AHB3_GRP1_ForceReset
AHB3RSTR OSPI2RST LL_AHB3_GRP1_ForceReset. More...
 
__STATIC_INLINE void LL_AHB3_GRP1_ReleaseReset (uint32_t Periphs)
 Release AHB3 peripherals reset. AHB3RSTR FMCRST LL_AHB3_GRP1_ReleaseReset
AHB3RSTR QSPIRST LL_AHB3_GRP1_ReleaseReset
AHB3RSTR OSPI1RST LL_AHB3_GRP1_ReleaseReset
AHB3RSTR OSPI2RST LL_AHB3_GRP1_ReleaseReset. More...
 
__STATIC_INLINE void LL_AHB3_GRP1_EnableClockStopSleep (uint32_t Periphs)
 Enable AHB3 peripheral clocks in Sleep and Stop modes AHB3SMENR FMCSMEN LL_AHB3_GRP1_EnableClockStopSleep
AHB3SMENR QSPISMEN LL_AHB3_GRP1_EnableClockStopSleep
AHB3SMENR OSPI1SMEN LL_AHB3_GRP1_EnableClockStopSleep
AHB3SMENR OSPI2SMEN LL_AHB3_GRP1_EnableClockStopSleep. More...
 
__STATIC_INLINE void LL_AHB3_GRP1_DisableClockStopSleep (uint32_t Periphs)
 Disable AHB3 peripheral clocks in Sleep and Stop modes AHB3SMENR FMCSMEN LL_AHB3_GRP1_DisableClockStopSleep
AHB3SMENR QSPISMEN LL_AHB3_GRP1_DisableClockStopSleep
AHB3SMENR OSPI1SMEN LL_AHB3_GRP1_DisableClockStopSleep
AHB3SMENR OSPI2SMEN LL_AHB3_GRP1_DisableClockStopSleep
. More...
 

Detailed Description

Function Documentation

◆ LL_AHB3_GRP1_DisableClock()

__STATIC_INLINE void LL_AHB3_GRP1_DisableClock ( uint32_t  Periphs)

Disable AHB3 peripherals clock. AHB3ENR FMCEN LL_AHB3_GRP1_DisableClock
AHB3ENR QSPIEN LL_AHB3_GRP1_DisableClock
AHB3ENR OSPI1EN LL_AHB3_GRP1_DisableClock
AHB3ENR OSPI2EN LL_AHB3_GRP1_DisableClock.

Parameters
PeriphsThis parameter can be a combination of the following values:
  • LL_AHB3_GRP1_PERIPH_FMC (*)
  • LL_AHB3_GRP1_PERIPH_QSPI (*)
  • LL_AHB3_GRP1_PERIPH_OSPI1 (*)
  • LL_AHB3_GRP1_PERIPH_OSPI2 (*)
(*) value not defined in all devices.
Return values
None

Definition at line 928 of file stm32l4xx_ll_bus.h.

929 {
930  CLEAR_BIT(RCC->AHB3ENR, Periphs);
931 }
CLEAR_BIT
CLEAR_BIT(hrtc->Instance->CR, RTC_CR_WUTE)

◆ LL_AHB3_GRP1_DisableClockStopSleep()

__STATIC_INLINE void LL_AHB3_GRP1_DisableClockStopSleep ( uint32_t  Periphs)

Disable AHB3 peripheral clocks in Sleep and Stop modes AHB3SMENR FMCSMEN LL_AHB3_GRP1_DisableClockStopSleep
AHB3SMENR QSPISMEN LL_AHB3_GRP1_DisableClockStopSleep
AHB3SMENR OSPI1SMEN LL_AHB3_GRP1_DisableClockStopSleep
AHB3SMENR OSPI2SMEN LL_AHB3_GRP1_DisableClockStopSleep
.

Parameters
PeriphsThis parameter can be a combination of the following values:
  • LL_AHB3_GRP1_PERIPH_FMC (*)
  • LL_AHB3_GRP1_PERIPH_QSPI (*)
  • LL_AHB3_GRP1_PERIPH_OSPI1 (*)
  • LL_AHB3_GRP1_PERIPH_OSPI2 (*)
(*) value not defined in all devices.
Return values
None

Definition at line 1014 of file stm32l4xx_ll_bus.h.

1015 {
1016  CLEAR_BIT(RCC->AHB3SMENR, Periphs);
1017 }
CLEAR_BIT
CLEAR_BIT(hrtc->Instance->CR, RTC_CR_WUTE)

◆ LL_AHB3_GRP1_EnableClock()

__STATIC_INLINE void LL_AHB3_GRP1_EnableClock ( uint32_t  Periphs)

Enable AHB3 peripherals clock. AHB3ENR FMCEN LL_AHB3_GRP1_EnableClock
AHB3ENR QSPIEN LL_AHB3_GRP1_EnableClock
AHB3ENR OSPI1EN LL_AHB3_GRP1_EnableClock
AHB3ENR OSPI2EN LL_AHB3_GRP1_EnableClock.

Parameters
PeriphsThis parameter can be a combination of the following values:
  • LL_AHB3_GRP1_PERIPH_FMC (*)
  • LL_AHB3_GRP1_PERIPH_QSPI (*)
  • LL_AHB3_GRP1_PERIPH_OSPI1 (*)
  • LL_AHB3_GRP1_PERIPH_OSPI2 (*)
(*) value not defined in all devices.
Return values
None

Definition at line 884 of file stm32l4xx_ll_bus.h.

885 {
886  __IO uint32_t tmpreg;
887  SET_BIT(RCC->AHB3ENR, Periphs);
888  /* Delay after an RCC peripheral clock enabling */
889  tmpreg = READ_BIT(RCC->AHB3ENR, Periphs);
890  (void)tmpreg;
891 }

◆ LL_AHB3_GRP1_EnableClockStopSleep()

__STATIC_INLINE void LL_AHB3_GRP1_EnableClockStopSleep ( uint32_t  Periphs)

Enable AHB3 peripheral clocks in Sleep and Stop modes AHB3SMENR FMCSMEN LL_AHB3_GRP1_EnableClockStopSleep
AHB3SMENR QSPISMEN LL_AHB3_GRP1_EnableClockStopSleep
AHB3SMENR OSPI1SMEN LL_AHB3_GRP1_EnableClockStopSleep
AHB3SMENR OSPI2SMEN LL_AHB3_GRP1_EnableClockStopSleep.

Parameters
PeriphsThis parameter can be a combination of the following values:
  • LL_AHB3_GRP1_PERIPH_FMC (*)
  • LL_AHB3_GRP1_PERIPH_QSPI (*)
  • LL_AHB3_GRP1_PERIPH_OSPI1 (*)
  • LL_AHB3_GRP1_PERIPH_OSPI2 (*)
(*) value not defined in all devices.
Return values
None

Definition at line 990 of file stm32l4xx_ll_bus.h.

991 {
992  __IO uint32_t tmpreg;
993  SET_BIT(RCC->AHB3SMENR, Periphs);
994  /* Delay after an RCC peripheral clock enabling */
995  tmpreg = READ_BIT(RCC->AHB3SMENR, Periphs);
996  (void)tmpreg;
997 }

◆ LL_AHB3_GRP1_ForceReset()

__STATIC_INLINE void LL_AHB3_GRP1_ForceReset ( uint32_t  Periphs)

Force AHB3 peripherals reset. AHB3RSTR FMCRST LL_AHB3_GRP1_ForceReset
AHB3RSTR QSPIRST LL_AHB3_GRP1_ForceReset
AHB3RSTR OSPI1RST LL_AHB3_GRP1_ForceReset
AHB3RSTR OSPI2RST LL_AHB3_GRP1_ForceReset.

Parameters
PeriphsThis parameter can be a combination of the following values:
  • LL_AHB3_GRP1_PERIPH_ALL
  • LL_AHB3_GRP1_PERIPH_FMC (*)
  • LL_AHB3_GRP1_PERIPH_QSPI (*)
  • LL_AHB3_GRP1_PERIPH_OSPI1 (*)
  • LL_AHB3_GRP1_PERIPH_OSPI2 (*)
(*) value not defined in all devices.
Return values
None

Definition at line 949 of file stm32l4xx_ll_bus.h.

950 {
951  SET_BIT(RCC->AHB3RSTR, Periphs);
952 }

◆ LL_AHB3_GRP1_IsEnabledClock()

__STATIC_INLINE uint32_t LL_AHB3_GRP1_IsEnabledClock ( uint32_t  Periphs)

Check if AHB3 peripheral clock is enabled or not AHB3ENR FMCEN LL_AHB3_GRP1_IsEnabledClock
AHB3ENR QSPIEN LL_AHB3_GRP1_IsEnabledClock
AHB3ENR OSPI1EN LL_AHB3_GRP1_IsEnabledClock
AHB3ENR OSPI2EN LL_AHB3_GRP1_IsEnabledClock.

Parameters
PeriphsThis parameter can be a combination of the following values:
  • LL_AHB3_GRP1_PERIPH_FMC (*)
  • LL_AHB3_GRP1_PERIPH_QSPI (*)
  • LL_AHB3_GRP1_PERIPH_OSPI1 (*)
  • LL_AHB3_GRP1_PERIPH_OSPI2 (*)
(*) value not defined in all devices.
Return values
Stateof Periphs (1 or 0).

Definition at line 908 of file stm32l4xx_ll_bus.h.

909 {
910  return ((READ_BIT(RCC->AHB3ENR, Periphs) == Periphs) ? 1UL : 0UL);
911 }

◆ LL_AHB3_GRP1_ReleaseReset()

__STATIC_INLINE void LL_AHB3_GRP1_ReleaseReset ( uint32_t  Periphs)

Release AHB3 peripherals reset. AHB3RSTR FMCRST LL_AHB3_GRP1_ReleaseReset
AHB3RSTR QSPIRST LL_AHB3_GRP1_ReleaseReset
AHB3RSTR OSPI1RST LL_AHB3_GRP1_ReleaseReset
AHB3RSTR OSPI2RST LL_AHB3_GRP1_ReleaseReset.

Parameters
PeriphsThis parameter can be a combination of the following values:
  • LL_AHB2_GRP1_PERIPH_ALL
  • LL_AHB3_GRP1_PERIPH_FMC (*)
  • LL_AHB3_GRP1_PERIPH_QSPI (*)
  • LL_AHB3_GRP1_PERIPH_OSPI1 (*)
  • LL_AHB3_GRP1_PERIPH_OSPI2 (*)
(*) value not defined in all devices.
Return values
None

Definition at line 970 of file stm32l4xx_ll_bus.h.

971 {
972  CLEAR_BIT(RCC->AHB3RSTR, Periphs);
973 }
CLEAR_BIT
CLEAR_BIT(hrtc->Instance->CR, RTC_CR_WUTE)