Peripheral Control functions

Cortex control functions. More...

Functions
uint32_t	HAL_NVIC_GetPriorityGrouping (void)
	Get the priority grouping field from the NVIC Interrupt Controller. More...
void	HAL_NVIC_GetPriority (IRQn_Type IRQn, uint32_t PriorityGroup, uint32_t *pPreemptPriority, uint32_t *pSubPriority)
	Get the priority of an interrupt. More...
uint32_t	HAL_NVIC_GetPendingIRQ (IRQn_Type IRQn)
	Get Pending Interrupt (read the pending register in the NVIC and return the pending bit for the specified interrupt). More...
void	HAL_NVIC_SetPendingIRQ (IRQn_Type IRQn)
	Set Pending bit of an external interrupt. More...
void	HAL_NVIC_ClearPendingIRQ (IRQn_Type IRQn)
	Clear the pending bit of an external interrupt. More...
uint32_t	HAL_NVIC_GetActive (IRQn_Type IRQn)
	Get active interrupt (read the active register in NVIC and return the active bit). More...
void	HAL_SYSTICK_CLKSourceConfig (uint32_t CLKSource)
	Configure the SysTick clock source. More...
void	HAL_SYSTICK_IRQHandler (void)
	Handle SYSTICK interrupt request. More...
void	HAL_SYSTICK_Callback (void)
	SYSTICK callback. More...
void	HAL_MPU_Enable (uint32_t MPU_Control)
	Enable the MPU. More...
void	HAL_MPU_Disable (void)
	Disable the MPU. More...
void	HAL_MPU_ConfigRegion (MPU_Region_InitTypeDef *MPU_Init)
	Initialize and configure the Region and the memory to be protected. More...

Detailed Description

Cortex control functions.

  ==============================================================================
                      ##### Peripheral Control functions #####
  ==============================================================================
    [..]
      This subsection provides a set of functions allowing to control the CORTEX
      (NVIC, SYSTICK, MPU) functionalities.

Function Documentation

HAL_MPU_ConfigRegion()

void HAL_MPU_ConfigRegion

(

MPU_Region_InitTypeDef *

MPU_Init

)

Initialize and configure the Region and the memory to be protected.

Parameters

MPU_Init

Pointer to a MPU_Region_InitTypeDef structure that contains the initialization and configuration information.

Return values

None

Definition at line 466 of file stm32l4xx_hal_cortex.c.

{
  /* Check the parameters */
  assert_param(IS_MPU_REGION_NUMBER(MPU_Init->Number));
  assert_param(IS_MPU_REGION_ENABLE(MPU_Init->Enable));

  /* Set the Region number */
  MPU->RNR = MPU_Init->Number;

  if ((MPU_Init->Enable) != RESET)
  {
    /* Check the parameters */
    assert_param(IS_MPU_INSTRUCTION_ACCESS(MPU_Init->DisableExec));
    assert_param(IS_MPU_REGION_PERMISSION_ATTRIBUTE(MPU_Init->AccessPermission));
    assert_param(IS_MPU_TEX_LEVEL(MPU_Init->TypeExtField));
    assert_param(IS_MPU_ACCESS_SHAREABLE(MPU_Init->IsShareable));
    assert_param(IS_MPU_ACCESS_CACHEABLE(MPU_Init->IsCacheable));
    assert_param(IS_MPU_ACCESS_BUFFERABLE(MPU_Init->IsBufferable));
    assert_param(IS_MPU_SUB_REGION_DISABLE(MPU_Init->SubRegionDisable));
    assert_param(IS_MPU_REGION_SIZE(MPU_Init->Size));

    MPU->RBAR = MPU_Init->BaseAddress;
    MPU->RASR = ((uint32_t)MPU_Init->DisableExec        << MPU_RASR_XN_Pos)   |
                ((uint32_t)MPU_Init->AccessPermission   << MPU_RASR_AP_Pos)   |
                ((uint32_t)MPU_Init->TypeExtField       << MPU_RASR_TEX_Pos)  |
                ((uint32_t)MPU_Init->IsShareable        << MPU_RASR_S_Pos)    |
                ((uint32_t)MPU_Init->IsCacheable        << MPU_RASR_C_Pos)    |
                ((uint32_t)MPU_Init->IsBufferable       << MPU_RASR_B_Pos)    |
                ((uint32_t)MPU_Init->SubRegionDisable   << MPU_RASR_SRD_Pos)  |
                ((uint32_t)MPU_Init->Size               << MPU_RASR_SIZE_Pos) |
                ((uint32_t)MPU_Init->Enable             << MPU_RASR_ENABLE_Pos);
  }
  else
  {
    MPU->RBAR = 0x00;
    MPU->RASR = 0x00;
  }
}

HAL_MPU_Disable()

void HAL_MPU_Disable

(

void

)

Disable the MPU.

Return values

None

Definition at line 424 of file stm32l4xx_hal_cortex.c.

{
  /* Make sure outstanding transfers are done */
  __DMB();

  /* Disable fault exceptions */
  SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;

  /* Disable the MPU and clear the control register*/
  MPU->CTRL = 0U;
}

HAL_MPU_Enable()

void HAL_MPU_Enable

(

uint32_t

MPU_Control

)

Enable the MPU.

Parameters

MPU_Control

Specifies the control mode of the MPU during hard fault, NMI, FAULTMASK and privileged accessto the default memory This parameter can be one of the following values: MPU_HFNMI_PRIVDEF_NONE MPU_HARDFAULT_NMI MPU_PRIVILEGED_DEFAULT MPU_HFNMI_PRIVDEF

Return values

None

Definition at line 447 of file stm32l4xx_hal_cortex.c.

{
  /* Enable the MPU */
  MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;

  /* Enable fault exceptions */
  SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;

  /* Ensure MPU settings take effects */
  __DSB();
  __ISB();
}

HAL_NVIC_ClearPendingIRQ()

void HAL_NVIC_ClearPendingIRQ

(

IRQn_Type

IRQn

)

Clear the pending bit of an external interrupt.

Parameters

IRQn	External interrupt number. This parameter can be an enumerator of IRQn_Type enumeration (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h))

Return values

None

Definition at line 354 of file stm32l4xx_hal_cortex.c.

{
  /* Check the parameters */
  assert_param(IS_NVIC_DEVICE_IRQ(IRQn));

  /* Clear pending interrupt */
  NVIC_ClearPendingIRQ(IRQn);
}

HAL_NVIC_GetActive()

uint32_t HAL_NVIC_GetActive

(

IRQn_Type

IRQn

)

Get active interrupt (read the active register in NVIC and return the active bit).

Parameters

IRQn	External interrupt number This parameter can be an enumerator of IRQn_Type enumeration (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h))

Return values

status

- 0 Interrupt status is not pending. 1 Interrupt status is pending.

Definition at line 371 of file stm32l4xx_hal_cortex.c.

{
  /* Return 1 if active else 0 */
  return NVIC_GetActive(IRQn);
}

HAL_NVIC_GetPendingIRQ()

uint32_t HAL_NVIC_GetPendingIRQ

(

IRQn_Type

IRQn

)

Get Pending Interrupt (read the pending register in the NVIC and return the pending bit for the specified interrupt).

Parameters

IRQn	External interrupt number. This parameter can be an enumerator of IRQn_Type enumeration (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h))

Return values

status

- 0 Interrupt status is not pending. 1 Interrupt status is pending.

Definition at line 338 of file stm32l4xx_hal_cortex.c.

{
  /* Check the parameters */
  assert_param(IS_NVIC_DEVICE_IRQ(IRQn));

  /* Return 1 if pending else 0 */
  return NVIC_GetPendingIRQ(IRQn);
}

HAL_NVIC_GetPriority()

void HAL_NVIC_GetPriority	(	IRQn_Type	IRQn,
		uint32_t	PriorityGroup,
		uint32_t *	pPreemptPriority,
		uint32_t *	pSubPriority
	)

Get the priority of an interrupt.

Parameters

IRQn	External interrupt number. This parameter can be an enumerator of IRQn_Type enumeration (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h))
PriorityGroup	the priority grouping bits length. This parameter can be one of the following values: NVIC_PRIORITYGROUP_0: 0 bit for pre-emption priority, 4 bits for subpriority NVIC_PRIORITYGROUP_1: 1 bit for pre-emption priority, 3 bits for subpriority NVIC_PRIORITYGROUP_2: 2 bits for pre-emption priority, 2 bits for subpriority NVIC_PRIORITYGROUP_3: 3 bits for pre-emption priority, 1 bit for subpriority NVIC_PRIORITYGROUP_4: 4 bits for pre-emption priority, 0 bit for subpriority
pPreemptPriority	Pointer on the Preemptive priority value (starting from 0).
pSubPriority	Pointer on the Subpriority value (starting from 0).

Return values

None

Definition at line 305 of file stm32l4xx_hal_cortex.c.

{
  /* Check the parameters */
  assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
 /* Get priority for Cortex-M system or device specific interrupts */
  NVIC_DecodePriority(NVIC_GetPriority(IRQn), PriorityGroup, pPreemptPriority, pSubPriority);
}

HAL_NVIC_GetPriorityGrouping()

uint32_t HAL_NVIC_GetPriorityGrouping

(

void

)

Get the priority grouping field from the NVIC Interrupt Controller.

Return values

Priority

grouping field (SCB->AIRCR [10:8] PRIGROUP field)

Definition at line 278 of file stm32l4xx_hal_cortex.c.

{
  /* Get the PRIGROUP[10:8] field value */
  return NVIC_GetPriorityGrouping();
}

HAL_NVIC_SetPendingIRQ()

void HAL_NVIC_SetPendingIRQ

(

IRQn_Type

IRQn

)

Set Pending bit of an external interrupt.

Parameters

IRQn	External interrupt number This parameter can be an enumerator of IRQn_Type enumeration (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h))

Return values

None

Definition at line 320 of file stm32l4xx_hal_cortex.c.

{
  /* Check the parameters */
  assert_param(IS_NVIC_DEVICE_IRQ(IRQn));

  /* Set interrupt pending */
  NVIC_SetPendingIRQ(IRQn);
}

HAL_SYSTICK_Callback()

__weak void HAL_SYSTICK_Callback

(

void

)

SYSTICK callback.

Return values

None

Definition at line 412 of file stm32l4xx_hal_cortex.c.

{
  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_SYSTICK_Callback could be implemented in the user file
   */
}

HAL_SYSTICK_CLKSourceConfig()

void HAL_SYSTICK_CLKSourceConfig

(

uint32_t

CLKSource

)

Configure the SysTick clock source.

Parameters

CLKSource

specifies the SysTick clock source. This parameter can be one of the following values: SYSTICK_CLKSOURCE_HCLK_DIV8: AHB clock divided by 8 selected as SysTick clock source. SYSTICK_CLKSOURCE_HCLK: AHB clock selected as SysTick clock source.

Return values

None

Definition at line 385 of file stm32l4xx_hal_cortex.c.

{
  /* Check the parameters */
  assert_param(IS_SYSTICK_CLK_SOURCE(CLKSource));
  if (CLKSource == SYSTICK_CLKSOURCE_HCLK)
  {
    SysTick->CTRL |= SYSTICK_CLKSOURCE_HCLK;
  }
  else
  {
    SysTick->CTRL &= ~SYSTICK_CLKSOURCE_HCLK;
  }
}

HAL_SYSTICK_IRQHandler()

void HAL_SYSTICK_IRQHandler

(

void

)

Handle SYSTICK interrupt request.

Return values

None

Definition at line 403 of file stm32l4xx_hal_cortex.c.

{
  HAL_SYSTICK_Callback();
}