Peripheral Control functions. More...

Functions
uint32_t	HAL_DAC_GetValue (DAC_HandleTypeDef *hdac, uint32_t Channel)
	Returns the last data output value of the selected DAC channel. More...

HAL_StatusTypeDef	HAL_DAC_ConfigChannel (DAC_HandleTypeDef hdac, DAC_ChannelConfTypeDef sConfig, uint32_t Channel)
	Configures the selected DAC channel. More...

Detailed Description

Peripheral Control functions.

  ==============================================================================
             ##### Peripheral Control functions #####
  ==============================================================================
    [..]  This section provides functions allowing to:
      (+) Configure channels.
      (+) Set the specified data holding register value for DAC channel.

Function Documentation

◆ HAL_DAC_ConfigChannel()

HAL_StatusTypeDef HAL_DAC_ConfigChannel	(	DAC_HandleTypeDef *	hdac,
		DAC_ChannelConfTypeDef *	sConfig,
		uint32_t	Channel
	)

Configures the selected DAC channel.

Note

By calling this function, the high frequency interface mode (HFSEL bits) will be set. This parameter scope is the DAC instance. As the function is called for each channel, the DAC high frequency interface mode of

sConfig must be the same at each call. (or DAC_HIGH_FREQUENCY_INTERFACE_MODE_AUTOMATIC self detect).

Parameters

hdac	pointer to a DAC_HandleTypeDef structure that contains the configuration information for the specified DAC.
sConfig	DAC configuration structure.
Channel	The selected DAC channel. This parameter can be one of the following values: DAC_CHANNEL_1: DAC Channel1 selected DAC_CHANNEL_2: DAC Channel2 selected (Whenever present)

Return values

HAL status

Definition at line 1199 of file stm32l4xx_hal_dac.c.

 {
   uint32_t tmpreg1;
   uint32_t tmpreg2;
   uint32_t tickstart = 0U;
 #if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined(STM32L4S9xx)
   uint32_t hclkfreq;
 #endif /* STM32L4R5xx STM32L4R7xx STM32L4R9xx STM32L4S5xx STM32L4S7xx STM32L4S9xx */
 
   /* Check the DAC parameters */
 #if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined(STM32L4S9xx)
   assert_param(IS_DAC_HIGH_FREQUENCY_MODE(sConfig->DAC_HighFrequency));
 #endif /* STM32L4R5xx STM32L4R7xx STM32L4R9xx STM32L4S5xx STM32L4S7xx STM32L4S9xx */
   assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger));
   assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer));
   assert_param(IS_DAC_CHIP_CONNECTION(sConfig->DAC_ConnectOnChipPeripheral));
   assert_param(IS_DAC_TRIMMING(sConfig->DAC_UserTrimming));
   if ((sConfig->DAC_UserTrimming) == DAC_TRIMMING_USER)
   {
     assert_param(IS_DAC_TRIMMINGVALUE(sConfig->DAC_TrimmingValue));
   }
   assert_param(IS_DAC_SAMPLEANDHOLD(sConfig->DAC_SampleAndHold));
   if ((sConfig->DAC_SampleAndHold) == DAC_SAMPLEANDHOLD_ENABLE)
   {
     assert_param(IS_DAC_SAMPLETIME(sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime));
     assert_param(IS_DAC_HOLDTIME(sConfig->DAC_SampleAndHoldConfig.DAC_HoldTime));
     assert_param(IS_DAC_REFRESHTIME(sConfig->DAC_SampleAndHoldConfig.DAC_RefreshTime));
   }
   assert_param(IS_DAC_CHANNEL(Channel));
 
   /* Process locked */
   __HAL_LOCK(hdac);
 
   /* Change DAC state */
   hdac->State = HAL_DAC_STATE_BUSY;
 
   if (sConfig->DAC_SampleAndHold == DAC_SAMPLEANDHOLD_ENABLE)
   /* Sample on old configuration */
   {
     /* SampleTime */
     if (Channel == DAC_CHANNEL_1)
     {
       /* Get timeout */
       tickstart = HAL_GetTick();
 
       /* SHSR1 can be written when BWST1 is cleared */
       while (((hdac->Instance->SR) & DAC_SR_BWST1) != 0UL)
       {
         /* Check for the Timeout */
         if ((HAL_GetTick() - tickstart) > TIMEOUT_DAC_CALIBCONFIG)
         {
           /* Update error code */
           SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_TIMEOUT);
 
           /* Change the DMA state */
           hdac->State = HAL_DAC_STATE_TIMEOUT;
 
           return HAL_TIMEOUT;
         }
       }
       HAL_Delay(1);
       hdac->Instance->SHSR1 = sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime;
     }
 #if !defined (STM32L451xx) & !defined (STM32L452xx) & !defined (STM32L462xx)
     else /* Channel 2 */
     {
       /* SHSR2 can be written when BWST2 is cleared */
 
       while (((hdac->Instance->SR) & DAC_SR_BWST2) != 0UL)
       {
         /* Check for the Timeout */
         if ((HAL_GetTick() - tickstart) > TIMEOUT_DAC_CALIBCONFIG)
         {
           /* Update error code */
           SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_TIMEOUT);
 
           /* Change the DMA state */
           hdac->State = HAL_DAC_STATE_TIMEOUT;
 
           return HAL_TIMEOUT;
         }
       }
       HAL_Delay(1U);
       hdac->Instance->SHSR2 = sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime;
     }
 #endif /* STM32L451xx STM32L452xx STM32L462xx */
 
     /* HoldTime */
     MODIFY_REG(hdac->Instance->SHHR, DAC_SHHR_THOLD1 << (Channel & 0x10UL), (sConfig->DAC_SampleAndHoldConfig.DAC_HoldTime) << (Channel & 0x10UL));
     /* RefreshTime */
     MODIFY_REG(hdac->Instance->SHRR, DAC_SHRR_TREFRESH1 << (Channel & 0x10UL), (sConfig->DAC_SampleAndHoldConfig.DAC_RefreshTime) << (Channel & 0x10UL));
   }
 
   if (sConfig->DAC_UserTrimming == DAC_TRIMMING_USER)
   /* USER TRIMMING */
   {
   /* Get the DAC CCR value */
   tmpreg1 = hdac->Instance->CCR;
   /* Clear trimming value */
     tmpreg1 &= ~(((uint32_t)(DAC_CCR_OTRIM1)) << (Channel & 0x10UL));
   /* Configure for the selected trimming offset */
   tmpreg2 = sConfig->DAC_TrimmingValue;
   /* Calculate CCR register value depending on DAC_Channel */
     tmpreg1 |= tmpreg2 << (Channel & 0x10UL);
   /* Write to DAC CCR */
   hdac->Instance->CCR = tmpreg1;
   }
   /* else factory trimming is used (factory setting are available at reset)*/
   /* SW Nothing has nothing to do */
 
   /* Get the DAC MCR value */
   tmpreg1 = hdac->Instance->MCR;
   /* Clear DAC_MCR_MODEx bits */
   tmpreg1 &= ~(((uint32_t)(DAC_MCR_MODE1)) << (Channel & 0x10UL));
   /* Configure for the selected DAC channel: mode, buffer output & on chip peripheral connect */
   tmpreg2 = (sConfig->DAC_SampleAndHold | sConfig->DAC_OutputBuffer | sConfig->DAC_ConnectOnChipPeripheral);
   /* Calculate MCR register value depending on DAC_Channel */
   tmpreg1 |= tmpreg2 << (Channel & 0x10UL);
   /* Write to DAC MCR */
   hdac->Instance->MCR = tmpreg1;
 
   /* DAC in normal operating mode hence clear DAC_CR_CENx bit */
   CLEAR_BIT(hdac->Instance->CR, DAC_CR_CEN1 << (Channel & 0x10UL));
 
   /* Get the DAC CR value */
   tmpreg1 = hdac->Instance->CR;
   /* Clear TENx, TSELx, WAVEx and MAMPx bits */
   tmpreg1 &= ~(((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1)) << (Channel & 0x10UL));
   /* Configure for the selected DAC channel: trigger */
   /* Set TSELx and TENx bits according to DAC_Trigger value */
   tmpreg2 = sConfig->DAC_Trigger;
   /* Calculate CR register value depending on DAC_Channel */
   tmpreg1 |= tmpreg2 << (Channel & 0x10UL);
 #if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined(STM32L4S9xx)
   if (DAC_HIGH_FREQUENCY_INTERFACE_MODE_ABOVE_80MHZ == sConfig->DAC_HighFrequency)
   {
     tmpreg1 |= DAC_CR_HFSEL;
   }
   else
   {
     if (DAC_HIGH_FREQUENCY_INTERFACE_MODE_DISABLE == sConfig->DAC_HighFrequency)
     {
       tmpreg1 &= ~(DAC_CR_HFSEL);
     }
     else /* Automatic selection */
     {
       hclkfreq = HAL_RCC_GetHCLKFreq();
       if (hclkfreq > HFSEL_ENABLE_THRESHOLD_80MHZ)
       {
         /* High frequency enable when HCLK frequency higher than 80   */
          tmpreg1 |= DAC_CR_HFSEL;
       }
       else
       {
         /* High frequency disable when HCLK frequency higher than 80  */
         tmpreg1 &= ~(DAC_CR_HFSEL);
       }
     }
   }
 
 #endif /* STM32L4R5xx STM32L4R7xx STM32L4R9xx STM32L4S5xx STM32L4S7xx STM32L4S9xx */
 
   /* Write to DAC CR */
   hdac->Instance->CR = tmpreg1;
   /* Disable wave generation */
   hdac->Instance->CR &= ~(DAC_CR_WAVE1 << (Channel & 0x10UL));
 
   /* Change DAC state */
   hdac->State = HAL_DAC_STATE_READY;
 
   /* Process unlocked */
   __HAL_UNLOCK(hdac);
 
   /* Return function status */
   return HAL_OK;
 }

◆ HAL_DAC_GetValue()

uint32_t HAL_DAC_GetValue	(	DAC_HandleTypeDef *	hdac,
		uint32_t	Channel
	)

Returns the last data output value of the selected DAC channel.