STM32L4xx_HAL_Driver  1.14.0
Operation on DAC channels

Functions

__STATIC_INLINE void LL_DAC_Enable (DAC_TypeDef *DACx, uint32_t DAC_Channel)
 Enable DAC selected channel. CR EN1 LL_DAC_Enable
CR EN2 LL_DAC_Enable. More...
 
__STATIC_INLINE void LL_DAC_Disable (DAC_TypeDef *DACx, uint32_t DAC_Channel)
 Disable DAC selected channel. CR EN1 LL_DAC_Disable
CR EN2 LL_DAC_Disable. More...
 
__STATIC_INLINE uint32_t LL_DAC_IsEnabled (DAC_TypeDef *DACx, uint32_t DAC_Channel)
 Get DAC enable state of the selected channel. (0: DAC channel is disabled, 1: DAC channel is enabled) CR EN1 LL_DAC_IsEnabled
CR EN2 LL_DAC_IsEnabled. More...
 
__STATIC_INLINE void LL_DAC_EnableTrigger (DAC_TypeDef *DACx, uint32_t DAC_Channel)
 Enable DAC trigger of the selected channel. More...
 
__STATIC_INLINE void LL_DAC_DisableTrigger (DAC_TypeDef *DACx, uint32_t DAC_Channel)
 Disable DAC trigger of the selected channel. CR TEN1 LL_DAC_DisableTrigger
CR TEN2 LL_DAC_DisableTrigger. More...
 
__STATIC_INLINE uint32_t LL_DAC_IsTriggerEnabled (DAC_TypeDef *DACx, uint32_t DAC_Channel)
 Get DAC trigger state of the selected channel. (0: DAC trigger is disabled, 1: DAC trigger is enabled) CR TEN1 LL_DAC_IsTriggerEnabled
CR TEN2 LL_DAC_IsTriggerEnabled. More...
 
__STATIC_INLINE void LL_DAC_TrigSWConversion (DAC_TypeDef *DACx, uint32_t DAC_Channel)
 Trig DAC conversion by software for the selected DAC channel. More...
 
__STATIC_INLINE void LL_DAC_ConvertData12RightAligned (DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t Data)
 Set the data to be loaded in the data holding register in format 12 bits left alignment (LSB aligned on bit 0), for the selected DAC channel. DHR12R1 DACC1DHR LL_DAC_ConvertData12RightAligned
DHR12R2 DACC2DHR LL_DAC_ConvertData12RightAligned. More...
 
__STATIC_INLINE void LL_DAC_ConvertData12LeftAligned (DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t Data)
 Set the data to be loaded in the data holding register in format 12 bits left alignment (MSB aligned on bit 15), for the selected DAC channel. DHR12L1 DACC1DHR LL_DAC_ConvertData12LeftAligned
DHR12L2 DACC2DHR LL_DAC_ConvertData12LeftAligned. More...
 
__STATIC_INLINE void LL_DAC_ConvertData8RightAligned (DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t Data)
 Set the data to be loaded in the data holding register in format 8 bits left alignment (LSB aligned on bit 0), for the selected DAC channel. DHR8R1 DACC1DHR LL_DAC_ConvertData8RightAligned
DHR8R2 DACC2DHR LL_DAC_ConvertData8RightAligned. More...
 
__STATIC_INLINE void LL_DAC_ConvertDualData12RightAligned (DAC_TypeDef *DACx, uint32_t DataChannel1, uint32_t DataChannel2)
 Set the data to be loaded in the data holding register in format 12 bits left alignment (LSB aligned on bit 0), for both DAC channels. DHR12RD DACC1DHR LL_DAC_ConvertDualData12RightAligned
DHR12RD DACC2DHR LL_DAC_ConvertDualData12RightAligned. More...
 
__STATIC_INLINE void LL_DAC_ConvertDualData12LeftAligned (DAC_TypeDef *DACx, uint32_t DataChannel1, uint32_t DataChannel2)
 Set the data to be loaded in the data holding register in format 12 bits left alignment (MSB aligned on bit 15), for both DAC channels. DHR12LD DACC1DHR LL_DAC_ConvertDualData12LeftAligned
DHR12LD DACC2DHR LL_DAC_ConvertDualData12LeftAligned. More...
 
__STATIC_INLINE void LL_DAC_ConvertDualData8RightAligned (DAC_TypeDef *DACx, uint32_t DataChannel1, uint32_t DataChannel2)
 Set the data to be loaded in the data holding register in format 8 bits left alignment (LSB aligned on bit 0), for both DAC channels. DHR8RD DACC1DHR LL_DAC_ConvertDualData8RightAligned
DHR8RD DACC2DHR LL_DAC_ConvertDualData8RightAligned. More...
 
__STATIC_INLINE uint32_t LL_DAC_RetrieveOutputData (DAC_TypeDef *DACx, uint32_t DAC_Channel)
 Retrieve output data currently generated for the selected DAC channel. More...
 

Detailed Description

Function Documentation

◆ LL_DAC_ConvertData12LeftAligned()

__STATIC_INLINE void LL_DAC_ConvertData12LeftAligned ( DAC_TypeDef *  DACx,
uint32_t  DAC_Channel,
uint32_t  Data 
)

Set the data to be loaded in the data holding register in format 12 bits left alignment (MSB aligned on bit 15), for the selected DAC channel. DHR12L1 DACC1DHR LL_DAC_ConvertData12LeftAligned
DHR12L2 DACC2DHR LL_DAC_ConvertData12LeftAligned.

Parameters
DACxDAC instance
DAC_ChannelThis parameter can be one of the following values:
  • LL_DAC_CHANNEL_1
  • LL_DAC_CHANNEL_2 (1)
(1) On this STM32 serie, parameter not available on all devices. Refer to device datasheet for channels availability.
DataValue between Min_Data=0x000 and Max_Data=0xFFF
Return values
None

Definition at line 1642 of file stm32l4xx_ll_dac.h.

1643 {
1644  __IO uint32_t *preg = __DAC_PTR_REG_OFFSET(DACx->DHR12R1, (DAC_Channel >> DAC_REG_DHR12LX_REGOFFSET_BITOFFSET_POS) & DAC_REG_DHR_REGOFFSET_MASK_POSBIT0);
1645 
1646  MODIFY_REG(*preg,
1647  DAC_DHR12L1_DACC1DHR,
1648  Data);
1649 }
MODIFY_REG(hrtc->Instance->CR, RTC_CR_WUCKSEL,(uint32_t) WakeUpClock)

◆ LL_DAC_ConvertData12RightAligned()

__STATIC_INLINE void LL_DAC_ConvertData12RightAligned ( DAC_TypeDef *  DACx,
uint32_t  DAC_Channel,
uint32_t  Data 
)

Set the data to be loaded in the data holding register in format 12 bits left alignment (LSB aligned on bit 0), for the selected DAC channel. DHR12R1 DACC1DHR LL_DAC_ConvertData12RightAligned
DHR12R2 DACC2DHR LL_DAC_ConvertData12RightAligned.

Parameters
DACxDAC instance
DAC_ChannelThis parameter can be one of the following values:
  • LL_DAC_CHANNEL_1
  • LL_DAC_CHANNEL_2 (1)
(1) On this STM32 serie, parameter not available on all devices. Refer to device datasheet for channels availability.
DataValue between Min_Data=0x000 and Max_Data=0xFFF
Return values
None

Definition at line 1617 of file stm32l4xx_ll_dac.h.

1618 {
1619  __IO uint32_t *preg = __DAC_PTR_REG_OFFSET(DACx->DHR12R1, (DAC_Channel >> DAC_REG_DHR12RX_REGOFFSET_BITOFFSET_POS) & DAC_REG_DHR_REGOFFSET_MASK_POSBIT0);
1620 
1621  MODIFY_REG(*preg,
1622  DAC_DHR12R1_DACC1DHR,
1623  Data);
1624 }
MODIFY_REG(hrtc->Instance->CR, RTC_CR_WUCKSEL,(uint32_t) WakeUpClock)

◆ LL_DAC_ConvertData8RightAligned()

__STATIC_INLINE void LL_DAC_ConvertData8RightAligned ( DAC_TypeDef *  DACx,
uint32_t  DAC_Channel,
uint32_t  Data 
)

Set the data to be loaded in the data holding register in format 8 bits left alignment (LSB aligned on bit 0), for the selected DAC channel. DHR8R1 DACC1DHR LL_DAC_ConvertData8RightAligned
DHR8R2 DACC2DHR LL_DAC_ConvertData8RightAligned.

Parameters
DACxDAC instance
DAC_ChannelThis parameter can be one of the following values:
  • LL_DAC_CHANNEL_1
  • LL_DAC_CHANNEL_2 (1)
(1) On this STM32 serie, parameter not available on all devices. Refer to device datasheet for channels availability.
DataValue between Min_Data=0x00 and Max_Data=0xFF
Return values
None

Definition at line 1667 of file stm32l4xx_ll_dac.h.

1668 {
1669  __IO uint32_t *preg = __DAC_PTR_REG_OFFSET(DACx->DHR12R1, (DAC_Channel >> DAC_REG_DHR8RX_REGOFFSET_BITOFFSET_POS) & DAC_REG_DHR_REGOFFSET_MASK_POSBIT0);
1670 
1671  MODIFY_REG(*preg,
1672  DAC_DHR8R1_DACC1DHR,
1673  Data);
1674 }
MODIFY_REG(hrtc->Instance->CR, RTC_CR_WUCKSEL,(uint32_t) WakeUpClock)

◆ LL_DAC_ConvertDualData12LeftAligned()

__STATIC_INLINE void LL_DAC_ConvertDualData12LeftAligned ( DAC_TypeDef *  DACx,
uint32_t  DataChannel1,
uint32_t  DataChannel2 
)

Set the data to be loaded in the data holding register in format 12 bits left alignment (MSB aligned on bit 15), for both DAC channels. DHR12LD DACC1DHR LL_DAC_ConvertDualData12LeftAligned
DHR12LD DACC2DHR LL_DAC_ConvertDualData12LeftAligned.

Parameters
DACxDAC instance
DataChannel1Value between Min_Data=0x000 and Max_Data=0xFFF
DataChannel2Value between Min_Data=0x000 and Max_Data=0xFFF
Return values
None

Definition at line 1707 of file stm32l4xx_ll_dac.h.

1708 {
1709  /* Note: Data of DAC channel 2 shift value subtracted of 4 because */
1710  /* data on 16 bits and DAC channel 2 bits field is on the 12 MSB, */
1711  /* the 4 LSB must be taken into account for the shift value. */
1712  MODIFY_REG(DACx->DHR12LD,
1713  (DAC_DHR12LD_DACC2DHR | DAC_DHR12LD_DACC1DHR),
1714  ((DataChannel2 << (DAC_DHR12LD_DACC2DHR_BITOFFSET_POS - 4U)) | DataChannel1));
1715 }
MODIFY_REG(hrtc->Instance->CR, RTC_CR_WUCKSEL,(uint32_t) WakeUpClock)

◆ LL_DAC_ConvertDualData12RightAligned()

__STATIC_INLINE void LL_DAC_ConvertDualData12RightAligned ( DAC_TypeDef *  DACx,
uint32_t  DataChannel1,
uint32_t  DataChannel2 
)

Set the data to be loaded in the data holding register in format 12 bits left alignment (LSB aligned on bit 0), for both DAC channels. DHR12RD DACC1DHR LL_DAC_ConvertDualData12RightAligned
DHR12RD DACC2DHR LL_DAC_ConvertDualData12RightAligned.

Parameters
DACxDAC instance
DataChannel1Value between Min_Data=0x000 and Max_Data=0xFFF
DataChannel2Value between Min_Data=0x000 and Max_Data=0xFFF
Return values
None

Definition at line 1688 of file stm32l4xx_ll_dac.h.

1690 {
1691  MODIFY_REG(DACx->DHR12RD,
1692  (DAC_DHR12RD_DACC2DHR | DAC_DHR12RD_DACC1DHR),
1693  ((DataChannel2 << DAC_DHR12RD_DACC2DHR_BITOFFSET_POS) | DataChannel1));
1694 }
MODIFY_REG(hrtc->Instance->CR, RTC_CR_WUCKSEL,(uint32_t) WakeUpClock)

◆ LL_DAC_ConvertDualData8RightAligned()

__STATIC_INLINE void LL_DAC_ConvertDualData8RightAligned ( DAC_TypeDef *  DACx,
uint32_t  DataChannel1,
uint32_t  DataChannel2 
)

Set the data to be loaded in the data holding register in format 8 bits left alignment (LSB aligned on bit 0), for both DAC channels. DHR8RD DACC1DHR LL_DAC_ConvertDualData8RightAligned
DHR8RD DACC2DHR LL_DAC_ConvertDualData8RightAligned.

Parameters
DACxDAC instance
DataChannel1Value between Min_Data=0x00 and Max_Data=0xFF
DataChannel2Value between Min_Data=0x00 and Max_Data=0xFF
Return values
None

Definition at line 1728 of file stm32l4xx_ll_dac.h.

1729 {
1730  MODIFY_REG(DACx->DHR8RD,
1731  (DAC_DHR8RD_DACC2DHR | DAC_DHR8RD_DACC1DHR),
1732  ((DataChannel2 << DAC_DHR8RD_DACC2DHR_BITOFFSET_POS) | DataChannel1));
1733 }
MODIFY_REG(hrtc->Instance->CR, RTC_CR_WUCKSEL,(uint32_t) WakeUpClock)

◆ LL_DAC_Disable()

__STATIC_INLINE void LL_DAC_Disable ( DAC_TypeDef *  DACx,
uint32_t  DAC_Channel 
)

Disable DAC selected channel. CR EN1 LL_DAC_Disable
CR EN2 LL_DAC_Disable.

Parameters
DACxDAC instance
DAC_ChannelThis parameter can be one of the following values:
  • LL_DAC_CHANNEL_1
  • LL_DAC_CHANNEL_2 (1)
(1) On this STM32 serie, parameter not available on all devices. Refer to device datasheet for channels availability.
Return values
None

Definition at line 1477 of file stm32l4xx_ll_dac.h.

1478 {
1479  CLEAR_BIT(DACx->CR,
1480  DAC_CR_EN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
1481 }
CLEAR_BIT(hrtc->Instance->CR, RTC_CR_WUTE)

◆ LL_DAC_DisableTrigger()

__STATIC_INLINE void LL_DAC_DisableTrigger ( DAC_TypeDef *  DACx,
uint32_t  DAC_Channel 
)

Disable DAC trigger of the selected channel. CR TEN1 LL_DAC_DisableTrigger
CR TEN2 LL_DAC_DisableTrigger.

Parameters
DACxDAC instance
DAC_ChannelThis parameter can be one of the following values:
  • LL_DAC_CHANNEL_1
  • LL_DAC_CHANNEL_2 (1)
(1) On this STM32 serie, parameter not available on all devices. Refer to device datasheet for channels availability.
Return values
None

Definition at line 1544 of file stm32l4xx_ll_dac.h.

1545 {
1546  CLEAR_BIT(DACx->CR,
1547  DAC_CR_TEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
1548 }
CLEAR_BIT(hrtc->Instance->CR, RTC_CR_WUTE)

◆ LL_DAC_Enable()

__STATIC_INLINE void LL_DAC_Enable ( DAC_TypeDef *  DACx,
uint32_t  DAC_Channel 
)

Enable DAC selected channel. CR EN1 LL_DAC_Enable
CR EN2 LL_DAC_Enable.

Note
After enable from off state, DAC channel requires a delay for output voltage to reach accuracy +/- 1 LSB. Refer to device datasheet, parameter "tWAKEUP".
Parameters
DACxDAC instance
DAC_ChannelThis parameter can be one of the following values:
  • LL_DAC_CHANNEL_1
  • LL_DAC_CHANNEL_2 (1)
(1) On this STM32 serie, parameter not available on all devices. Refer to device datasheet for channels availability.
Return values
None

Definition at line 1458 of file stm32l4xx_ll_dac.h.

1459 {
1460  SET_BIT(DACx->CR,
1461  DAC_CR_EN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
1462 }

◆ LL_DAC_EnableTrigger()

__STATIC_INLINE void LL_DAC_EnableTrigger ( DAC_TypeDef *  DACx,
uint32_t  DAC_Channel 
)

Enable DAC trigger of the selected channel.

Note
- If DAC trigger is disabled, DAC conversion is performed automatically once the data holding register is updated, using functions "LL_DAC_ConvertData{8; 12}{Right; Left} Aligned()": LL_DAC_ConvertData12RightAligned(), ...
  • If DAC trigger is enabled, DAC conversion is performed only when a hardware of software trigger event is occurring. Select trigger source using function LL_DAC_SetTriggerSource(). CR TEN1 LL_DAC_EnableTrigger
    CR TEN2 LL_DAC_EnableTrigger
Parameters
DACxDAC instance
DAC_ChannelThis parameter can be one of the following values:
  • LL_DAC_CHANNEL_1
  • LL_DAC_CHANNEL_2 (1)
(1) On this STM32 serie, parameter not available on all devices. Refer to device datasheet for channels availability.
Return values
None

Definition at line 1525 of file stm32l4xx_ll_dac.h.

1526 {
1527  SET_BIT(DACx->CR,
1528  DAC_CR_TEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
1529 }

◆ LL_DAC_IsEnabled()

__STATIC_INLINE uint32_t LL_DAC_IsEnabled ( DAC_TypeDef *  DACx,
uint32_t  DAC_Channel 
)

Get DAC enable state of the selected channel. (0: DAC channel is disabled, 1: DAC channel is enabled) CR EN1 LL_DAC_IsEnabled
CR EN2 LL_DAC_IsEnabled.

Parameters
DACxDAC instance
DAC_ChannelThis parameter can be one of the following values:
  • LL_DAC_CHANNEL_1
  • LL_DAC_CHANNEL_2 (1)
(1) On this STM32 serie, parameter not available on all devices. Refer to device datasheet for channels availability.
Return values
Stateof bit (1 or 0).

Definition at line 1497 of file stm32l4xx_ll_dac.h.

1498 {
1499  return ((READ_BIT(DACx->CR,
1500  DAC_CR_EN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
1501  == (DAC_CR_EN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))) ? 1UL : 0UL);
1502 }

◆ LL_DAC_IsTriggerEnabled()

__STATIC_INLINE uint32_t LL_DAC_IsTriggerEnabled ( DAC_TypeDef *  DACx,
uint32_t  DAC_Channel 
)

Get DAC trigger state of the selected channel. (0: DAC trigger is disabled, 1: DAC trigger is enabled) CR TEN1 LL_DAC_IsTriggerEnabled
CR TEN2 LL_DAC_IsTriggerEnabled.

Parameters
DACxDAC instance
DAC_ChannelThis parameter can be one of the following values:
  • LL_DAC_CHANNEL_1
  • LL_DAC_CHANNEL_2 (1)
(1) On this STM32 serie, parameter not available on all devices. Refer to device datasheet for channels availability.
Return values
Stateof bit (1 or 0).

Definition at line 1564 of file stm32l4xx_ll_dac.h.

1565 {
1566  return ((READ_BIT(DACx->CR,
1567  DAC_CR_TEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
1568  == (DAC_CR_TEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))) ? 1UL : 0UL);
1569 }

◆ LL_DAC_RetrieveOutputData()

__STATIC_INLINE uint32_t LL_DAC_RetrieveOutputData ( DAC_TypeDef *  DACx,
uint32_t  DAC_Channel 
)

Retrieve output data currently generated for the selected DAC channel.

Note
Whatever alignment and resolution settings (using functions "LL_DAC_ConvertData{8; 12}{Right; Left} Aligned()": LL_DAC_ConvertData12RightAligned(), ...), output data format is 12 bits right aligned (LSB aligned on bit 0). DOR1 DACC1DOR LL_DAC_RetrieveOutputData
DOR2 DACC2DOR LL_DAC_RetrieveOutputData
Parameters
DACxDAC instance
DAC_ChannelThis parameter can be one of the following values:
  • LL_DAC_CHANNEL_1
  • LL_DAC_CHANNEL_2 (1)
(1) On this STM32 serie, parameter not available on all devices. Refer to device datasheet for channels availability.
Return values
Valuebetween Min_Data=0x000 and Max_Data=0xFFF

Definition at line 1753 of file stm32l4xx_ll_dac.h.

1754 {
1755  __IO uint32_t const *preg = __DAC_PTR_REG_OFFSET(DACx->DOR1, (DAC_Channel >> DAC_REG_DORX_REGOFFSET_BITOFFSET_POS) & DAC_REG_DORX_REGOFFSET_MASK_POSBIT0);
1756 
1757  return (uint16_t) READ_BIT(*preg, DAC_DOR1_DACC1DOR);
1758 }

◆ LL_DAC_TrigSWConversion()

__STATIC_INLINE void LL_DAC_TrigSWConversion ( DAC_TypeDef *  DACx,
uint32_t  DAC_Channel 
)

Trig DAC conversion by software for the selected DAC channel.

Note
Preliminarily, DAC trigger must be set to software trigger using function LL_DAC_Init() LL_DAC_SetTriggerSource() with parameter "LL_DAC_TRIGGER_SOFTWARE". and DAC trigger must be enabled using function LL_DAC_EnableTrigger().
For devices featuring DAC with 2 channels: this function can perform a SW start of both DAC channels simultaneously. Two channels can be selected as parameter. Example: (LL_DAC_CHANNEL_1 | LL_DAC_CHANNEL_2) SWTRIGR SWTRIG1 LL_DAC_TrigSWConversion
SWTRIGR SWTRIG2 LL_DAC_TrigSWConversion
Parameters
DACxDAC instance
DAC_ChannelThis parameter can a combination of the following values:
  • LL_DAC_CHANNEL_1
  • LL_DAC_CHANNEL_2 (1)
(1) On this STM32 serie, parameter not available on all devices. Refer to device datasheet for channels availability.
Return values
None

Definition at line 1595 of file stm32l4xx_ll_dac.h.

1596 {
1597  SET_BIT(DACx->SWTRIGR,
1598  (DAC_Channel & DAC_SWTR_CHX_MASK));
1599 }