STM32L4xx_HAL_Driver  1.14.0

Functions

__STATIC_INLINE void LL_DMA_EnableChannel (DMA_TypeDef *DMAx, uint32_t Channel)
 Enable DMA channel. CCR EN LL_DMA_EnableChannel. More...
 
__STATIC_INLINE void LL_DMA_DisableChannel (DMA_TypeDef *DMAx, uint32_t Channel)
 Disable DMA channel. CCR EN LL_DMA_DisableChannel. More...
 
__STATIC_INLINE uint32_t LL_DMA_IsEnabledChannel (DMA_TypeDef *DMAx, uint32_t Channel)
 Check if DMA channel is enabled or disabled. CCR EN LL_DMA_IsEnabledChannel. More...
 
__STATIC_INLINE void LL_DMA_ConfigTransfer (DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Configuration)
 Configure all parameters link to DMA transfer. CCR DIR LL_DMA_ConfigTransfer
CCR MEM2MEM LL_DMA_ConfigTransfer
CCR CIRC LL_DMA_ConfigTransfer
CCR PINC LL_DMA_ConfigTransfer
CCR MINC LL_DMA_ConfigTransfer
CCR PSIZE LL_DMA_ConfigTransfer
CCR MSIZE LL_DMA_ConfigTransfer
CCR PL LL_DMA_ConfigTransfer. More...
 
__STATIC_INLINE void LL_DMA_SetDataTransferDirection (DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Direction)
 Set Data transfer direction (read from peripheral or from memory). CCR DIR LL_DMA_SetDataTransferDirection
CCR MEM2MEM LL_DMA_SetDataTransferDirection. More...
 
__STATIC_INLINE uint32_t LL_DMA_GetDataTransferDirection (DMA_TypeDef *DMAx, uint32_t Channel)
 Get Data transfer direction (read from peripheral or from memory). CCR DIR LL_DMA_GetDataTransferDirection
CCR MEM2MEM LL_DMA_GetDataTransferDirection. More...
 
__STATIC_INLINE void LL_DMA_SetMode (DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Mode)
 Set DMA mode circular or normal. More...
 
__STATIC_INLINE uint32_t LL_DMA_GetMode (DMA_TypeDef *DMAx, uint32_t Channel)
 Get DMA mode circular or normal. CCR CIRC LL_DMA_GetMode. More...
 
__STATIC_INLINE void LL_DMA_SetPeriphIncMode (DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphOrM2MSrcIncMode)
 Set Peripheral increment mode. CCR PINC LL_DMA_SetPeriphIncMode. More...
 
__STATIC_INLINE uint32_t LL_DMA_GetPeriphIncMode (DMA_TypeDef *DMAx, uint32_t Channel)
 Get Peripheral increment mode. CCR PINC LL_DMA_GetPeriphIncMode. More...
 
__STATIC_INLINE void LL_DMA_SetMemoryIncMode (DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryOrM2MDstIncMode)
 Set Memory increment mode. CCR MINC LL_DMA_SetMemoryIncMode. More...
 
__STATIC_INLINE uint32_t LL_DMA_GetMemoryIncMode (DMA_TypeDef *DMAx, uint32_t Channel)
 Get Memory increment mode. CCR MINC LL_DMA_GetMemoryIncMode. More...
 
__STATIC_INLINE void LL_DMA_SetPeriphSize (DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphOrM2MSrcDataSize)
 Set Peripheral size. CCR PSIZE LL_DMA_SetPeriphSize. More...
 
__STATIC_INLINE uint32_t LL_DMA_GetPeriphSize (DMA_TypeDef *DMAx, uint32_t Channel)
 Get Peripheral size. CCR PSIZE LL_DMA_GetPeriphSize. More...
 
__STATIC_INLINE void LL_DMA_SetMemorySize (DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryOrM2MDstDataSize)
 Set Memory size. CCR MSIZE LL_DMA_SetMemorySize. More...
 
__STATIC_INLINE uint32_t LL_DMA_GetMemorySize (DMA_TypeDef *DMAx, uint32_t Channel)
 Get Memory size. CCR MSIZE LL_DMA_GetMemorySize. More...
 
__STATIC_INLINE void LL_DMA_SetChannelPriorityLevel (DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Priority)
 Set Channel priority level. CCR PL LL_DMA_SetChannelPriorityLevel. More...
 
__STATIC_INLINE uint32_t LL_DMA_GetChannelPriorityLevel (DMA_TypeDef *DMAx, uint32_t Channel)
 Get Channel priority level. CCR PL LL_DMA_GetChannelPriorityLevel. More...
 
__STATIC_INLINE void LL_DMA_SetDataLength (DMA_TypeDef *DMAx, uint32_t Channel, uint32_t NbData)
 Set Number of data to transfer. More...
 
__STATIC_INLINE uint32_t LL_DMA_GetDataLength (DMA_TypeDef *DMAx, uint32_t Channel)
 Get Number of data to transfer. More...
 
__STATIC_INLINE void LL_DMA_ConfigAddresses (DMA_TypeDef *DMAx, uint32_t Channel, uint32_t SrcAddress, uint32_t DstAddress, uint32_t Direction)
 Configure the Source and Destination addresses. More...
 
__STATIC_INLINE void LL_DMA_SetMemoryAddress (DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryAddress)
 Set the Memory address. More...
 
__STATIC_INLINE void LL_DMA_SetPeriphAddress (DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphAddress)
 Set the Peripheral address. More...
 
__STATIC_INLINE uint32_t LL_DMA_GetMemoryAddress (DMA_TypeDef *DMAx, uint32_t Channel)
 Get Memory address. More...
 
__STATIC_INLINE uint32_t LL_DMA_GetPeriphAddress (DMA_TypeDef *DMAx, uint32_t Channel)
 Get Peripheral address. More...
 
__STATIC_INLINE void LL_DMA_SetM2MSrcAddress (DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryAddress)
 Set the Memory to Memory Source address. More...
 
__STATIC_INLINE void LL_DMA_SetM2MDstAddress (DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryAddress)
 Set the Memory to Memory Destination address. More...
 
__STATIC_INLINE uint32_t LL_DMA_GetM2MSrcAddress (DMA_TypeDef *DMAx, uint32_t Channel)
 Get the Memory to Memory Source address. More...
 
__STATIC_INLINE uint32_t LL_DMA_GetM2MDstAddress (DMA_TypeDef *DMAx, uint32_t Channel)
 Get the Memory to Memory Destination address. More...
 
__STATIC_INLINE void LL_DMA_SetPeriphRequest (DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Request)
 Set DMA request for DMA Channels on DMAMUX Channel x. More...
 
__STATIC_INLINE uint32_t LL_DMA_GetPeriphRequest (DMA_TypeDef *DMAx, uint32_t Channel)
 Get DMA request for DMA Channels on DMAMUX Channel x. More...
 

Detailed Description

Function Documentation

◆ LL_DMA_ConfigAddresses()

__STATIC_INLINE void LL_DMA_ConfigAddresses ( DMA_TypeDef *  DMAx,
uint32_t  Channel,
uint32_t  SrcAddress,
uint32_t  DstAddress,
uint32_t  Direction 
)

Configure the Source and Destination addresses.

Note
This API must not be called when the DMA channel is enabled.
Each IP using DMA provides an API to get directly the register adress (LL_PPP_DMA_GetRegAddr). CPAR PA LL_DMA_ConfigAddresses
CMAR MA LL_DMA_ConfigAddresses
Parameters
DMAxDMAx Instance
ChannelThis parameter can be one of the following values:
  • LL_DMA_CHANNEL_1
  • LL_DMA_CHANNEL_2
  • LL_DMA_CHANNEL_3
  • LL_DMA_CHANNEL_4
  • LL_DMA_CHANNEL_5
  • LL_DMA_CHANNEL_6
  • LL_DMA_CHANNEL_7
SrcAddressBetween Min_Data = 0 and Max_Data = 0xFFFFFFFF
DstAddressBetween Min_Data = 0 and Max_Data = 0xFFFFFFFF
DirectionThis parameter can be one of the following values:
  • LL_DMA_DIRECTION_PERIPH_TO_MEMORY
  • LL_DMA_DIRECTION_MEMORY_TO_PERIPH
  • LL_DMA_DIRECTION_MEMORY_TO_MEMORY
Return values
None

Definition at line 1054 of file stm32l4xx_ll_dma.h.

1056 {
1057  uint32_t dma_base_addr = (uint32_t)DMAx;
1058  /* Direction Memory to Periph */
1059  if (Direction == LL_DMA_DIRECTION_MEMORY_TO_PERIPH)
1060  {
1061  WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CMAR, SrcAddress);
1062  WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CPAR, DstAddress);
1063  }
1064  /* Direction Periph to Memory and Memory to Memory */
1065  else
1066  {
1067  WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CPAR, SrcAddress);
1068  WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CMAR, DstAddress);
1069  }
1070 }
static const uint8_t CHANNEL_OFFSET_TAB[]

◆ LL_DMA_ConfigTransfer()

__STATIC_INLINE void LL_DMA_ConfigTransfer ( DMA_TypeDef *  DMAx,
uint32_t  Channel,
uint32_t  Configuration 
)

Configure all parameters link to DMA transfer. CCR DIR LL_DMA_ConfigTransfer
CCR MEM2MEM LL_DMA_ConfigTransfer
CCR CIRC LL_DMA_ConfigTransfer
CCR PINC LL_DMA_ConfigTransfer
CCR MINC LL_DMA_ConfigTransfer
CCR PSIZE LL_DMA_ConfigTransfer
CCR MSIZE LL_DMA_ConfigTransfer
CCR PL LL_DMA_ConfigTransfer.

Parameters
DMAxDMAx Instance
ChannelThis parameter can be one of the following values:
  • LL_DMA_CHANNEL_1
  • LL_DMA_CHANNEL_2
  • LL_DMA_CHANNEL_3
  • LL_DMA_CHANNEL_4
  • LL_DMA_CHANNEL_5
  • LL_DMA_CHANNEL_6
  • LL_DMA_CHANNEL_7
ConfigurationThis parameter must be a combination of all the following values:
  • LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMORY_TO_PERIPH or LL_DMA_DIRECTION_MEMORY_TO_MEMORY
  • LL_DMA_MODE_NORMAL or LL_DMA_MODE_CIRCULAR
  • LL_DMA_PERIPH_INCREMENT or LL_DMA_PERIPH_NOINCREMENT
  • LL_DMA_MEMORY_INCREMENT or LL_DMA_MEMORY_NOINCREMENT
  • LL_DMA_PDATAALIGN_BYTE or LL_DMA_PDATAALIGN_HALFWORD or LL_DMA_PDATAALIGN_WORD
  • LL_DMA_MDATAALIGN_BYTE or LL_DMA_MDATAALIGN_HALFWORD or LL_DMA_MDATAALIGN_WORD
  • LL_DMA_PRIORITY_LOW or LL_DMA_PRIORITY_MEDIUM or LL_DMA_PRIORITY_HIGH or LL_DMA_PRIORITY_VERYHIGH
Return values
None

Definition at line 633 of file stm32l4xx_ll_dma.h.

634 {
635  uint32_t dma_base_addr = (uint32_t)DMAx;
636  MODIFY_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR,
637  DMA_CCR_DIR | DMA_CCR_MEM2MEM | DMA_CCR_CIRC | DMA_CCR_PINC | DMA_CCR_MINC | DMA_CCR_PSIZE | DMA_CCR_MSIZE | DMA_CCR_PL,
638  Configuration);
639 }
MODIFY_REG(hrtc->Instance->CR, RTC_CR_WUCKSEL,(uint32_t) WakeUpClock)
static const uint8_t CHANNEL_OFFSET_TAB[]

◆ LL_DMA_DisableChannel()

__STATIC_INLINE void LL_DMA_DisableChannel ( DMA_TypeDef *  DMAx,
uint32_t  Channel 
)

Disable DMA channel. CCR EN LL_DMA_DisableChannel.

Parameters
DMAxDMAx Instance
ChannelThis parameter can be one of the following values:
  • LL_DMA_CHANNEL_1
  • LL_DMA_CHANNEL_2
  • LL_DMA_CHANNEL_3
  • LL_DMA_CHANNEL_4
  • LL_DMA_CHANNEL_5
  • LL_DMA_CHANNEL_6
  • LL_DMA_CHANNEL_7
Return values
None

Definition at line 577 of file stm32l4xx_ll_dma.h.

578 {
579  uint32_t dma_base_addr = (uint32_t)DMAx;
580  CLEAR_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR, DMA_CCR_EN);
581 }
CLEAR_BIT(hrtc->Instance->CR, RTC_CR_WUTE)
static const uint8_t CHANNEL_OFFSET_TAB[]

◆ LL_DMA_EnableChannel()

__STATIC_INLINE void LL_DMA_EnableChannel ( DMA_TypeDef *  DMAx,
uint32_t  Channel 
)

Enable DMA channel. CCR EN LL_DMA_EnableChannel.

Parameters
DMAxDMAx Instance
ChannelThis parameter can be one of the following values:
  • LL_DMA_CHANNEL_1
  • LL_DMA_CHANNEL_2
  • LL_DMA_CHANNEL_3
  • LL_DMA_CHANNEL_4
  • LL_DMA_CHANNEL_5
  • LL_DMA_CHANNEL_6
  • LL_DMA_CHANNEL_7
Return values
None

Definition at line 557 of file stm32l4xx_ll_dma.h.

558 {
559  uint32_t dma_base_addr = (uint32_t)DMAx;
560  SET_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR, DMA_CCR_EN);
561 }
static const uint8_t CHANNEL_OFFSET_TAB[]

◆ LL_DMA_GetChannelPriorityLevel()

__STATIC_INLINE uint32_t LL_DMA_GetChannelPriorityLevel ( DMA_TypeDef *  DMAx,
uint32_t  Channel 
)

Get Channel priority level. CCR PL LL_DMA_GetChannelPriorityLevel.

Parameters
DMAxDMAx Instance
ChannelThis parameter can be one of the following values:
  • LL_DMA_CHANNEL_1
  • LL_DMA_CHANNEL_2
  • LL_DMA_CHANNEL_3
  • LL_DMA_CHANNEL_4
  • LL_DMA_CHANNEL_5
  • LL_DMA_CHANNEL_6
  • LL_DMA_CHANNEL_7
Return values
Returnedvalue can be one of the following values:
  • LL_DMA_PRIORITY_LOW
  • LL_DMA_PRIORITY_MEDIUM
  • LL_DMA_PRIORITY_HIGH
  • LL_DMA_PRIORITY_VERYHIGH

Definition at line 977 of file stm32l4xx_ll_dma.h.

978 {
979  uint32_t dma_base_addr = (uint32_t)DMAx;
980  return (READ_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR,
981  DMA_CCR_PL));
982 }
static const uint8_t CHANNEL_OFFSET_TAB[]

◆ LL_DMA_GetDataLength()

__STATIC_INLINE uint32_t LL_DMA_GetDataLength ( DMA_TypeDef *  DMAx,
uint32_t  Channel 
)

Get Number of data to transfer.

Note
Once the channel is enabled, the return value indicate the remaining bytes to be transmitted. CNDTR NDT LL_DMA_GetDataLength
Parameters
DMAxDMAx Instance
ChannelThis parameter can be one of the following values:
  • LL_DMA_CHANNEL_1
  • LL_DMA_CHANNEL_2
  • LL_DMA_CHANNEL_3
  • LL_DMA_CHANNEL_4
  • LL_DMA_CHANNEL_5
  • LL_DMA_CHANNEL_6
  • LL_DMA_CHANNEL_7
Return values
BetweenMin_Data = 0 and Max_Data = 0xFFFFFFFF

Definition at line 1024 of file stm32l4xx_ll_dma.h.

1025 {
1026  uint32_t dma_base_addr = (uint32_t)DMAx;
1027  return (READ_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CNDTR,
1028  DMA_CNDTR_NDT));
1029 }
static const uint8_t CHANNEL_OFFSET_TAB[]

◆ LL_DMA_GetDataTransferDirection()

__STATIC_INLINE uint32_t LL_DMA_GetDataTransferDirection ( DMA_TypeDef *  DMAx,
uint32_t  Channel 
)

Get Data transfer direction (read from peripheral or from memory). CCR DIR LL_DMA_GetDataTransferDirection
CCR MEM2MEM LL_DMA_GetDataTransferDirection.

Parameters
DMAxDMAx Instance
ChannelThis parameter can be one of the following values:
  • LL_DMA_CHANNEL_1
  • LL_DMA_CHANNEL_2
  • LL_DMA_CHANNEL_3
  • LL_DMA_CHANNEL_4
  • LL_DMA_CHANNEL_5
  • LL_DMA_CHANNEL_6
  • LL_DMA_CHANNEL_7
Return values
Returnedvalue can be one of the following values:
  • LL_DMA_DIRECTION_PERIPH_TO_MEMORY
  • LL_DMA_DIRECTION_MEMORY_TO_PERIPH
  • LL_DMA_DIRECTION_MEMORY_TO_MEMORY

Definition at line 685 of file stm32l4xx_ll_dma.h.

686 {
687  uint32_t dma_base_addr = (uint32_t)DMAx;
688  return (READ_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR,
689  DMA_CCR_DIR | DMA_CCR_MEM2MEM));
690 }
static const uint8_t CHANNEL_OFFSET_TAB[]

◆ LL_DMA_GetM2MDstAddress()

__STATIC_INLINE uint32_t LL_DMA_GetM2MDstAddress ( DMA_TypeDef *  DMAx,
uint32_t  Channel 
)

Get the Memory to Memory Destination address.

Note
Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only. CMAR MA LL_DMA_GetM2MDstAddress
Parameters
DMAxDMAx Instance
ChannelThis parameter can be one of the following values:
  • LL_DMA_CHANNEL_1
  • LL_DMA_CHANNEL_2
  • LL_DMA_CHANNEL_3
  • LL_DMA_CHANNEL_4
  • LL_DMA_CHANNEL_5
  • LL_DMA_CHANNEL_6
  • LL_DMA_CHANNEL_7
Return values
BetweenMin_Data = 0 and Max_Data = 0xFFFFFFFF

Definition at line 1242 of file stm32l4xx_ll_dma.h.

1243 {
1244  uint32_t dma_base_addr = (uint32_t)DMAx;
1245  return (READ_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CMAR));
1246 }
static const uint8_t CHANNEL_OFFSET_TAB[]

◆ LL_DMA_GetM2MSrcAddress()

__STATIC_INLINE uint32_t LL_DMA_GetM2MSrcAddress ( DMA_TypeDef *  DMAx,
uint32_t  Channel 
)

Get the Memory to Memory Source address.

Note
Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only. CPAR PA LL_DMA_GetM2MSrcAddress
Parameters
DMAxDMAx Instance
ChannelThis parameter can be one of the following values:
  • LL_DMA_CHANNEL_1
  • LL_DMA_CHANNEL_2
  • LL_DMA_CHANNEL_3
  • LL_DMA_CHANNEL_4
  • LL_DMA_CHANNEL_5
  • LL_DMA_CHANNEL_6
  • LL_DMA_CHANNEL_7
Return values
BetweenMin_Data = 0 and Max_Data = 0xFFFFFFFF

Definition at line 1221 of file stm32l4xx_ll_dma.h.

1222 {
1223  uint32_t dma_base_addr = (uint32_t)DMAx;
1224  return (READ_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CPAR));
1225 }
static const uint8_t CHANNEL_OFFSET_TAB[]

◆ LL_DMA_GetMemoryAddress()

__STATIC_INLINE uint32_t LL_DMA_GetMemoryAddress ( DMA_TypeDef *  DMAx,
uint32_t  Channel 
)

Get Memory address.

Note
Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMORY_TO_PERIPH only. CMAR MA LL_DMA_GetMemoryAddress
Parameters
DMAxDMAx Instance
ChannelThis parameter can be one of the following values:
  • LL_DMA_CHANNEL_1
  • LL_DMA_CHANNEL_2
  • LL_DMA_CHANNEL_3
  • LL_DMA_CHANNEL_4
  • LL_DMA_CHANNEL_5
  • LL_DMA_CHANNEL_6
  • LL_DMA_CHANNEL_7
Return values
BetweenMin_Data = 0 and Max_Data = 0xFFFFFFFF

Definition at line 1133 of file stm32l4xx_ll_dma.h.

1134 {
1135  uint32_t dma_base_addr = (uint32_t)DMAx;
1136  return (READ_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CMAR));
1137 }
static const uint8_t CHANNEL_OFFSET_TAB[]

◆ LL_DMA_GetMemoryIncMode()

__STATIC_INLINE uint32_t LL_DMA_GetMemoryIncMode ( DMA_TypeDef *  DMAx,
uint32_t  Channel 
)

Get Memory increment mode. CCR MINC LL_DMA_GetMemoryIncMode.

Parameters
DMAxDMAx Instance
ChannelThis parameter can be one of the following values:
  • LL_DMA_CHANNEL_1
  • LL_DMA_CHANNEL_2
  • LL_DMA_CHANNEL_3
  • LL_DMA_CHANNEL_4
  • LL_DMA_CHANNEL_5
  • LL_DMA_CHANNEL_6
  • LL_DMA_CHANNEL_7
Return values
Returnedvalue can be one of the following values:
  • LL_DMA_MEMORY_INCREMENT
  • LL_DMA_MEMORY_NOINCREMENT

Definition at line 828 of file stm32l4xx_ll_dma.h.

829 {
830  uint32_t dma_base_addr = (uint32_t)DMAx;
831  return (READ_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR,
832  DMA_CCR_MINC));
833 }
static const uint8_t CHANNEL_OFFSET_TAB[]

◆ LL_DMA_GetMemorySize()

__STATIC_INLINE uint32_t LL_DMA_GetMemorySize ( DMA_TypeDef *  DMAx,
uint32_t  Channel 
)

Get Memory size. CCR MSIZE LL_DMA_GetMemorySize.

Parameters
DMAxDMAx Instance
ChannelThis parameter can be one of the following values:
  • LL_DMA_CHANNEL_1
  • LL_DMA_CHANNEL_2
  • LL_DMA_CHANNEL_3
  • LL_DMA_CHANNEL_4
  • LL_DMA_CHANNEL_5
  • LL_DMA_CHANNEL_6
  • LL_DMA_CHANNEL_7
Return values
Returnedvalue can be one of the following values:
  • LL_DMA_MDATAALIGN_BYTE
  • LL_DMA_MDATAALIGN_HALFWORD
  • LL_DMA_MDATAALIGN_WORD

Definition at line 926 of file stm32l4xx_ll_dma.h.

927 {
928  uint32_t dma_base_addr = (uint32_t)DMAx;
929  return (READ_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR,
930  DMA_CCR_MSIZE));
931 }
static const uint8_t CHANNEL_OFFSET_TAB[]

◆ LL_DMA_GetMode()

__STATIC_INLINE uint32_t LL_DMA_GetMode ( DMA_TypeDef *  DMAx,
uint32_t  Channel 
)

Get DMA mode circular or normal. CCR CIRC LL_DMA_GetMode.

Parameters
DMAxDMAx Instance
ChannelThis parameter can be one of the following values:
  • LL_DMA_CHANNEL_1
  • LL_DMA_CHANNEL_2
  • LL_DMA_CHANNEL_3
  • LL_DMA_CHANNEL_4
  • LL_DMA_CHANNEL_5
  • LL_DMA_CHANNEL_6
  • LL_DMA_CHANNEL_7
Return values
Returnedvalue can be one of the following values:
  • LL_DMA_MODE_NORMAL
  • LL_DMA_MODE_CIRCULAR

Definition at line 734 of file stm32l4xx_ll_dma.h.

735 {
736  uint32_t dma_base_addr = (uint32_t)DMAx;
737  return (READ_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR,
738  DMA_CCR_CIRC));
739 }
static const uint8_t CHANNEL_OFFSET_TAB[]

◆ LL_DMA_GetPeriphAddress()

__STATIC_INLINE uint32_t LL_DMA_GetPeriphAddress ( DMA_TypeDef *  DMAx,
uint32_t  Channel 
)

Get Peripheral address.

Note
Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMORY_TO_PERIPH only. CPAR PA LL_DMA_GetPeriphAddress
Parameters
DMAxDMAx Instance
ChannelThis parameter can be one of the following values:
  • LL_DMA_CHANNEL_1
  • LL_DMA_CHANNEL_2
  • LL_DMA_CHANNEL_3
  • LL_DMA_CHANNEL_4
  • LL_DMA_CHANNEL_5
  • LL_DMA_CHANNEL_6
  • LL_DMA_CHANNEL_7
Return values
BetweenMin_Data = 0 and Max_Data = 0xFFFFFFFF

Definition at line 1154 of file stm32l4xx_ll_dma.h.

1155 {
1156  uint32_t dma_base_addr = (uint32_t)DMAx;
1157  return (READ_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CPAR));
1158 }
static const uint8_t CHANNEL_OFFSET_TAB[]

◆ LL_DMA_GetPeriphIncMode()

__STATIC_INLINE uint32_t LL_DMA_GetPeriphIncMode ( DMA_TypeDef *  DMAx,
uint32_t  Channel 
)

Get Peripheral increment mode. CCR PINC LL_DMA_GetPeriphIncMode.

Parameters
DMAxDMAx Instance
ChannelThis parameter can be one of the following values:
  • LL_DMA_CHANNEL_1
  • LL_DMA_CHANNEL_2
  • LL_DMA_CHANNEL_3
  • LL_DMA_CHANNEL_4
  • LL_DMA_CHANNEL_5
  • LL_DMA_CHANNEL_6
  • LL_DMA_CHANNEL_7
Return values
Returnedvalue can be one of the following values:
  • LL_DMA_PERIPH_INCREMENT
  • LL_DMA_PERIPH_NOINCREMENT

Definition at line 781 of file stm32l4xx_ll_dma.h.

782 {
783  uint32_t dma_base_addr = (uint32_t)DMAx;
784  return (READ_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR,
785  DMA_CCR_PINC));
786 }
static const uint8_t CHANNEL_OFFSET_TAB[]

◆ LL_DMA_GetPeriphRequest()

__STATIC_INLINE uint32_t LL_DMA_GetPeriphRequest ( DMA_TypeDef *  DMAx,
uint32_t  Channel 
)

Get DMA request for DMA Channels on DMAMUX Channel x.

Get DMA request for DMA instance on Channel x. CSELR C1S LL_DMA_GetPeriphRequest
CSELR C2S LL_DMA_GetPeriphRequest
CSELR C3S LL_DMA_GetPeriphRequest
CSELR C4S LL_DMA_GetPeriphRequest
CSELR C5S LL_DMA_GetPeriphRequest
CSELR C6S LL_DMA_GetPeriphRequest
CSELR C7S LL_DMA_GetPeriphRequest.

Note
DMAMUX channel 0 to 6 are mapped to DMA1 channel 1 to 7. DMAMUX channel 7 to 13 are mapped to DMA2 channel 1 to 7. CxCR DMAREQ_ID LL_DMA_GetPeriphRequest
Parameters
DMAxDMAx Instance
ChannelThis parameter can be one of the following values:
  • LL_DMA_CHANNEL_1
  • LL_DMA_CHANNEL_2
  • LL_DMA_CHANNEL_3
  • LL_DMA_CHANNEL_4
  • LL_DMA_CHANNEL_5
  • LL_DMA_CHANNEL_6
  • LL_DMA_CHANNEL_7
Return values
Returnedvalue can be one of the following values:
  • LL_DMAMUX_REQ_MEM2MEM
  • LL_DMAMUX_REQ_GENERATOR0
  • LL_DMAMUX_REQ_GENERATOR1
  • LL_DMAMUX_REQ_GENERATOR2
  • LL_DMAMUX_REQ_GENERATOR3
  • LL_DMAMUX_REQ_ADC1
  • LL_DMAMUX_REQ_DAC1_CH1
  • LL_DMAMUX_REQ_DAC1_CH2
  • LL_DMAMUX_REQ_TIM6_UP
  • LL_DMAMUX_REQ_TIM7_UP
  • LL_DMAMUX_REQ_SPI1_RX
  • LL_DMAMUX_REQ_SPI1_TX
  • LL_DMAMUX_REQ_SPI2_RX
  • LL_DMAMUX_REQ_SPI2_TX
  • LL_DMAMUX_REQ_SPI3_RX
  • LL_DMAMUX_REQ_SPI3_TX
  • LL_DMAMUX_REQ_I2C1_RX
  • LL_DMAMUX_REQ_I2C1_TX
  • LL_DMAMUX_REQ_I2C2_RX
  • LL_DMAMUX_REQ_I2C2_TX
  • LL_DMAMUX_REQ_I2C3_RX
  • LL_DMAMUX_REQ_I2C3_TX
  • LL_DMAMUX_REQ_I2C4_RX
  • LL_DMAMUX_REQ_I2C4_TX
  • LL_DMAMUX_REQ_USART1_RX
  • LL_DMAMUX_REQ_USART1_TX
  • LL_DMAMUX_REQ_USART2_RX
  • LL_DMAMUX_REQ_USART2_TX
  • LL_DMAMUX_REQ_USART3_RX
  • LL_DMAMUX_REQ_USART3_TX
  • LL_DMAMUX_REQ_UART4_RX
  • LL_DMAMUX_REQ_UART4_TX
  • LL_DMAMUX_REQ_UART5_RX
  • LL_DMAMUX_REQ_UART5_TX
  • LL_DMAMUX_REQ_LPUART1_RX
  • LL_DMAMUX_REQ_LPUART1_TX
  • LL_DMAMUX_REQ_SAI1_A
  • LL_DMAMUX_REQ_SAI1_B
  • LL_DMAMUX_REQ_SAI2_A
  • LL_DMAMUX_REQ_SAI2_B
  • LL_DMAMUX_REQ_OSPI1
  • LL_DMAMUX_REQ_OSPI2
  • LL_DMAMUX_REQ_TIM1_CH1
  • LL_DMAMUX_REQ_TIM1_CH2
  • LL_DMAMUX_REQ_TIM1_CH3
  • LL_DMAMUX_REQ_TIM1_CH4
  • LL_DMAMUX_REQ_TIM1_UP
  • LL_DMAMUX_REQ_TIM1_TRIG
  • LL_DMAMUX_REQ_TIM1_COM
  • LL_DMAMUX_REQ_TIM8_CH1
  • LL_DMAMUX_REQ_TIM8_CH2
  • LL_DMAMUX_REQ_TIM8_CH3
  • LL_DMAMUX_REQ_TIM8_CH4
  • LL_DMAMUX_REQ_TIM8_UP
  • LL_DMAMUX_REQ_TIM8_TRIG
  • LL_DMAMUX_REQ_TIM8_COM
  • LL_DMAMUX_REQ_TIM2_CH1
  • LL_DMAMUX_REQ_TIM2_CH2
  • LL_DMAMUX_REQ_TIM2_CH3
  • LL_DMAMUX_REQ_TIM2_CH4
  • LL_DMAMUX_REQ_TIM2_UP
  • LL_DMAMUX_REQ_TIM3_CH1
  • LL_DMAMUX_REQ_TIM3_CH2
  • LL_DMAMUX_REQ_TIM3_CH3
  • LL_DMAMUX_REQ_TIM3_CH4
  • LL_DMAMUX_REQ_TIM3_UP
  • LL_DMAMUX_REQ_TIM3_TRIG
  • LL_DMAMUX_REQ_TIM4_CH1
  • LL_DMAMUX_REQ_TIM4_CH2
  • LL_DMAMUX_REQ_TIM4_CH3
  • LL_DMAMUX_REQ_TIM4_CH4
  • LL_DMAMUX_REQ_TIM4_UP
  • LL_DMAMUX_REQ_TIM5_CH1
  • LL_DMAMUX_REQ_TIM5_CH2
  • LL_DMAMUX_REQ_TIM5_CH3
  • LL_DMAMUX_REQ_TIM5_CH4
  • LL_DMAMUX_REQ_TIM5_UP
  • LL_DMAMUX_REQ_TIM5_TRIG
  • LL_DMAMUX_REQ_TIM15_CH1
  • LL_DMAMUX_REQ_TIM15_UP
  • LL_DMAMUX_REQ_TIM15_TRIG
  • LL_DMAMUX_REQ_TIM15_COM
  • LL_DMAMUX_REQ_TIM16_CH1
  • LL_DMAMUX_REQ_TIM16_UP
  • LL_DMAMUX_REQ_TIM17_CH1
  • LL_DMAMUX_REQ_TIM17_UP
  • LL_DMAMUX_REQ_DFSDM1_FLT0
  • LL_DMAMUX_REQ_DFSDM1_FLT1
  • LL_DMAMUX_REQ_DFSDM1_FLT2
  • LL_DMAMUX_REQ_DFSDM1_FLT3
  • LL_DMAMUX_REQ_DCMI
  • LL_DMAMUX_REQ_AES_IN
  • LL_DMAMUX_REQ_AES_OUT
  • LL_DMAMUX_REQ_HASH_IN
Parameters
DMAxDMAx Instance
ChannelThis parameter can be one of the following values:
  • LL_DMA_CHANNEL_1
  • LL_DMA_CHANNEL_2
  • LL_DMA_CHANNEL_3
  • LL_DMA_CHANNEL_4
  • LL_DMA_CHANNEL_5
  • LL_DMA_CHANNEL_6
  • LL_DMA_CHANNEL_7
Return values
Returnedvalue can be one of the following values:
  • LL_DMA_REQUEST_0
  • LL_DMA_REQUEST_1
  • LL_DMA_REQUEST_2
  • LL_DMA_REQUEST_3
  • LL_DMA_REQUEST_4
  • LL_DMA_REQUEST_5
  • LL_DMA_REQUEST_6
  • LL_DMA_REQUEST_7

Definition at line 1476 of file stm32l4xx_ll_dma.h.

1477 {
1478  uint32_t dmamux_ccr_offset = ((((uint32_t)DMAx ^ (uint32_t)DMA1) >> 10U) * 7U);
1479  return (READ_BIT((DMAMUX1_Channel0 + Channel + dmamux_ccr_offset)->CCR, DMAMUX_CxCR_DMAREQ_ID));
1480 }

◆ LL_DMA_GetPeriphSize()

__STATIC_INLINE uint32_t LL_DMA_GetPeriphSize ( DMA_TypeDef *  DMAx,
uint32_t  Channel 
)

Get Peripheral size. CCR PSIZE LL_DMA_GetPeriphSize.

Parameters
DMAxDMAx Instance
ChannelThis parameter can be one of the following values:
  • LL_DMA_CHANNEL_1
  • LL_DMA_CHANNEL_2
  • LL_DMA_CHANNEL_3
  • LL_DMA_CHANNEL_4
  • LL_DMA_CHANNEL_5
  • LL_DMA_CHANNEL_6
  • LL_DMA_CHANNEL_7
Return values
Returnedvalue can be one of the following values:
  • LL_DMA_PDATAALIGN_BYTE
  • LL_DMA_PDATAALIGN_HALFWORD
  • LL_DMA_PDATAALIGN_WORD

Definition at line 877 of file stm32l4xx_ll_dma.h.

878 {
879  uint32_t dma_base_addr = (uint32_t)DMAx;
880  return (READ_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR,
881  DMA_CCR_PSIZE));
882 }
static const uint8_t CHANNEL_OFFSET_TAB[]

◆ LL_DMA_IsEnabledChannel()

__STATIC_INLINE uint32_t LL_DMA_IsEnabledChannel ( DMA_TypeDef *  DMAx,
uint32_t  Channel 
)

Check if DMA channel is enabled or disabled. CCR EN LL_DMA_IsEnabledChannel.

Parameters
DMAxDMAx Instance
ChannelThis parameter can be one of the following values:
  • LL_DMA_CHANNEL_1
  • LL_DMA_CHANNEL_2
  • LL_DMA_CHANNEL_3
  • LL_DMA_CHANNEL_4
  • LL_DMA_CHANNEL_5
  • LL_DMA_CHANNEL_6
  • LL_DMA_CHANNEL_7
Return values
Stateof bit (1 or 0).

Definition at line 597 of file stm32l4xx_ll_dma.h.

598 {
599  uint32_t dma_base_addr = (uint32_t)DMAx;
600  return ((READ_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR,
601  DMA_CCR_EN) == (DMA_CCR_EN)) ? 1UL : 0UL);
602 }
static const uint8_t CHANNEL_OFFSET_TAB[]

◆ LL_DMA_SetChannelPriorityLevel()

__STATIC_INLINE void LL_DMA_SetChannelPriorityLevel ( DMA_TypeDef *  DMAx,
uint32_t  Channel,
uint32_t  Priority 
)

Set Channel priority level. CCR PL LL_DMA_SetChannelPriorityLevel.

Parameters
DMAxDMAx Instance
ChannelThis parameter can be one of the following values:
  • LL_DMA_CHANNEL_1
  • LL_DMA_CHANNEL_2
  • LL_DMA_CHANNEL_3
  • LL_DMA_CHANNEL_4
  • LL_DMA_CHANNEL_5
  • LL_DMA_CHANNEL_6
  • LL_DMA_CHANNEL_7
PriorityThis parameter can be one of the following values:
  • LL_DMA_PRIORITY_LOW
  • LL_DMA_PRIORITY_MEDIUM
  • LL_DMA_PRIORITY_HIGH
  • LL_DMA_PRIORITY_VERYHIGH
Return values
None

Definition at line 952 of file stm32l4xx_ll_dma.h.

953 {
954  uint32_t dma_base_addr = (uint32_t)DMAx;
955  MODIFY_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR, DMA_CCR_PL,
956  Priority);
957 }
MODIFY_REG(hrtc->Instance->CR, RTC_CR_WUCKSEL,(uint32_t) WakeUpClock)
static const uint8_t CHANNEL_OFFSET_TAB[]

◆ LL_DMA_SetDataLength()

__STATIC_INLINE void LL_DMA_SetDataLength ( DMA_TypeDef *  DMAx,
uint32_t  Channel,
uint32_t  NbData 
)

Set Number of data to transfer.

Note
This action has no effect if channel is enabled. CNDTR NDT LL_DMA_SetDataLength
Parameters
DMAxDMAx Instance
ChannelThis parameter can be one of the following values:
  • LL_DMA_CHANNEL_1
  • LL_DMA_CHANNEL_2
  • LL_DMA_CHANNEL_3
  • LL_DMA_CHANNEL_4
  • LL_DMA_CHANNEL_5
  • LL_DMA_CHANNEL_6
  • LL_DMA_CHANNEL_7
NbDataBetween Min_Data = 0 and Max_Data = 0x0000FFFF
Return values
None

Definition at line 1001 of file stm32l4xx_ll_dma.h.

1002 {
1003  uint32_t dma_base_addr = (uint32_t)DMAx;
1004  MODIFY_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CNDTR,
1005  DMA_CNDTR_NDT, NbData);
1006 }
MODIFY_REG(hrtc->Instance->CR, RTC_CR_WUCKSEL,(uint32_t) WakeUpClock)
static const uint8_t CHANNEL_OFFSET_TAB[]

◆ LL_DMA_SetDataTransferDirection()

__STATIC_INLINE void LL_DMA_SetDataTransferDirection ( DMA_TypeDef *  DMAx,
uint32_t  Channel,
uint32_t  Direction 
)

Set Data transfer direction (read from peripheral or from memory). CCR DIR LL_DMA_SetDataTransferDirection
CCR MEM2MEM LL_DMA_SetDataTransferDirection.

Parameters
DMAxDMAx Instance
ChannelThis parameter can be one of the following values:
  • LL_DMA_CHANNEL_1
  • LL_DMA_CHANNEL_2
  • LL_DMA_CHANNEL_3
  • LL_DMA_CHANNEL_4
  • LL_DMA_CHANNEL_5
  • LL_DMA_CHANNEL_6
  • LL_DMA_CHANNEL_7
DirectionThis parameter can be one of the following values:
  • LL_DMA_DIRECTION_PERIPH_TO_MEMORY
  • LL_DMA_DIRECTION_MEMORY_TO_PERIPH
  • LL_DMA_DIRECTION_MEMORY_TO_MEMORY
Return values
None

Definition at line 660 of file stm32l4xx_ll_dma.h.

661 {
662  uint32_t dma_base_addr = (uint32_t)DMAx;
663  MODIFY_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR,
664  DMA_CCR_DIR | DMA_CCR_MEM2MEM, Direction);
665 }
MODIFY_REG(hrtc->Instance->CR, RTC_CR_WUCKSEL,(uint32_t) WakeUpClock)
static const uint8_t CHANNEL_OFFSET_TAB[]

◆ LL_DMA_SetM2MDstAddress()

__STATIC_INLINE void LL_DMA_SetM2MDstAddress ( DMA_TypeDef *  DMAx,
uint32_t  Channel,
uint32_t  MemoryAddress 
)

Set the Memory to Memory Destination address.

Note
Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only.
This API must not be called when the DMA channel is enabled. CMAR MA LL_DMA_SetM2MDstAddress
Parameters
DMAxDMAx Instance
ChannelThis parameter can be one of the following values:
  • LL_DMA_CHANNEL_1
  • LL_DMA_CHANNEL_2
  • LL_DMA_CHANNEL_3
  • LL_DMA_CHANNEL_4
  • LL_DMA_CHANNEL_5
  • LL_DMA_CHANNEL_6
  • LL_DMA_CHANNEL_7
MemoryAddressBetween Min_Data = 0 and Max_Data = 0xFFFFFFFF
Return values
None

Definition at line 1200 of file stm32l4xx_ll_dma.h.

1201 {
1202  uint32_t dma_base_addr = (uint32_t)DMAx;
1203  WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CMAR, MemoryAddress);
1204 }
static const uint8_t CHANNEL_OFFSET_TAB[]

◆ LL_DMA_SetM2MSrcAddress()

__STATIC_INLINE void LL_DMA_SetM2MSrcAddress ( DMA_TypeDef *  DMAx,
uint32_t  Channel,
uint32_t  MemoryAddress 
)

Set the Memory to Memory Source address.

Note
Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only.
This API must not be called when the DMA channel is enabled. CPAR PA LL_DMA_SetM2MSrcAddress
Parameters
DMAxDMAx Instance
ChannelThis parameter can be one of the following values:
  • LL_DMA_CHANNEL_1
  • LL_DMA_CHANNEL_2
  • LL_DMA_CHANNEL_3
  • LL_DMA_CHANNEL_4
  • LL_DMA_CHANNEL_5
  • LL_DMA_CHANNEL_6
  • LL_DMA_CHANNEL_7
MemoryAddressBetween Min_Data = 0 and Max_Data = 0xFFFFFFFF
Return values
None

Definition at line 1177 of file stm32l4xx_ll_dma.h.

1178 {
1179  uint32_t dma_base_addr = (uint32_t)DMAx;
1180  WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CPAR, MemoryAddress);
1181 }
static const uint8_t CHANNEL_OFFSET_TAB[]

◆ LL_DMA_SetMemoryAddress()

__STATIC_INLINE void LL_DMA_SetMemoryAddress ( DMA_TypeDef *  DMAx,
uint32_t  Channel,
uint32_t  MemoryAddress 
)

Set the Memory address.

Note
Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMORY_TO_PERIPH only.
This API must not be called when the DMA channel is enabled. CMAR MA LL_DMA_SetMemoryAddress
Parameters
DMAxDMAx Instance
ChannelThis parameter can be one of the following values:
  • LL_DMA_CHANNEL_1
  • LL_DMA_CHANNEL_2
  • LL_DMA_CHANNEL_3
  • LL_DMA_CHANNEL_4
  • LL_DMA_CHANNEL_5
  • LL_DMA_CHANNEL_6
  • LL_DMA_CHANNEL_7
MemoryAddressBetween Min_Data = 0 and Max_Data = 0xFFFFFFFF
Return values
None

Definition at line 1089 of file stm32l4xx_ll_dma.h.

1090 {
1091  uint32_t dma_base_addr = (uint32_t)DMAx;
1092  WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CMAR, MemoryAddress);
1093 }
static const uint8_t CHANNEL_OFFSET_TAB[]

◆ LL_DMA_SetMemoryIncMode()

__STATIC_INLINE void LL_DMA_SetMemoryIncMode ( DMA_TypeDef *  DMAx,
uint32_t  Channel,
uint32_t  MemoryOrM2MDstIncMode 
)

Set Memory increment mode. CCR MINC LL_DMA_SetMemoryIncMode.

Parameters
DMAxDMAx Instance
ChannelThis parameter can be one of the following values:
  • LL_DMA_CHANNEL_1
  • LL_DMA_CHANNEL_2
  • LL_DMA_CHANNEL_3
  • LL_DMA_CHANNEL_4
  • LL_DMA_CHANNEL_5
  • LL_DMA_CHANNEL_6
  • LL_DMA_CHANNEL_7
MemoryOrM2MDstIncModeThis parameter can be one of the following values:
  • LL_DMA_MEMORY_INCREMENT
  • LL_DMA_MEMORY_NOINCREMENT
Return values
None

Definition at line 805 of file stm32l4xx_ll_dma.h.

806 {
807  uint32_t dma_base_addr = (uint32_t)DMAx;
808  MODIFY_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR, DMA_CCR_MINC,
809  MemoryOrM2MDstIncMode);
810 }
MODIFY_REG(hrtc->Instance->CR, RTC_CR_WUCKSEL,(uint32_t) WakeUpClock)
static const uint8_t CHANNEL_OFFSET_TAB[]

◆ LL_DMA_SetMemorySize()

__STATIC_INLINE void LL_DMA_SetMemorySize ( DMA_TypeDef *  DMAx,
uint32_t  Channel,
uint32_t  MemoryOrM2MDstDataSize 
)

Set Memory size. CCR MSIZE LL_DMA_SetMemorySize.

Parameters
DMAxDMAx Instance
ChannelThis parameter can be one of the following values:
  • LL_DMA_CHANNEL_1
  • LL_DMA_CHANNEL_2
  • LL_DMA_CHANNEL_3
  • LL_DMA_CHANNEL_4
  • LL_DMA_CHANNEL_5
  • LL_DMA_CHANNEL_6
  • LL_DMA_CHANNEL_7
MemoryOrM2MDstDataSizeThis parameter can be one of the following values:
  • LL_DMA_MDATAALIGN_BYTE
  • LL_DMA_MDATAALIGN_HALFWORD
  • LL_DMA_MDATAALIGN_WORD
Return values
None

Definition at line 902 of file stm32l4xx_ll_dma.h.

903 {
904  uint32_t dma_base_addr = (uint32_t)DMAx;
905  MODIFY_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR, DMA_CCR_MSIZE,
906  MemoryOrM2MDstDataSize);
907 }
MODIFY_REG(hrtc->Instance->CR, RTC_CR_WUCKSEL,(uint32_t) WakeUpClock)
static const uint8_t CHANNEL_OFFSET_TAB[]

◆ LL_DMA_SetMode()

__STATIC_INLINE void LL_DMA_SetMode ( DMA_TypeDef *  DMAx,
uint32_t  Channel,
uint32_t  Mode 
)

Set DMA mode circular or normal.

Note
The circular buffer mode cannot be used if the memory-to-memory data transfer is configured on the selected Channel. CCR CIRC LL_DMA_SetMode
Parameters
DMAxDMAx Instance
ChannelThis parameter can be one of the following values:
  • LL_DMA_CHANNEL_1
  • LL_DMA_CHANNEL_2
  • LL_DMA_CHANNEL_3
  • LL_DMA_CHANNEL_4
  • LL_DMA_CHANNEL_5
  • LL_DMA_CHANNEL_6
  • LL_DMA_CHANNEL_7
ModeThis parameter can be one of the following values:
  • LL_DMA_MODE_NORMAL
  • LL_DMA_MODE_CIRCULAR
Return values
None

Definition at line 711 of file stm32l4xx_ll_dma.h.

712 {
713  uint32_t dma_base_addr = (uint32_t)DMAx;
714  MODIFY_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR, DMA_CCR_CIRC,
715  Mode);
716 }
MODIFY_REG(hrtc->Instance->CR, RTC_CR_WUCKSEL,(uint32_t) WakeUpClock)
static const uint8_t CHANNEL_OFFSET_TAB[]

◆ LL_DMA_SetPeriphAddress()

__STATIC_INLINE void LL_DMA_SetPeriphAddress ( DMA_TypeDef *  DMAx,
uint32_t  Channel,
uint32_t  PeriphAddress 
)

Set the Peripheral address.

Note
Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMORY_TO_PERIPH only.
This API must not be called when the DMA channel is enabled. CPAR PA LL_DMA_SetPeriphAddress
Parameters
DMAxDMAx Instance
ChannelThis parameter can be one of the following values:
  • LL_DMA_CHANNEL_1
  • LL_DMA_CHANNEL_2
  • LL_DMA_CHANNEL_3
  • LL_DMA_CHANNEL_4
  • LL_DMA_CHANNEL_5
  • LL_DMA_CHANNEL_6
  • LL_DMA_CHANNEL_7
PeriphAddressBetween Min_Data = 0 and Max_Data = 0xFFFFFFFF
Return values
None

Definition at line 1112 of file stm32l4xx_ll_dma.h.

1113 {
1114  uint32_t dma_base_addr = (uint32_t)DMAx;
1115  WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CPAR, PeriphAddress);
1116 }
static const uint8_t CHANNEL_OFFSET_TAB[]

◆ LL_DMA_SetPeriphIncMode()

__STATIC_INLINE void LL_DMA_SetPeriphIncMode ( DMA_TypeDef *  DMAx,
uint32_t  Channel,
uint32_t  PeriphOrM2MSrcIncMode 
)

Set Peripheral increment mode. CCR PINC LL_DMA_SetPeriphIncMode.

Parameters
DMAxDMAx Instance
ChannelThis parameter can be one of the following values:
  • LL_DMA_CHANNEL_1
  • LL_DMA_CHANNEL_2
  • LL_DMA_CHANNEL_3
  • LL_DMA_CHANNEL_4
  • LL_DMA_CHANNEL_5
  • LL_DMA_CHANNEL_6
  • LL_DMA_CHANNEL_7
PeriphOrM2MSrcIncModeThis parameter can be one of the following values:
  • LL_DMA_PERIPH_INCREMENT
  • LL_DMA_PERIPH_NOINCREMENT
Return values
None

Definition at line 758 of file stm32l4xx_ll_dma.h.

759 {
760  uint32_t dma_base_addr = (uint32_t)DMAx;
761  MODIFY_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR, DMA_CCR_PINC,
762  PeriphOrM2MSrcIncMode);
763 }
MODIFY_REG(hrtc->Instance->CR, RTC_CR_WUCKSEL,(uint32_t) WakeUpClock)
static const uint8_t CHANNEL_OFFSET_TAB[]

◆ LL_DMA_SetPeriphRequest()

__STATIC_INLINE void LL_DMA_SetPeriphRequest ( DMA_TypeDef *  DMAx,
uint32_t  Channel,
uint32_t  PeriphRequest 
)

Set DMA request for DMA Channels on DMAMUX Channel x.

Set DMA request for DMA instance on Channel x.

Note
DMAMUX channel 0 to 6 are mapped to DMA1 channel 1 to 7. DMAMUX channel 7 to 13 are mapped to DMA2 channel 1 to 7. CxCR DMAREQ_ID LL_DMA_SetPeriphRequest
Parameters
DMAxDMAx Instance
ChannelThis parameter can be one of the following values:
  • LL_DMA_CHANNEL_1
  • LL_DMA_CHANNEL_2
  • LL_DMA_CHANNEL_3
  • LL_DMA_CHANNEL_4
  • LL_DMA_CHANNEL_5
  • LL_DMA_CHANNEL_6
  • LL_DMA_CHANNEL_7
RequestThis parameter can be one of the following values:
  • LL_DMAMUX_REQ_MEM2MEM
  • LL_DMAMUX_REQ_GENERATOR0
  • LL_DMAMUX_REQ_GENERATOR1
  • LL_DMAMUX_REQ_GENERATOR2
  • LL_DMAMUX_REQ_GENERATOR3
  • LL_DMAMUX_REQ_ADC1
  • LL_DMAMUX_REQ_DAC1_CH1
  • LL_DMAMUX_REQ_DAC1_CH2
  • LL_DMAMUX_REQ_TIM6_UP
  • LL_DMAMUX_REQ_TIM7_UP
  • LL_DMAMUX_REQ_SPI1_RX
  • LL_DMAMUX_REQ_SPI1_TX
  • LL_DMAMUX_REQ_SPI2_RX
  • LL_DMAMUX_REQ_SPI2_TX
  • LL_DMAMUX_REQ_SPI3_RX
  • LL_DMAMUX_REQ_SPI3_TX
  • LL_DMAMUX_REQ_I2C1_RX
  • LL_DMAMUX_REQ_I2C1_TX
  • LL_DMAMUX_REQ_I2C2_RX
  • LL_DMAMUX_REQ_I2C2_TX
  • LL_DMAMUX_REQ_I2C3_RX
  • LL_DMAMUX_REQ_I2C3_TX
  • LL_DMAMUX_REQ_I2C4_RX
  • LL_DMAMUX_REQ_I2C4_TX
  • LL_DMAMUX_REQ_USART1_RX
  • LL_DMAMUX_REQ_USART1_TX
  • LL_DMAMUX_REQ_USART2_RX
  • LL_DMAMUX_REQ_USART2_TX
  • LL_DMAMUX_REQ_USART3_RX
  • LL_DMAMUX_REQ_USART3_TX
  • LL_DMAMUX_REQ_UART4_RX
  • LL_DMAMUX_REQ_UART4_TX
  • LL_DMAMUX_REQ_UART5_RX
  • LL_DMAMUX_REQ_UART5_TX
  • LL_DMAMUX_REQ_LPUART1_RX
  • LL_DMAMUX_REQ_LPUART1_TX
  • LL_DMAMUX_REQ_SAI1_A
  • LL_DMAMUX_REQ_SAI1_B
  • LL_DMAMUX_REQ_SAI2_A
  • LL_DMAMUX_REQ_SAI2_B
  • LL_DMAMUX_REQ_OSPI1
  • LL_DMAMUX_REQ_OSPI2
  • LL_DMAMUX_REQ_TIM1_CH1
  • LL_DMAMUX_REQ_TIM1_CH2
  • LL_DMAMUX_REQ_TIM1_CH3
  • LL_DMAMUX_REQ_TIM1_CH4
  • LL_DMAMUX_REQ_TIM1_UP
  • LL_DMAMUX_REQ_TIM1_TRIG
  • LL_DMAMUX_REQ_TIM1_COM
  • LL_DMAMUX_REQ_TIM8_CH1
  • LL_DMAMUX_REQ_TIM8_CH2
  • LL_DMAMUX_REQ_TIM8_CH3
  • LL_DMAMUX_REQ_TIM8_CH4
  • LL_DMAMUX_REQ_TIM8_UP
  • LL_DMAMUX_REQ_TIM8_TRIG
  • LL_DMAMUX_REQ_TIM8_COM
  • LL_DMAMUX_REQ_TIM2_CH1
  • LL_DMAMUX_REQ_TIM2_CH2
  • LL_DMAMUX_REQ_TIM2_CH3
  • LL_DMAMUX_REQ_TIM2_CH4
  • LL_DMAMUX_REQ_TIM2_UP
  • LL_DMAMUX_REQ_TIM3_CH1
  • LL_DMAMUX_REQ_TIM3_CH2
  • LL_DMAMUX_REQ_TIM3_CH3
  • LL_DMAMUX_REQ_TIM3_CH4
  • LL_DMAMUX_REQ_TIM3_UP
  • LL_DMAMUX_REQ_TIM3_TRIG
  • LL_DMAMUX_REQ_TIM4_CH1
  • LL_DMAMUX_REQ_TIM4_CH2
  • LL_DMAMUX_REQ_TIM4_CH3
  • LL_DMAMUX_REQ_TIM4_CH4
  • LL_DMAMUX_REQ_TIM4_UP
  • LL_DMAMUX_REQ_TIM5_CH1
  • LL_DMAMUX_REQ_TIM5_CH2
  • LL_DMAMUX_REQ_TIM5_CH3
  • LL_DMAMUX_REQ_TIM5_CH4
  • LL_DMAMUX_REQ_TIM5_UP
  • LL_DMAMUX_REQ_TIM5_TRIG
  • LL_DMAMUX_REQ_TIM15_CH1
  • LL_DMAMUX_REQ_TIM15_UP
  • LL_DMAMUX_REQ_TIM15_TRIG
  • LL_DMAMUX_REQ_TIM15_COM
  • LL_DMAMUX_REQ_TIM16_CH1
  • LL_DMAMUX_REQ_TIM16_UP
  • LL_DMAMUX_REQ_TIM17_CH1
  • LL_DMAMUX_REQ_TIM17_UP
  • LL_DMAMUX_REQ_DFSDM1_FLT0
  • LL_DMAMUX_REQ_DFSDM1_FLT1
  • LL_DMAMUX_REQ_DFSDM1_FLT2
  • LL_DMAMUX_REQ_DFSDM1_FLT3
  • LL_DMAMUX_REQ_DCMI
  • LL_DMAMUX_REQ_AES_IN
  • LL_DMAMUX_REQ_AES_OUT
  • LL_DMAMUX_REQ_HASH_IN
Return values
None
Note
Please refer to Reference Manual to get the available mapping of Request value link to Channel Selection. CSELR C1S LL_DMA_SetPeriphRequest
CSELR C2S LL_DMA_SetPeriphRequest
CSELR C3S LL_DMA_SetPeriphRequest
CSELR C4S LL_DMA_SetPeriphRequest
CSELR C5S LL_DMA_SetPeriphRequest
CSELR C6S LL_DMA_SetPeriphRequest
CSELR C7S LL_DMA_SetPeriphRequest
Parameters
DMAxDMAx Instance
ChannelThis parameter can be one of the following values:
  • LL_DMA_CHANNEL_1
  • LL_DMA_CHANNEL_2
  • LL_DMA_CHANNEL_3
  • LL_DMA_CHANNEL_4
  • LL_DMA_CHANNEL_5
  • LL_DMA_CHANNEL_6
  • LL_DMA_CHANNEL_7
PeriphRequestThis parameter can be one of the following values:
  • LL_DMA_REQUEST_0
  • LL_DMA_REQUEST_1
  • LL_DMA_REQUEST_2
  • LL_DMA_REQUEST_3
  • LL_DMA_REQUEST_4
  • LL_DMA_REQUEST_5
  • LL_DMA_REQUEST_6
  • LL_DMA_REQUEST_7
Return values
None

Definition at line 1360 of file stm32l4xx_ll_dma.h.

1361 {
1362  uint32_t dmamux_ccr_offset = ((((uint32_t)DMAx ^ (uint32_t)DMA1) >> 10U) * 7U);
1363  MODIFY_REG((DMAMUX1_Channel0 + Channel + dmamux_ccr_offset)->CCR, DMAMUX_CxCR_DMAREQ_ID, Request);
1364 }
MODIFY_REG(hrtc->Instance->CR, RTC_CR_WUCKSEL,(uint32_t) WakeUpClock)

◆ LL_DMA_SetPeriphSize()

__STATIC_INLINE void LL_DMA_SetPeriphSize ( DMA_TypeDef *  DMAx,
uint32_t  Channel,
uint32_t  PeriphOrM2MSrcDataSize 
)

Set Peripheral size. CCR PSIZE LL_DMA_SetPeriphSize.

Parameters
DMAxDMAx Instance
ChannelThis parameter can be one of the following values:
  • LL_DMA_CHANNEL_1
  • LL_DMA_CHANNEL_2
  • LL_DMA_CHANNEL_3
  • LL_DMA_CHANNEL_4
  • LL_DMA_CHANNEL_5
  • LL_DMA_CHANNEL_6
  • LL_DMA_CHANNEL_7
PeriphOrM2MSrcDataSizeThis parameter can be one of the following values:
  • LL_DMA_PDATAALIGN_BYTE
  • LL_DMA_PDATAALIGN_HALFWORD
  • LL_DMA_PDATAALIGN_WORD
Return values
None

Definition at line 853 of file stm32l4xx_ll_dma.h.

854 {
855  uint32_t dma_base_addr = (uint32_t)DMAx;
856  MODIFY_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR, DMA_CCR_PSIZE,
857  PeriphOrM2MSrcDataSize);
858 }
MODIFY_REG(hrtc->Instance->CR, RTC_CR_WUCKSEL,(uint32_t) WakeUpClock)
static const uint8_t CHANNEL_OFFSET_TAB[]