Extended Peripheral Control functions

Extended Peripheral Control functions. More...

Functions
uint32_t	HAL_PWREx_GetVoltageRange (void)
	Return Voltage Scaling Range. More...
HAL_StatusTypeDef	HAL_PWREx_ControlVoltageScaling (uint32_t VoltageScaling)
	Configure the main internal regulator output voltage. More...
void	HAL_PWREx_EnableBatteryCharging (uint32_t ResistorSelection)
	Enable battery charging. When VDD is present, charge the external battery on VBAT thru an internal resistor. More...
void	HAL_PWREx_DisableBatteryCharging (void)
	Disable battery charging. More...
void	HAL_PWREx_EnableVddUSB (void)
	Enable VDDUSB supply. More...
void	HAL_PWREx_DisableVddUSB (void)
	Disable VDDUSB supply. More...
void	HAL_PWREx_EnableVddIO2 (void)
	Enable VDDIO2 supply. More...
void	HAL_PWREx_DisableVddIO2 (void)
	Disable VDDIO2 supply. More...
void	HAL_PWREx_EnableInternalWakeUpLine (void)
	Enable Internal Wake-up Line. More...
void	HAL_PWREx_DisableInternalWakeUpLine (void)
	Disable Internal Wake-up Line. More...
HAL_StatusTypeDef	HAL_PWREx_EnableGPIOPullUp (uint32_t GPIO, uint32_t GPIONumber)
	Enable GPIO pull-up state in Standby and Shutdown modes. More...
HAL_StatusTypeDef	HAL_PWREx_DisableGPIOPullUp (uint32_t GPIO, uint32_t GPIONumber)
	Disable GPIO pull-up state in Standby mode and Shutdown modes. More...
HAL_StatusTypeDef	HAL_PWREx_EnableGPIOPullDown (uint32_t GPIO, uint32_t GPIONumber)
	Enable GPIO pull-down state in Standby and Shutdown modes. More...
HAL_StatusTypeDef	HAL_PWREx_DisableGPIOPullDown (uint32_t GPIO, uint32_t GPIONumber)
	Disable GPIO pull-down state in Standby and Shutdown modes. More...
void	HAL_PWREx_EnablePullUpPullDownConfig (void)
	Enable pull-up and pull-down configuration. More...
void	HAL_PWREx_DisablePullUpPullDownConfig (void)
	Disable pull-up and pull-down configuration. More...
void	HAL_PWREx_EnableSRAM2ContentRetention (void)
	Enable SRAM2 content retention in Standby mode. More...
void	HAL_PWREx_DisableSRAM2ContentRetention (void)
	Disable SRAM2 content retention in Standby mode. More...
void	HAL_PWREx_EnableSRAM3ContentRetention (void)
	Enable SRAM3 content retention in Stop 2 mode. More...
void	HAL_PWREx_DisableSRAM3ContentRetention (void)
	Disable SRAM3 content retention in Stop 2 mode. More...
void	HAL_PWREx_EnableDSIPinsPDActivation (void)
	Enable pull-down activation on DSI pins. More...
void	HAL_PWREx_DisableDSIPinsPDActivation (void)
	Disable pull-down activation on DSI pins. More...
void	HAL_PWREx_EnablePVM1 (void)
	Enable the Power Voltage Monitoring 1: VDDUSB versus 1.2V. More...
void	HAL_PWREx_DisablePVM1 (void)
	Disable the Power Voltage Monitoring 1: VDDUSB versus 1.2V. More...
void	HAL_PWREx_EnablePVM2 (void)
	Enable the Power Voltage Monitoring 2: VDDIO2 versus 0.9V. More...
void	HAL_PWREx_DisablePVM2 (void)
	Disable the Power Voltage Monitoring 2: VDDIO2 versus 0.9V. More...
void	HAL_PWREx_EnablePVM3 (void)
	Enable the Power Voltage Monitoring 3: VDDA versus 1.62V. More...
void	HAL_PWREx_DisablePVM3 (void)
	Disable the Power Voltage Monitoring 3: VDDA versus 1.62V. More...
void	HAL_PWREx_EnablePVM4 (void)
	Enable the Power Voltage Monitoring 4: VDDA versus 2.2V. More...
void	HAL_PWREx_DisablePVM4 (void)
	Disable the Power Voltage Monitoring 4: VDDA versus 2.2V. More...
HAL_StatusTypeDef	HAL_PWREx_ConfigPVM (PWR_PVMTypeDef *sConfigPVM)
	Configure the Peripheral Voltage Monitoring (PVM). More...
void	HAL_PWREx_EnableBORPVD_ULP (void)
	Enable Ultra Low Power BORL, BORH and PVD for STOP2 and Standby modes. More...
void	HAL_PWREx_DisableBORPVD_ULP (void)
	Disable Ultra Low Power BORL, BORH and PVD for STOP2 and Standby modes. More...
void	HAL_PWREx_EnableExtSMPS_0V95 (void)
	Enable the CFLDO working @ 0.95V. More...
void	HAL_PWREx_DisableExtSMPS_0V95 (void)
	Disable the CFLDO working @ 0.95V. More...
void	HAL_PWREx_EnableLowPowerRunMode (void)
	Enter Low-power Run mode. More...
HAL_StatusTypeDef	HAL_PWREx_DisableLowPowerRunMode (void)
	Exit Low-power Run mode. More...
void	HAL_PWREx_EnterSTOP0Mode (uint8_t STOPEntry)
	Enter Stop 0 mode. More...
void	HAL_PWREx_EnterSTOP1Mode (uint8_t STOPEntry)
	Enter Stop 1 mode. More...
void	HAL_PWREx_EnterSTOP2Mode (uint8_t STOPEntry)
	Enter Stop 2 mode. More...
void	HAL_PWREx_EnterSHUTDOWNMode (void)
	Enter Shutdown mode. More...
void	HAL_PWREx_PVD_PVM_IRQHandler (void)
	This function handles the PWR PVD/PVMx interrupt request. More...
void	HAL_PWREx_PVM1Callback (void)
	PWR PVM1 interrupt callback. More...
void	HAL_PWREx_PVM2Callback (void)
	PWR PVM2 interrupt callback. More...
void	HAL_PWREx_PVM3Callback (void)
	PWR PVM3 interrupt callback. More...
void	HAL_PWREx_PVM4Callback (void)
	PWR PVM4 interrupt callback. More...

Detailed Description

Extended Peripheral Control functions.

 ===============================================================================
              ##### Extended Peripheral Initialization and de-initialization functions #####
 ===============================================================================
    [..]

Function Documentation

HAL_PWREx_ConfigPVM()

HAL_StatusTypeDef HAL_PWREx_ConfigPVM

(

PWR_PVMTypeDef *

sConfigPVM

)

Configure the Peripheral Voltage Monitoring (PVM).

Parameters

sConfigPVM

pointer to a PWR_PVMTypeDef structure that contains the PVM configuration information.

Note

The API configures a single PVM according to the information contained in the input structure. To configure several PVMs, the API must be singly called for each PVM used.

Refer to the electrical characteristics of your device datasheet for more details about the voltage thresholds corresponding to each detection level and to each monitored supply.

Return values

HAL

status

Definition at line 938 of file stm32l4xx_hal_pwr_ex.c.

{
  HAL_StatusTypeDef status = HAL_OK;

  /* Check the parameters */
  assert_param(IS_PWR_PVM_TYPE(sConfigPVM->PVMType));
  assert_param(IS_PWR_PVM_MODE(sConfigPVM->Mode));


  /* Configure EXTI 35 to 38 interrupts if so required:
     scan thru PVMType to detect which PVMx is set and
     configure the corresponding EXTI line accordingly. */
  switch (sConfigPVM->PVMType)
  {
#if defined(PWR_CR2_PVME1)
    case PWR_PVM_1:
      /* Clear any previous config. Keep it clear if no event or IT mode is selected */
      __HAL_PWR_PVM1_EXTI_DISABLE_EVENT();
      __HAL_PWR_PVM1_EXTI_DISABLE_IT();
      __HAL_PWR_PVM1_EXTI_DISABLE_FALLING_EDGE();
      __HAL_PWR_PVM1_EXTI_DISABLE_RISING_EDGE();

      /* Configure interrupt mode */
      if((sConfigPVM->Mode & PVM_MODE_IT) == PVM_MODE_IT)
      {
        __HAL_PWR_PVM1_EXTI_ENABLE_IT();
      }

      /* Configure event mode */
      if((sConfigPVM->Mode & PVM_MODE_EVT) == PVM_MODE_EVT)
      {
        __HAL_PWR_PVM1_EXTI_ENABLE_EVENT();
      }

      /* Configure the edge */
      if((sConfigPVM->Mode & PVM_RISING_EDGE) == PVM_RISING_EDGE)
      {
        __HAL_PWR_PVM1_EXTI_ENABLE_RISING_EDGE();
      }

      if((sConfigPVM->Mode & PVM_FALLING_EDGE) == PVM_FALLING_EDGE)
      {
        __HAL_PWR_PVM1_EXTI_ENABLE_FALLING_EDGE();
      }
      break;
#endif /* PWR_CR2_PVME1 */

#if defined(PWR_CR2_PVME2)
    case PWR_PVM_2:
      /* Clear any previous config. Keep it clear if no event or IT mode is selected */
      __HAL_PWR_PVM2_EXTI_DISABLE_EVENT();
      __HAL_PWR_PVM2_EXTI_DISABLE_IT();
      __HAL_PWR_PVM2_EXTI_DISABLE_FALLING_EDGE();
      __HAL_PWR_PVM2_EXTI_DISABLE_RISING_EDGE();

      /* Configure interrupt mode */
      if((sConfigPVM->Mode & PVM_MODE_IT) == PVM_MODE_IT)
      {
        __HAL_PWR_PVM2_EXTI_ENABLE_IT();
      }

      /* Configure event mode */
      if((sConfigPVM->Mode & PVM_MODE_EVT) == PVM_MODE_EVT)
      {
        __HAL_PWR_PVM2_EXTI_ENABLE_EVENT();
      }

      /* Configure the edge */
      if((sConfigPVM->Mode & PVM_RISING_EDGE) == PVM_RISING_EDGE)
      {
        __HAL_PWR_PVM2_EXTI_ENABLE_RISING_EDGE();
      }

      if((sConfigPVM->Mode & PVM_FALLING_EDGE) == PVM_FALLING_EDGE)
      {
        __HAL_PWR_PVM2_EXTI_ENABLE_FALLING_EDGE();
      }
      break;
#endif /* PWR_CR2_PVME2 */

    case PWR_PVM_3:
      /* Clear any previous config. Keep it clear if no event or IT mode is selected */
      __HAL_PWR_PVM3_EXTI_DISABLE_EVENT();
      __HAL_PWR_PVM3_EXTI_DISABLE_IT();
      __HAL_PWR_PVM3_EXTI_DISABLE_FALLING_EDGE();
      __HAL_PWR_PVM3_EXTI_DISABLE_RISING_EDGE();

      /* Configure interrupt mode */
      if((sConfigPVM->Mode & PVM_MODE_IT) == PVM_MODE_IT)
      {
        __HAL_PWR_PVM3_EXTI_ENABLE_IT();
      }

      /* Configure event mode */
      if((sConfigPVM->Mode & PVM_MODE_EVT) == PVM_MODE_EVT)
      {
        __HAL_PWR_PVM3_EXTI_ENABLE_EVENT();
      }

      /* Configure the edge */
      if((sConfigPVM->Mode & PVM_RISING_EDGE) == PVM_RISING_EDGE)
      {
        __HAL_PWR_PVM3_EXTI_ENABLE_RISING_EDGE();
      }

      if((sConfigPVM->Mode & PVM_FALLING_EDGE) == PVM_FALLING_EDGE)
      {
        __HAL_PWR_PVM3_EXTI_ENABLE_FALLING_EDGE();
      }
      break;

    case PWR_PVM_4:
      /* Clear any previous config. Keep it clear if no event or IT mode is selected */
      __HAL_PWR_PVM4_EXTI_DISABLE_EVENT();
      __HAL_PWR_PVM4_EXTI_DISABLE_IT();
      __HAL_PWR_PVM4_EXTI_DISABLE_FALLING_EDGE();
      __HAL_PWR_PVM4_EXTI_DISABLE_RISING_EDGE();

      /* Configure interrupt mode */
      if((sConfigPVM->Mode & PVM_MODE_IT) == PVM_MODE_IT)
      {
        __HAL_PWR_PVM4_EXTI_ENABLE_IT();
      }

      /* Configure event mode */
      if((sConfigPVM->Mode & PVM_MODE_EVT) == PVM_MODE_EVT)
      {
        __HAL_PWR_PVM4_EXTI_ENABLE_EVENT();
      }

      /* Configure the edge */
      if((sConfigPVM->Mode & PVM_RISING_EDGE) == PVM_RISING_EDGE)
      {
        __HAL_PWR_PVM4_EXTI_ENABLE_RISING_EDGE();
      }

      if((sConfigPVM->Mode & PVM_FALLING_EDGE) == PVM_FALLING_EDGE)
      {
        __HAL_PWR_PVM4_EXTI_ENABLE_FALLING_EDGE();
      }
      break;

    default:
      status = HAL_ERROR;
      break;
  }

  return status;
}

HAL_PWREx_ControlVoltageScaling()

HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling

(

uint32_t

VoltageScaling

)

Configure the main internal regulator output voltage.

Parameters

VoltageScaling

specifies the regulator output voltage to achieve a tradeoff between performance and power consumption. This parameter can be one of the following values: PWR_REGULATOR_VOLTAGE_SCALE1 Regulator voltage output range 1 mode, typical output voltage at 1.2 V, system frequency up to 80 MHz. PWR_REGULATOR_VOLTAGE_SCALE2 Regulator voltage output range 2 mode, typical output voltage at 1.0 V, system frequency up to 26 MHz.

Note

When moving from Range 1 to Range 2, the system frequency must be decreased to a value below 26 MHz before calling HAL_PWREx_ControlVoltageScaling() API. When moving from Range 2 to Range 1, the system frequency can be increased to a value up to 80 MHz after calling HAL_PWREx_ControlVoltageScaling() API. For some devices, the system frequency can be increased up to 120 MHz.

When moving from Range 2 to Range 1, the API waits for VOSF flag to be cleared before returning the status. If the flag is not cleared within 50 microseconds, HAL_TIMEOUT status is reported.

Return values

HAL

Status

Definition at line 164 of file stm32l4xx_hal_pwr_ex.c.

{
  uint32_t wait_loop_index;

  assert_param(IS_PWR_VOLTAGE_SCALING_RANGE(VoltageScaling));

#if defined(PWR_CR5_R1MODE)
  if (VoltageScaling == PWR_REGULATOR_VOLTAGE_SCALE1_BOOST)
  {
    /* If current range is range 2 */
    if (READ_BIT(PWR->CR1, PWR_CR1_VOS) == PWR_REGULATOR_VOLTAGE_SCALE2)
    {
      /* Make sure Range 1 Boost is enabled */
      CLEAR_BIT(PWR->CR5, PWR_CR5_R1MODE);

      /* Set Range 1 */
      MODIFY_REG(PWR->CR1, PWR_CR1_VOS, PWR_REGULATOR_VOLTAGE_SCALE1);

      /* Wait until VOSF is cleared */
      wait_loop_index = ((PWR_FLAG_SETTING_DELAY_US * SystemCoreClock) / 1000000U) + 1;
      while ((HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) && (wait_loop_index != 0U))
      {
        wait_loop_index--;
      }
      if (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF))
      {
        return HAL_TIMEOUT;
      }
    }
    /* If current range is range 1 normal or boost mode */
    else
    {
      /* Enable Range 1 Boost (no issue if bit already reset) */
      CLEAR_BIT(PWR->CR5, PWR_CR5_R1MODE);
    }
  }
  else if (VoltageScaling == PWR_REGULATOR_VOLTAGE_SCALE1)
  {
    /* If current range is range 2 */
    if (READ_BIT(PWR->CR1, PWR_CR1_VOS) == PWR_REGULATOR_VOLTAGE_SCALE2)
    {
      /* Make sure Range 1 Boost is disabled */
      SET_BIT(PWR->CR5, PWR_CR5_R1MODE);

      /* Set Range 1 */
      MODIFY_REG(PWR->CR1, PWR_CR1_VOS, PWR_REGULATOR_VOLTAGE_SCALE1);

      /* Wait until VOSF is cleared */
      wait_loop_index = ((PWR_FLAG_SETTING_DELAY_US * SystemCoreClock) / 1000000U) + 1;
      while ((HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) && (wait_loop_index != 0U))
      {
        wait_loop_index--;
      }
      if (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF))
      {
        return HAL_TIMEOUT;
      }
    }
     /* If current range is range 1 normal or boost mode */
    else
    {
      /* Disable Range 1 Boost (no issue if bit already set) */
      SET_BIT(PWR->CR5, PWR_CR5_R1MODE);
    }
  }
  else
  {
    /* Set Range 2 */
    MODIFY_REG(PWR->CR1, PWR_CR1_VOS, PWR_REGULATOR_VOLTAGE_SCALE2);
    /* No need to wait for VOSF to be cleared for this transition */
    /* PWR_CR5_R1MODE bit setting has no effect in Range 2        */
  }

#else

  /* If Set Range 1 */
  if (VoltageScaling == PWR_REGULATOR_VOLTAGE_SCALE1)
  {
    if (READ_BIT(PWR->CR1, PWR_CR1_VOS) != PWR_REGULATOR_VOLTAGE_SCALE1)
    {
      /* Set Range 1 */
      MODIFY_REG(PWR->CR1, PWR_CR1_VOS, PWR_REGULATOR_VOLTAGE_SCALE1);

      /* Wait until VOSF is cleared */
      wait_loop_index = ((PWR_FLAG_SETTING_DELAY_US * SystemCoreClock) / 1000000U) + 1U;
      while ((HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) && (wait_loop_index != 0U))
      {
        wait_loop_index--;
      }
      if (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF))
      {
        return HAL_TIMEOUT;
      }
    }
  }
  else
  {
    if (READ_BIT(PWR->CR1, PWR_CR1_VOS) != PWR_REGULATOR_VOLTAGE_SCALE2)
    {
      /* Set Range 2 */
      MODIFY_REG(PWR->CR1, PWR_CR1_VOS, PWR_REGULATOR_VOLTAGE_SCALE2);
      /* No need to wait for VOSF to be cleared for this transition */
    }
  }
#endif

  return HAL_OK;
}

HAL_PWREx_DisableBatteryCharging()

void HAL_PWREx_DisableBatteryCharging

(

void

)

Disable battery charging.

Return values

None

Definition at line 299 of file stm32l4xx_hal_pwr_ex.c.

{
  CLEAR_BIT(PWR->CR4, PWR_CR4_VBE);
}

HAL_PWREx_DisableBORPVD_ULP()

void HAL_PWREx_DisableBORPVD_ULP

(

void

)

Disable Ultra Low Power BORL, BORH and PVD for STOP2 and Standby modes.

Note

All the other modes are not affected by this bit

Return values

None

Definition at line 765 of file stm32l4xx_hal_pwr_ex.c.

{
  CLEAR_BIT(PWR->CR3, PWR_CR3_ENULP);
}

HAL_PWREx_DisableDSIPinsPDActivation()

void HAL_PWREx_DisableDSIPinsPDActivation

(

void

)

Disable pull-down activation on DSI pins.

Return values

None

Definition at line 838 of file stm32l4xx_hal_pwr_ex.c.

{
  CLEAR_BIT(PWR->CR3, PWR_CR3_DSIPDEN);
}

HAL_PWREx_DisableExtSMPS_0V95()

void HAL_PWREx_DisableExtSMPS_0V95

(

void

)

Disable the CFLDO working @ 0.95V.

Note

Before SMPS is switched off, the regulated voltage of the internal CFLDO shall be set to 1.00V. 1.00V. is also default operating Range 2 voltage.

Return values

None

Definition at line 791 of file stm32l4xx_hal_pwr_ex.c.

{
  CLEAR_BIT(PWR->CR4, PWR_CR4_EXT_SMPS_ON);
}

HAL_PWREx_DisableGPIOPullDown()

HAL_StatusTypeDef HAL_PWREx_DisableGPIOPullDown	(	uint32_t	GPIO,
		uint32_t	GPIONumber
	)

Disable GPIO pull-down state in Standby and Shutdown modes.

Note

Reset the relevant PDy bits of PWR_PDCRx register used to configure the I/O in pull-down state in Standby and Shutdown modes.

Even if a PDy bit to reset is reserved, the other PDy bits entered as input parameter at the same time are reset.

Parameters

GPIO	Specifies the IO port. This parameter can be PWR_GPIO_A..PWR_GPIO_H (or PWR_GPIO_I depending on the devices) to select the GPIO peripheral.
GPIONumber	Specify the I/O pins numbers. This parameter can be one of the following values: PWR_GPIO_BIT_0, ..., PWR_GPIO_BIT_15 (except for the port where less I/O pins are available) or the logical OR of several of them to reset several bits for a given port in a single API call.

Return values

HAL

Status

Definition at line 635 of file stm32l4xx_hal_pwr_ex.c.

{
  HAL_StatusTypeDef status = HAL_OK;

  assert_param(IS_PWR_GPIO(GPIO));
  assert_param(IS_PWR_GPIO_BIT_NUMBER(GPIONumber));

  switch (GPIO)
  {
    case PWR_GPIO_A:
       CLEAR_BIT(PWR->PDCRA, (GPIONumber & (~(PWR_GPIO_BIT_13|PWR_GPIO_BIT_15))));
       break;
    case PWR_GPIO_B:
       CLEAR_BIT(PWR->PDCRB, (GPIONumber & (~(PWR_GPIO_BIT_4))));
       break;
    case PWR_GPIO_C:
       CLEAR_BIT(PWR->PDCRC, GPIONumber);
       break;
#if defined(GPIOD)
    case PWR_GPIO_D:
       CLEAR_BIT(PWR->PDCRD, GPIONumber);
       break;
#endif
#if defined(GPIOE)
    case PWR_GPIO_E:
       CLEAR_BIT(PWR->PDCRE, GPIONumber);
       break;
#endif
#if defined(GPIOF)
    case PWR_GPIO_F:
       CLEAR_BIT(PWR->PDCRF, GPIONumber);
       break;
#endif
#if defined(GPIOG)
    case PWR_GPIO_G:
       CLEAR_BIT(PWR->PDCRG, GPIONumber);
       break;
#endif
    case PWR_GPIO_H:
#if defined (STM32L496xx) || defined (STM32L4A6xx)
       CLEAR_BIT(PWR->PDCRH, ((GPIONumber & PWR_PORTH_AVAILABLE_PINS) & (~(PWR_GPIO_BIT_3))));
#else
       CLEAR_BIT(PWR->PDCRH, (GPIONumber & PWR_PORTH_AVAILABLE_PINS));
#endif
       break;
#if defined(GPIOI)
    case PWR_GPIO_I:
       CLEAR_BIT(PWR->PDCRI, (GPIONumber & PWR_PORTI_AVAILABLE_PINS));
       break;
#endif
    default:
      status = HAL_ERROR;
      break;
  }

  return status;
}

HAL_PWREx_DisableGPIOPullUp()

HAL_StatusTypeDef HAL_PWREx_DisableGPIOPullUp	(	uint32_t	GPIO,
		uint32_t	GPIONumber
	)

Disable GPIO pull-up state in Standby mode and Shutdown modes.

Note

Reset the relevant PUy bits of PWR_PUCRx register used to configure the I/O in pull-up state in Standby and Shutdown modes.

Even if a PUy bit to reset is reserved, the other PUy bits entered as input parameter at the same time are reset.

Parameters

GPIO	Specifies the IO port. This parameter can be PWR_GPIO_A, ..., PWR_GPIO_H (or PWR_GPIO_I depending on the devices) to select the GPIO peripheral.
GPIONumber	Specify the I/O pins numbers. This parameter can be one of the following values: PWR_GPIO_BIT_0, ..., PWR_GPIO_BIT_15 (except for the port where less I/O pins are available) or the logical OR of several of them to reset several bits for a given port in a single API call.

Return values

HAL

Status

Definition at line 475 of file stm32l4xx_hal_pwr_ex.c.

{
  HAL_StatusTypeDef status = HAL_OK;

  assert_param(IS_PWR_GPIO(GPIO));
  assert_param(IS_PWR_GPIO_BIT_NUMBER(GPIONumber));

  switch (GPIO)
  {
    case PWR_GPIO_A:
       CLEAR_BIT(PWR->PUCRA, (GPIONumber & (~(PWR_GPIO_BIT_14))));
       break;
    case PWR_GPIO_B:
       CLEAR_BIT(PWR->PUCRB, GPIONumber);
       break;
    case PWR_GPIO_C:
       CLEAR_BIT(PWR->PUCRC, GPIONumber);
       break;
#if defined(GPIOD)
    case PWR_GPIO_D:
       CLEAR_BIT(PWR->PUCRD, GPIONumber);
       break;
#endif
#if defined(GPIOE)
    case PWR_GPIO_E:
       CLEAR_BIT(PWR->PUCRE, GPIONumber);
       break;
#endif
#if defined(GPIOF)
    case PWR_GPIO_F:
       CLEAR_BIT(PWR->PUCRF, GPIONumber);
       break;
#endif
#if defined(GPIOG)
    case PWR_GPIO_G:
       CLEAR_BIT(PWR->PUCRG, GPIONumber);
       break;
#endif
    case PWR_GPIO_H:
       CLEAR_BIT(PWR->PUCRH, (GPIONumber & PWR_PORTH_AVAILABLE_PINS));
       break;
#if defined(GPIOI)
    case PWR_GPIO_I:
       CLEAR_BIT(PWR->PUCRI, (GPIONumber & PWR_PORTI_AVAILABLE_PINS));
       break;
#endif
    default:
       status = HAL_ERROR;
       break;
  }

  return status;
}

HAL_PWREx_DisableInternalWakeUpLine()

void HAL_PWREx_DisableInternalWakeUpLine

(

void

)

Disable Internal Wake-up Line.

Return values

None

Definition at line 364 of file stm32l4xx_hal_pwr_ex.c.

{
  CLEAR_BIT(PWR->CR3, PWR_CR3_EIWF);
}

HAL_PWREx_DisableLowPowerRunMode()

HAL_StatusTypeDef HAL_PWREx_DisableLowPowerRunMode

(

void

)

Exit Low-power Run mode.

Note

Before HAL_PWREx_DisableLowPowerRunMode() completion, the function checks that REGLPF has been properly reset (otherwise, HAL_PWREx_DisableLowPowerRunMode returns HAL_TIMEOUT status). The system clock frequency can then be increased above 2 MHz.

Return values

HAL

Status

Definition at line 1115 of file stm32l4xx_hal_pwr_ex.c.

{
  uint32_t wait_loop_index;

  /* Clear LPR bit */
  CLEAR_BIT(PWR->CR1, PWR_CR1_LPR);

  /* Wait until REGLPF is reset */
  wait_loop_index = ((PWR_FLAG_SETTING_DELAY_US * SystemCoreClock) / 1000000U) + 1U;
  while ((HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_REGLPF)) && (wait_loop_index != 0U))
  {
    wait_loop_index--;
  }
  if (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_REGLPF))
  {
    return HAL_TIMEOUT;
  }

  return HAL_OK;
}

HAL_PWREx_DisablePullUpPullDownConfig()

void HAL_PWREx_DisablePullUpPullDownConfig

(

void

)

Disable pull-up and pull-down configuration.

Note

When APC bit is cleared, the I/O pull-up and pull-down configurations defined in PWR_PUCRx and PWR_PDCRx registers are not applied in Standby and Shutdown modes.

Return values

None

Definition at line 717 of file stm32l4xx_hal_pwr_ex.c.

{
  CLEAR_BIT(PWR->CR3, PWR_CR3_APC);
}

HAL_PWREx_DisablePVM1()

void HAL_PWREx_DisablePVM1

(

void

)

Disable the Power Voltage Monitoring 1: VDDUSB versus 1.2V.

Return values

None

Definition at line 858 of file stm32l4xx_hal_pwr_ex.c.

{
  CLEAR_BIT(PWR->CR2, PWR_PVM_1);
}

HAL_PWREx_DisablePVM2()

void HAL_PWREx_DisablePVM2

(

void

)

Disable the Power Voltage Monitoring 2: VDDIO2 versus 0.9V.

Return values

None

Definition at line 879 of file stm32l4xx_hal_pwr_ex.c.

{
  CLEAR_BIT(PWR->CR2, PWR_PVM_2);
}

HAL_PWREx_DisablePVM3()

void HAL_PWREx_DisablePVM3

(

void

)

Disable the Power Voltage Monitoring 3: VDDA versus 1.62V.

Return values

None

Definition at line 899 of file stm32l4xx_hal_pwr_ex.c.

{
  CLEAR_BIT(PWR->CR2, PWR_PVM_3);
}

HAL_PWREx_DisablePVM4()

void HAL_PWREx_DisablePVM4

(

void

)

Disable the Power Voltage Monitoring 4: VDDA versus 2.2V.

Return values

None

Definition at line 918 of file stm32l4xx_hal_pwr_ex.c.

{
  CLEAR_BIT(PWR->CR2, PWR_PVM_4);
}

HAL_PWREx_DisableSRAM2ContentRetention()

void HAL_PWREx_DisableSRAM2ContentRetention

(

void

)

Disable SRAM2 content retention in Standby mode.

Note

When RRS bit is reset, SRAM2 is powered off in Standby mode and its content is lost.

Return values

None

Definition at line 742 of file stm32l4xx_hal_pwr_ex.c.

{
  CLEAR_BIT(PWR->CR3, PWR_CR3_RRS);
}

HAL_PWREx_DisableSRAM3ContentRetention()

void HAL_PWREx_DisableSRAM3ContentRetention

(

void

)

Disable SRAM3 content retention in Stop 2 mode.

Note

When RRSTP bit is reset, SRAM3 is powered off in Stop 2 mode and its content is lost.

Return values

None

Definition at line 817 of file stm32l4xx_hal_pwr_ex.c.

{
  CLEAR_BIT(PWR->CR1, PWR_CR1_RRSTP);
}

HAL_PWREx_DisableVddIO2()

void HAL_PWREx_DisableVddIO2

(

void

)

Disable VDDIO2 supply.

Return values

None

Definition at line 343 of file stm32l4xx_hal_pwr_ex.c.

{
  CLEAR_BIT(PWR->CR2, PWR_CR2_IOSV);
}

HAL_PWREx_DisableVddUSB()

void HAL_PWREx_DisableVddUSB

(

void

)

Disable VDDUSB supply.

Return values

None

Definition at line 321 of file stm32l4xx_hal_pwr_ex.c.

{
  CLEAR_BIT(PWR->CR2, PWR_CR2_USV);
}

HAL_PWREx_EnableBatteryCharging()

void HAL_PWREx_EnableBatteryCharging

(

uint32_t

ResistorSelection

)

Enable battery charging. When VDD is present, charge the external battery on VBAT thru an internal resistor.

Parameters

ResistorSelection

specifies the resistor impedance. This parameter can be one of the following values: PWR_BATTERY_CHARGING_RESISTOR_5 5 kOhms resistor PWR_BATTERY_CHARGING_RESISTOR_1_5 1.5 kOhms resistor

Return values

None

Definition at line 283 of file stm32l4xx_hal_pwr_ex.c.

{
  assert_param(IS_PWR_BATTERY_RESISTOR_SELECT(ResistorSelection));

  /* Specify resistor selection */
  MODIFY_REG(PWR->CR4, PWR_CR4_VBRS, ResistorSelection);

  /* Enable battery charging */
  SET_BIT(PWR->CR4, PWR_CR4_VBE);
}

HAL_PWREx_EnableBORPVD_ULP()

void HAL_PWREx_EnableBORPVD_ULP

(

void

)

Enable Ultra Low Power BORL, BORH and PVD for STOP2 and Standby modes.

Note

All the other modes are not affected by this bit.

Return values

None

Definition at line 754 of file stm32l4xx_hal_pwr_ex.c.

{
  SET_BIT(PWR->CR3, PWR_CR3_ENULP);
}

HAL_PWREx_EnableDSIPinsPDActivation()

void HAL_PWREx_EnableDSIPinsPDActivation

(

void

)

Enable pull-down activation on DSI pins.

Return values

None

Definition at line 828 of file stm32l4xx_hal_pwr_ex.c.

{
  SET_BIT(PWR->CR3, PWR_CR3_DSIPDEN);
}

HAL_PWREx_EnableExtSMPS_0V95()

void HAL_PWREx_EnableExtSMPS_0V95

(

void

)

Enable the CFLDO working @ 0.95V.

Note

When external SMPS is used & CFLDO operating in Range 2, the regulated voltage of the internal CFLDO can be reduced to 0.95V.

Return values

None

Definition at line 779 of file stm32l4xx_hal_pwr_ex.c.

{
  SET_BIT(PWR->CR4, PWR_CR4_EXT_SMPS_ON);
}

HAL_PWREx_EnableGPIOPullDown()

HAL_StatusTypeDef HAL_PWREx_EnableGPIOPullDown	(	uint32_t	GPIO,
		uint32_t	GPIONumber
	)

Enable GPIO pull-down state in Standby and Shutdown modes.

Note

Set the relevant PDy bits of PWR_PDCRx register to configure the I/O in pull-down state in Standby and Shutdown modes.

This state is effective in Standby and Shutdown modes only if APC bit is set through HAL_PWREx_EnablePullUpPullDownConfig() API.

The configuration is lost when exiting the Shutdown mode due to the power-on reset, maintained when exiting the Standby mode.

To avoid any conflict at Standby and Shutdown modes exits, the corresponding PUy bit of PWR_PUCRx register is cleared unless it is reserved.

Even if a PDy bit to set is reserved, the other PDy bits entered as input parameter at the same time are set.

Parameters

GPIO	Specify the IO port. This parameter can be PWR_GPIO_A..PWR_GPIO_H (or PWR_GPIO_I depending on the devices) to select the GPIO peripheral.
GPIONumber	Specify the I/O pins numbers. This parameter can be one of the following values: PWR_GPIO_BIT_0, ..., PWR_GPIO_BIT_15 (except for the port where less I/O pins are available) or the logical OR of several of them to set several bits for a given port in a single API call.

Return values

HAL

Status

Definition at line 552 of file stm32l4xx_hal_pwr_ex.c.

{
  HAL_StatusTypeDef status = HAL_OK;

  assert_param(IS_PWR_GPIO(GPIO));
  assert_param(IS_PWR_GPIO_BIT_NUMBER(GPIONumber));

  switch (GPIO)
  {
    case PWR_GPIO_A:
       SET_BIT(PWR->PDCRA, (GPIONumber & (~(PWR_GPIO_BIT_13|PWR_GPIO_BIT_15))));
       CLEAR_BIT(PWR->PUCRA, (GPIONumber & (~(PWR_GPIO_BIT_14))));
       break;
    case PWR_GPIO_B:
       SET_BIT(PWR->PDCRB, (GPIONumber & (~(PWR_GPIO_BIT_4))));
       CLEAR_BIT(PWR->PUCRB, GPIONumber);
       break;
    case PWR_GPIO_C:
       SET_BIT(PWR->PDCRC, GPIONumber);
       CLEAR_BIT(PWR->PUCRC, GPIONumber);
       break;
#if defined(GPIOD)
    case PWR_GPIO_D:
       SET_BIT(PWR->PDCRD, GPIONumber);
       CLEAR_BIT(PWR->PUCRD, GPIONumber);
       break;
#endif
#if defined(GPIOE)
    case PWR_GPIO_E:
       SET_BIT(PWR->PDCRE, GPIONumber);
       CLEAR_BIT(PWR->PUCRE, GPIONumber);
       break;
#endif
#if defined(GPIOF)
    case PWR_GPIO_F:
       SET_BIT(PWR->PDCRF, GPIONumber);
       CLEAR_BIT(PWR->PUCRF, GPIONumber);
       break;
#endif
#if defined(GPIOG)
    case PWR_GPIO_G:
       SET_BIT(PWR->PDCRG, GPIONumber);
       CLEAR_BIT(PWR->PUCRG, GPIONumber);
       break;
#endif
    case PWR_GPIO_H:
#if defined (STM32L496xx) || defined (STM32L4A6xx)
       SET_BIT(PWR->PDCRH, ((GPIONumber & PWR_PORTH_AVAILABLE_PINS) & (~(PWR_GPIO_BIT_3))));
#else
       SET_BIT(PWR->PDCRH, (GPIONumber & PWR_PORTH_AVAILABLE_PINS));
#endif
       CLEAR_BIT(PWR->PUCRH, (GPIONumber & PWR_PORTH_AVAILABLE_PINS));
       break;
#if defined(GPIOI)
    case PWR_GPIO_I:
       SET_BIT(PWR->PDCRI, (GPIONumber & PWR_PORTI_AVAILABLE_PINS));
       CLEAR_BIT(PWR->PUCRI, (GPIONumber & PWR_PORTI_AVAILABLE_PINS));
       break;
#endif
    default:
      status = HAL_ERROR;
      break;
  }

  return status;
}

HAL_PWREx_EnableGPIOPullUp()

HAL_StatusTypeDef HAL_PWREx_EnableGPIOPullUp	(	uint32_t	GPIO,
		uint32_t	GPIONumber
	)

Enable GPIO pull-up state in Standby and Shutdown modes.

Note

Set the relevant PUy bits of PWR_PUCRx register to configure the I/O in pull-up state in Standby and Shutdown modes.

This state is effective in Standby and Shutdown modes only if APC bit is set through HAL_PWREx_EnablePullUpPullDownConfig() API.

The configuration is lost when exiting the Shutdown mode due to the power-on reset, maintained when exiting the Standby mode.

To avoid any conflict at Standby and Shutdown modes exits, the corresponding PDy bit of PWR_PDCRx register is cleared unless it is reserved.

Even if a PUy bit to set is reserved, the other PUy bits entered as input parameter at the same time are set.

Parameters

GPIO	Specify the IO port. This parameter can be PWR_GPIO_A, ..., PWR_GPIO_H (or PWR_GPIO_I depending on the devices) to select the GPIO peripheral.
GPIONumber	Specify the I/O pins numbers. This parameter can be one of the following values: PWR_GPIO_BIT_0, ..., PWR_GPIO_BIT_15 (except for the port where less I/O pins are available) or the logical OR of several of them to set several bits for a given port in a single API call.

Return values

HAL

Status

Definition at line 392 of file stm32l4xx_hal_pwr_ex.c.

{
  HAL_StatusTypeDef status = HAL_OK;

  assert_param(IS_PWR_GPIO(GPIO));
  assert_param(IS_PWR_GPIO_BIT_NUMBER(GPIONumber));

  switch (GPIO)
  {
    case PWR_GPIO_A:
       SET_BIT(PWR->PUCRA, (GPIONumber & (~(PWR_GPIO_BIT_14))));
       CLEAR_BIT(PWR->PDCRA, (GPIONumber & (~(PWR_GPIO_BIT_13|PWR_GPIO_BIT_15))));
       break;
    case PWR_GPIO_B:
       SET_BIT(PWR->PUCRB, GPIONumber);
       CLEAR_BIT(PWR->PDCRB, (GPIONumber & (~(PWR_GPIO_BIT_4))));
       break;
    case PWR_GPIO_C:
       SET_BIT(PWR->PUCRC, GPIONumber);
       CLEAR_BIT(PWR->PDCRC, GPIONumber);
       break;
#if defined(GPIOD)
    case PWR_GPIO_D:
       SET_BIT(PWR->PUCRD, GPIONumber);
       CLEAR_BIT(PWR->PDCRD, GPIONumber);
       break;
#endif
#if defined(GPIOE)
    case PWR_GPIO_E:
       SET_BIT(PWR->PUCRE, GPIONumber);
       CLEAR_BIT(PWR->PDCRE, GPIONumber);
       break;
#endif
#if defined(GPIOF)
    case PWR_GPIO_F:
       SET_BIT(PWR->PUCRF, GPIONumber);
       CLEAR_BIT(PWR->PDCRF, GPIONumber);
       break;
#endif
#if defined(GPIOG)
    case PWR_GPIO_G:
       SET_BIT(PWR->PUCRG, GPIONumber);
       CLEAR_BIT(PWR->PDCRG, GPIONumber);
       break;
#endif
    case PWR_GPIO_H:
       SET_BIT(PWR->PUCRH, (GPIONumber & PWR_PORTH_AVAILABLE_PINS));
#if defined (STM32L496xx) || defined (STM32L4A6xx)
       CLEAR_BIT(PWR->PDCRH, ((GPIONumber & PWR_PORTH_AVAILABLE_PINS) & (~(PWR_GPIO_BIT_3))));
#else
       CLEAR_BIT(PWR->PDCRH, (GPIONumber & PWR_PORTH_AVAILABLE_PINS));
#endif
       break;
#if defined(GPIOI)
    case PWR_GPIO_I:
       SET_BIT(PWR->PUCRI, (GPIONumber & PWR_PORTI_AVAILABLE_PINS));
       CLEAR_BIT(PWR->PDCRI, (GPIONumber & PWR_PORTI_AVAILABLE_PINS));
       break;
#endif
    default:
      status = HAL_ERROR;
      break;
  }

  return status;
}

HAL_PWREx_EnableInternalWakeUpLine()

void HAL_PWREx_EnableInternalWakeUpLine

(

void

)

Enable Internal Wake-up Line.

Return values

None

Definition at line 354 of file stm32l4xx_hal_pwr_ex.c.

{
  SET_BIT(PWR->CR3, PWR_CR3_EIWF);
}

HAL_PWREx_EnableLowPowerRunMode()

void HAL_PWREx_EnableLowPowerRunMode

(

void

)

Enter Low-power Run mode.

Note

In Low-power Run mode, all I/O pins keep the same state as in Run mode.

When Regulator is set to PWR_LOWPOWERREGULATOR_ON, the user can optionally configure the Flash in power-down monde in setting the RUN_PD bit in FLASH_ACR register. Additionally, the clock frequency must be reduced below 2 MHz. Setting RUN_PD in FLASH_ACR then appropriately reducing the clock frequency must be done before calling HAL_PWREx_EnableLowPowerRunMode() API.

Return values

None

Definition at line 1100 of file stm32l4xx_hal_pwr_ex.c.

{
  /* Set Regulator parameter */
  SET_BIT(PWR->CR1, PWR_CR1_LPR);
}

HAL_PWREx_EnablePullUpPullDownConfig()

void HAL_PWREx_EnablePullUpPullDownConfig

(

void

)

Enable pull-up and pull-down configuration.

Note

When APC bit is set, the I/O pull-up and pull-down configurations defined in PWR_PUCRx and PWR_PDCRx registers are applied in Standby and Shutdown modes.

Pull-up set by PUy bit of PWR_PUCRx register is not activated if the corresponding PDy bit of PWR_PDCRx register is also set (pull-down configuration priority is higher). HAL_PWREx_EnableGPIOPullUp() and HAL_PWREx_EnableGPIOPullDown() API's ensure there is no conflict when setting PUy or PDy bit.

Return values

None

Definition at line 705 of file stm32l4xx_hal_pwr_ex.c.

{
  SET_BIT(PWR->CR3, PWR_CR3_APC);
}

HAL_PWREx_EnablePVM1()

void HAL_PWREx_EnablePVM1

(

void

)

Enable the Power Voltage Monitoring 1: VDDUSB versus 1.2V.

Return values

None

Definition at line 849 of file stm32l4xx_hal_pwr_ex.c.

{
  SET_BIT(PWR->CR2, PWR_PVM_1);
}

HAL_PWREx_EnablePVM2()

void HAL_PWREx_EnablePVM2

(

void

)

Enable the Power Voltage Monitoring 2: VDDIO2 versus 0.9V.

Return values

None

Definition at line 870 of file stm32l4xx_hal_pwr_ex.c.

{
  SET_BIT(PWR->CR2, PWR_PVM_2);
}

HAL_PWREx_EnablePVM3()

void HAL_PWREx_EnablePVM3

(

void

)

Enable the Power Voltage Monitoring 3: VDDA versus 1.62V.

Return values

None

Definition at line 890 of file stm32l4xx_hal_pwr_ex.c.

{
  SET_BIT(PWR->CR2, PWR_PVM_3);
}

HAL_PWREx_EnablePVM4()

void HAL_PWREx_EnablePVM4

(

void

)

Enable the Power Voltage Monitoring 4: VDDA versus 2.2V.

Return values

None

Definition at line 909 of file stm32l4xx_hal_pwr_ex.c.

{
  SET_BIT(PWR->CR2, PWR_PVM_4);
}

HAL_PWREx_EnableSRAM2ContentRetention()

void HAL_PWREx_EnableSRAM2ContentRetention

(

void

)

Enable SRAM2 content retention in Standby mode.

Note

When RRS bit is set, SRAM2 is powered by the low-power regulator in Standby mode and its content is kept.

Return values

None

Definition at line 730 of file stm32l4xx_hal_pwr_ex.c.

{
  SET_BIT(PWR->CR3, PWR_CR3_RRS);
}

HAL_PWREx_EnableSRAM3ContentRetention()

void HAL_PWREx_EnableSRAM3ContentRetention

(

void

)

Enable SRAM3 content retention in Stop 2 mode.

Note

When RRSTP bit is set, SRAM3 is powered by the low-power regulator in Stop 2 mode and its content is kept.

Return values

None

Definition at line 805 of file stm32l4xx_hal_pwr_ex.c.

{
  SET_BIT(PWR->CR1, PWR_CR1_RRSTP);
}

HAL_PWREx_EnableVddIO2()

void HAL_PWREx_EnableVddIO2

(

void

)

Enable VDDIO2 supply.

Note

Remove VDDIO2 electrical and logical isolation, once VDDIO2 supply is present.

Return values

None

Definition at line 333 of file stm32l4xx_hal_pwr_ex.c.

{
  SET_BIT(PWR->CR2, PWR_CR2_IOSV);
}

HAL_PWREx_EnableVddUSB()

void HAL_PWREx_EnableVddUSB

(

void

)

Enable VDDUSB supply.

Note

Remove VDDUSB electrical and logical isolation, once VDDUSB supply is present.

Return values

None

Definition at line 311 of file stm32l4xx_hal_pwr_ex.c.

{
  SET_BIT(PWR->CR2, PWR_CR2_USV);
}

HAL_PWREx_EnterSHUTDOWNMode()

void HAL_PWREx_EnterSHUTDOWNMode

(

void

)

Enter Shutdown mode.

Note

In Shutdown mode, the PLL, the HSI, the MSI, the LSI and the HSE oscillators are switched off. The voltage regulator is disabled and Vcore domain is powered off. SRAM1, SRAM2 and registers contents are lost except for registers in the Backup domain. The BOR is not available.

The I/Os can be configured either with a pull-up or pull-down or can be kept in analog state.

Return values

None

Definition at line 1304 of file stm32l4xx_hal_pwr_ex.c.

{

  /* Set Shutdown mode */
  MODIFY_REG(PWR->CR1, PWR_CR1_LPMS, PWR_CR1_LPMS_SHUTDOWN);

  /* Set SLEEPDEEP bit of Cortex System Control Register */
  SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));

/* This option is used to ensure that store operations are completed */
#if defined ( __CC_ARM)
  __force_stores();
#endif
  /* Request Wait For Interrupt */
  __WFI();
}

HAL_PWREx_EnterSTOP0Mode()

void HAL_PWREx_EnterSTOP0Mode

(

uint8_t

STOPEntry

)

Enter Stop 0 mode.

Note

In Stop 0 mode, main and low voltage regulators are ON.

In Stop 0 mode, all I/O pins keep the same state as in Run mode.

All clocks in the VCORE domain are stopped; the PLL, the MSI, the HSI and the HSE oscillators are disabled. Some peripherals with the wakeup capability (I2Cx, USARTx and LPUART) can switch on the HSI to receive a frame, and switch off the HSI after receiving the frame if it is not a wakeup frame. In this case, the HSI clock is propagated only to the peripheral requesting it. SRAM1, SRAM2 and register contents are preserved. The BOR is available.

When exiting Stop 0 mode by issuing an interrupt or a wakeup event, the HSI RC oscillator is selected as system clock if STOPWUCK bit in RCC_CFGR register is set; the MSI oscillator is selected if STOPWUCK is cleared.

By keeping the internal regulator ON during Stop 0 mode, the consumption is higher although the startup time is reduced.

Parameters

STOPEntry

specifies if Stop mode in entered with WFI or WFE instruction. This parameter can be one of the following values: PWR_STOPENTRY_WFI Enter Stop mode with WFI instruction PWR_STOPENTRY_WFE Enter Stop mode with WFE instruction

Return values

None

Definition at line 1159 of file stm32l4xx_hal_pwr_ex.c.

{
  /* Check the parameters */
  assert_param(IS_PWR_STOP_ENTRY(STOPEntry));

  /* Stop 0 mode with Main Regulator */
  MODIFY_REG(PWR->CR1, PWR_CR1_LPMS, PWR_CR1_LPMS_STOP0);

  /* Set SLEEPDEEP bit of Cortex System Control Register */
  SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));

  /* Select Stop mode entry --------------------------------------------------*/
  if(STOPEntry == PWR_STOPENTRY_WFI)
  {
    /* Request Wait For Interrupt */
    __WFI();
  }
  else
  {
    /* Request Wait For Event */
    __SEV();
    __WFE();
    __WFE();
  }

  /* Reset SLEEPDEEP bit of Cortex System Control Register */
  CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
}

HAL_PWREx_EnterSTOP1Mode()

void HAL_PWREx_EnterSTOP1Mode

(

uint8_t

STOPEntry

)

Enter Stop 1 mode.

Note

In Stop 1 mode, only low power voltage regulator is ON.

In Stop 1 mode, all I/O pins keep the same state as in Run mode.

All clocks in the VCORE domain are stopped; the PLL, the MSI, the HSI and the HSE oscillators are disabled. Some peripherals with the wakeup capability (I2Cx, USARTx and LPUART) can switch on the HSI to receive a frame, and switch off the HSI after receiving the frame if it is not a wakeup frame. In this case, the HSI clock is propagated only to the peripheral requesting it. SRAM1, SRAM2 and register contents are preserved. The BOR is available.

When exiting Stop 1 mode by issuing an interrupt or a wakeup event, the HSI RC oscillator is selected as system clock if STOPWUCK bit in RCC_CFGR register is set; the MSI oscillator is selected if STOPWUCK is cleared.

Due to low power mode, an additional startup delay is incurred when waking up from Stop 1 mode.

Parameters

STOPEntry

specifies if Stop mode in entered with WFI or WFE instruction. This parameter can be one of the following values: PWR_STOPENTRY_WFI Enter Stop mode with WFI instruction PWR_STOPENTRY_WFE Enter Stop mode with WFE instruction

Return values

None

Definition at line 1210 of file stm32l4xx_hal_pwr_ex.c.

{
  /* Check the parameters */
  assert_param(IS_PWR_STOP_ENTRY(STOPEntry));

  /* Stop 1 mode with Low-Power Regulator */
  MODIFY_REG(PWR->CR1, PWR_CR1_LPMS, PWR_CR1_LPMS_STOP1);

  /* Set SLEEPDEEP bit of Cortex System Control Register */
  SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));

  /* Select Stop mode entry --------------------------------------------------*/
  if(STOPEntry == PWR_STOPENTRY_WFI)
  {
    /* Request Wait For Interrupt */
    __WFI();
  }
  else
  {
    /* Request Wait For Event */
    __SEV();
    __WFE();
    __WFE();
  }

  /* Reset SLEEPDEEP bit of Cortex System Control Register */
  CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
}

HAL_PWREx_EnterSTOP2Mode()

void HAL_PWREx_EnterSTOP2Mode

(

uint8_t

STOPEntry

)

Enter Stop 2 mode.

Note

In Stop 2 mode, only low power voltage regulator is ON.

In Stop 2 mode, all I/O pins keep the same state as in Run mode.

All clocks in the VCORE domain are stopped, the PLL, the MSI, the HSI and the HSE oscillators are disabled. Some peripherals with wakeup capability (LCD, LPTIM1, I2C3 and LPUART) can switch on the HSI to receive a frame, and switch off the HSI after receiving the frame if it is not a wakeup frame. In this case the HSI clock is propagated only to the peripheral requesting it. SRAM1, SRAM2 and register contents are preserved. The BOR is available. The voltage regulator is set in low-power mode but LPR bit must be cleared to enter stop 2 mode. Otherwise, Stop 1 mode is entered.

When exiting Stop 2 mode by issuing an interrupt or a wakeup event, the HSI RC oscillator is selected as system clock if STOPWUCK bit in RCC_CFGR register is set; the MSI oscillator is selected if STOPWUCK is cleared.

Parameters

STOPEntry

specifies if Stop mode in entered with WFI or WFE instruction. This parameter can be one of the following values: PWR_STOPENTRY_WFI Enter Stop mode with WFI instruction PWR_STOPENTRY_WFE Enter Stop mode with WFE instruction

Return values

None

Definition at line 1262 of file stm32l4xx_hal_pwr_ex.c.

{
  /* Check the parameter */
  assert_param(IS_PWR_STOP_ENTRY(STOPEntry));

  /* Set Stop mode 2 */
  MODIFY_REG(PWR->CR1, PWR_CR1_LPMS, PWR_CR1_LPMS_STOP2);

  /* Set SLEEPDEEP bit of Cortex System Control Register */
  SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));

  /* Select Stop mode entry --------------------------------------------------*/
  if(STOPEntry == PWR_STOPENTRY_WFI)
  {
    /* Request Wait For Interrupt */
    __WFI();
  }
  else
  {
    /* Request Wait For Event */
    __SEV();
    __WFE();
    __WFE();
  }

  /* Reset SLEEPDEEP bit of Cortex System Control Register */
  CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
}

HAL_PWREx_GetVoltageRange()

uint32_t HAL_PWREx_GetVoltageRange

(

void

)

Return Voltage Scaling Range.

Return values

VOS	bit field (PWR_REGULATOR_VOLTAGE_RANGE1 or PWR_REGULATOR_VOLTAGE_RANGE2 or PWR_REGULATOR_VOLTAGE_SCALE1_BOOST when applicable)

Definition at line 115 of file stm32l4xx_hal_pwr_ex.c.

{
#if defined(PWR_CR5_R1MODE)
    if (READ_BIT(PWR->CR1, PWR_CR1_VOS) == PWR_REGULATOR_VOLTAGE_SCALE2)
    {
      return PWR_REGULATOR_VOLTAGE_SCALE2;
    }
    else if (READ_BIT(PWR->CR5, PWR_CR5_R1MODE) == PWR_CR5_R1MODE)
    {
      /* PWR_CR5_R1MODE bit set means that Range 1 Boost is disabled */
      return PWR_REGULATOR_VOLTAGE_SCALE1;
    }
    else
    {
      return PWR_REGULATOR_VOLTAGE_SCALE1_BOOST;
    }
#else
  return  (PWR->CR1 & PWR_CR1_VOS);
#endif
}

HAL_PWREx_PVD_PVM_IRQHandler()

void HAL_PWREx_PVD_PVM_IRQHandler

(

void

)

This function handles the PWR PVD/PVMx interrupt request.

Note

This API should be called under the PVD_PVM_IRQHandler().

Return values

None

Definition at line 1329 of file stm32l4xx_hal_pwr_ex.c.

{
  /* Check PWR exti flag */
  if(__HAL_PWR_PVD_EXTI_GET_FLAG() != 0x0U)
  {
    /* PWR PVD interrupt user callback */
    HAL_PWR_PVDCallback();

    /* Clear PVD exti pending bit */
    __HAL_PWR_PVD_EXTI_CLEAR_FLAG();
  }
  /* Next, successively check PVMx exti flags */
#if defined(PWR_CR2_PVME1)
  if(__HAL_PWR_PVM1_EXTI_GET_FLAG() != 0x0U)
  {
    /* PWR PVM1 interrupt user callback */
    HAL_PWREx_PVM1Callback();

    /* Clear PVM1 exti pending bit */
    __HAL_PWR_PVM1_EXTI_CLEAR_FLAG();
  }
#endif /* PWR_CR2_PVME1 */
#if defined(PWR_CR2_PVME2)
  if(__HAL_PWR_PVM2_EXTI_GET_FLAG() != 0x0U)
  {
    /* PWR PVM2 interrupt user callback */
    HAL_PWREx_PVM2Callback();

    /* Clear PVM2 exti pending bit */
    __HAL_PWR_PVM2_EXTI_CLEAR_FLAG();
  }
#endif /* PWR_CR2_PVME2 */
  if(__HAL_PWR_PVM3_EXTI_GET_FLAG() != 0x0U)
  {
    /* PWR PVM3 interrupt user callback */
    HAL_PWREx_PVM3Callback();

    /* Clear PVM3 exti pending bit */
    __HAL_PWR_PVM3_EXTI_CLEAR_FLAG();
  }
  if(__HAL_PWR_PVM4_EXTI_GET_FLAG() != 0x0U)
  {
    /* PWR PVM4 interrupt user callback */
    HAL_PWREx_PVM4Callback();

    /* Clear PVM4 exti pending bit */
    __HAL_PWR_PVM4_EXTI_CLEAR_FLAG();
  }
}

HAL_PWREx_PVM1Callback()

__weak void HAL_PWREx_PVM1Callback

(

void

)

PWR PVM1 interrupt callback.

Return values

None

Definition at line 1385 of file stm32l4xx_hal_pwr_ex.c.

{
  /* NOTE : This function should not be modified; when the callback is needed,
            HAL_PWREx_PVM1Callback() API can be implemented in the user file
   */
}

HAL_PWREx_PVM2Callback()

__weak void HAL_PWREx_PVM2Callback

(

void

)

PWR PVM2 interrupt callback.

Return values

None

Definition at line 1398 of file stm32l4xx_hal_pwr_ex.c.

{
  /* NOTE : This function should not be modified; when the callback is needed,
            HAL_PWREx_PVM2Callback() API can be implemented in the user file
   */
}

HAL_PWREx_PVM3Callback()

__weak void HAL_PWREx_PVM3Callback

(

void

)

PWR PVM3 interrupt callback.

Return values

None

Definition at line 1410 of file stm32l4xx_hal_pwr_ex.c.

{
  /* NOTE : This function should not be modified; when the callback is needed,
            HAL_PWREx_PVM3Callback() API can be implemented in the user file
   */
}

HAL_PWREx_PVM4Callback()

__weak void HAL_PWREx_PVM4Callback

(

void

)

PWR PVM4 interrupt callback.

Return values

None

Definition at line 1421 of file stm32l4xx_hal_pwr_ex.c.

{
  /* NOTE : This function should not be modified; when the callback is needed,
            HAL_PWREx_PVM4Callback() API can be implemented in the user file
   */
}