STM32L4xx_HAL_Driver  1.14.0

Functions

__STATIC_INLINE void LL_SYSCFG_SetRemapMemory (uint32_t Memory)
 Set memory mapping at address 0x00000000 SYSCFG_MEMRMP MEM_MODE LL_SYSCFG_SetRemapMemory. More...
 
__STATIC_INLINE uint32_t LL_SYSCFG_GetRemapMemory (void)
 Get memory mapping at address 0x00000000 SYSCFG_MEMRMP MEM_MODE LL_SYSCFG_GetRemapMemory. More...
 
__STATIC_INLINE void LL_SYSCFG_SetFlashBankMode (uint32_t Bank)
 Select Flash bank mode (Bank flashed at 0x08000000) SYSCFG_MEMRMP FB_MODE LL_SYSCFG_SetFlashBankMode. More...
 
__STATIC_INLINE uint32_t LL_SYSCFG_GetFlashBankMode (void)
 Get Flash bank mode (Bank flashed at 0x08000000) SYSCFG_MEMRMP FB_MODE LL_SYSCFG_GetFlashBankMode. More...
 
__STATIC_INLINE void LL_SYSCFG_EnableFirewall (void)
 Firewall protection enabled SYSCFG_CFGR1 FWDIS LL_SYSCFG_EnableFirewall. More...
 
__STATIC_INLINE uint32_t LL_SYSCFG_IsEnabledFirewall (void)
 Check if Firewall protection is enabled or not SYSCFG_CFGR1 FWDIS LL_SYSCFG_IsEnabledFirewall. More...
 
__STATIC_INLINE void LL_SYSCFG_EnableAnalogBooster (void)
 Enable I/O analog switch voltage booster. More...
 
__STATIC_INLINE void LL_SYSCFG_DisableAnalogBooster (void)
 Disable I/O analog switch voltage booster. More...
 
__STATIC_INLINE void LL_SYSCFG_EnableFastModePlus (uint32_t ConfigFastModePlus)
 Enable the I2C fast mode plus driving capability. SYSCFG_CFGR1 I2C_PBx_FMP LL_SYSCFG_EnableFastModePlus
SYSCFG_CFGR1 I2Cx_FMP LL_SYSCFG_EnableFastModePlus. More...
 
__STATIC_INLINE void LL_SYSCFG_DisableFastModePlus (uint32_t ConfigFastModePlus)
 Disable the I2C fast mode plus driving capability. SYSCFG_CFGR1 I2C_PBx_FMP LL_SYSCFG_DisableFastModePlus
SYSCFG_CFGR1 I2Cx_FMP LL_SYSCFG_DisableFastModePlus. More...
 
__STATIC_INLINE void LL_SYSCFG_EnableIT_FPU_IOC (void)
 Enable Floating Point Unit Invalid operation Interrupt SYSCFG_CFGR1 FPU_IE_0 LL_SYSCFG_EnableIT_FPU_IOC. More...
 
__STATIC_INLINE void LL_SYSCFG_EnableIT_FPU_DZC (void)
 Enable Floating Point Unit Divide-by-zero Interrupt SYSCFG_CFGR1 FPU_IE_1 LL_SYSCFG_EnableIT_FPU_DZC. More...
 
__STATIC_INLINE void LL_SYSCFG_EnableIT_FPU_UFC (void)
 Enable Floating Point Unit Underflow Interrupt SYSCFG_CFGR1 FPU_IE_2 LL_SYSCFG_EnableIT_FPU_UFC. More...
 
__STATIC_INLINE void LL_SYSCFG_EnableIT_FPU_OFC (void)
 Enable Floating Point Unit Overflow Interrupt SYSCFG_CFGR1 FPU_IE_3 LL_SYSCFG_EnableIT_FPU_OFC. More...
 
__STATIC_INLINE void LL_SYSCFG_EnableIT_FPU_IDC (void)
 Enable Floating Point Unit Input denormal Interrupt SYSCFG_CFGR1 FPU_IE_4 LL_SYSCFG_EnableIT_FPU_IDC. More...
 
__STATIC_INLINE void LL_SYSCFG_EnableIT_FPU_IXC (void)
 Enable Floating Point Unit Inexact Interrupt SYSCFG_CFGR1 FPU_IE_5 LL_SYSCFG_EnableIT_FPU_IXC. More...
 
__STATIC_INLINE void LL_SYSCFG_DisableIT_FPU_IOC (void)
 Disable Floating Point Unit Invalid operation Interrupt SYSCFG_CFGR1 FPU_IE_0 LL_SYSCFG_DisableIT_FPU_IOC. More...
 
__STATIC_INLINE void LL_SYSCFG_DisableIT_FPU_DZC (void)
 Disable Floating Point Unit Divide-by-zero Interrupt SYSCFG_CFGR1 FPU_IE_1 LL_SYSCFG_DisableIT_FPU_DZC. More...
 
__STATIC_INLINE void LL_SYSCFG_DisableIT_FPU_UFC (void)
 Disable Floating Point Unit Underflow Interrupt SYSCFG_CFGR1 FPU_IE_2 LL_SYSCFG_DisableIT_FPU_UFC. More...
 
__STATIC_INLINE void LL_SYSCFG_DisableIT_FPU_OFC (void)
 Disable Floating Point Unit Overflow Interrupt SYSCFG_CFGR1 FPU_IE_3 LL_SYSCFG_DisableIT_FPU_OFC. More...
 
__STATIC_INLINE void LL_SYSCFG_DisableIT_FPU_IDC (void)
 Disable Floating Point Unit Input denormal Interrupt SYSCFG_CFGR1 FPU_IE_4 LL_SYSCFG_DisableIT_FPU_IDC. More...
 
__STATIC_INLINE void LL_SYSCFG_DisableIT_FPU_IXC (void)
 Disable Floating Point Unit Inexact Interrupt SYSCFG_CFGR1 FPU_IE_5 LL_SYSCFG_DisableIT_FPU_IXC. More...
 
__STATIC_INLINE uint32_t LL_SYSCFG_IsEnabledIT_FPU_IOC (void)
 Check if Floating Point Unit Invalid operation Interrupt source is enabled or disabled. SYSCFG_CFGR1 FPU_IE_0 LL_SYSCFG_IsEnabledIT_FPU_IOC. More...
 
__STATIC_INLINE uint32_t LL_SYSCFG_IsEnabledIT_FPU_DZC (void)
 Check if Floating Point Unit Divide-by-zero Interrupt source is enabled or disabled. SYSCFG_CFGR1 FPU_IE_1 LL_SYSCFG_IsEnabledIT_FPU_DZC. More...
 
__STATIC_INLINE uint32_t LL_SYSCFG_IsEnabledIT_FPU_UFC (void)
 Check if Floating Point Unit Underflow Interrupt source is enabled or disabled. SYSCFG_CFGR1 FPU_IE_2 LL_SYSCFG_IsEnabledIT_FPU_UFC. More...
 
__STATIC_INLINE uint32_t LL_SYSCFG_IsEnabledIT_FPU_OFC (void)
 Check if Floating Point Unit Overflow Interrupt source is enabled or disabled. SYSCFG_CFGR1 FPU_IE_3 LL_SYSCFG_IsEnabledIT_FPU_OFC. More...
 
__STATIC_INLINE uint32_t LL_SYSCFG_IsEnabledIT_FPU_IDC (void)
 Check if Floating Point Unit Input denormal Interrupt source is enabled or disabled. SYSCFG_CFGR1 FPU_IE_4 LL_SYSCFG_IsEnabledIT_FPU_IDC. More...
 
__STATIC_INLINE uint32_t LL_SYSCFG_IsEnabledIT_FPU_IXC (void)
 Check if Floating Point Unit Inexact Interrupt source is enabled or disabled. SYSCFG_CFGR1 FPU_IE_5 LL_SYSCFG_IsEnabledIT_FPU_IXC. More...
 
__STATIC_INLINE void LL_SYSCFG_SetEXTISource (uint32_t Port, uint32_t Line)
 Configure source input for the EXTI external interrupt. SYSCFG_EXTICR1 EXTIx LL_SYSCFG_SetEXTISource
SYSCFG_EXTICR2 EXTIx LL_SYSCFG_SetEXTISource
SYSCFG_EXTICR3 EXTIx LL_SYSCFG_SetEXTISource
SYSCFG_EXTICR4 EXTIx LL_SYSCFG_SetEXTISource. More...
 
__STATIC_INLINE uint32_t LL_SYSCFG_GetEXTISource (uint32_t Line)
 Get the configured defined for specific EXTI Line SYSCFG_EXTICR1 EXTIx LL_SYSCFG_GetEXTISource
SYSCFG_EXTICR2 EXTIx LL_SYSCFG_GetEXTISource
SYSCFG_EXTICR3 EXTIx LL_SYSCFG_GetEXTISource
SYSCFG_EXTICR4 EXTIx LL_SYSCFG_GetEXTISource. More...
 
__STATIC_INLINE void LL_SYSCFG_EnableSRAM2Erase (void)
 Enable SRAM2 Erase (starts a hardware SRAM2 erase operation. This bit is automatically cleared at the end of the SRAM2 erase operation.) More...
 
__STATIC_INLINE uint32_t LL_SYSCFG_IsSRAM2EraseOngoing (void)
 Check if SRAM2 erase operation is on going SYSCFG_SCSR SRAM2BSY LL_SYSCFG_IsSRAM2EraseOngoing. More...
 
__STATIC_INLINE void LL_SYSCFG_SetTIMBreakInputs (uint32_t Break)
 Set connections to TIM1/8/15/16/17 Break inputs SYSCFG_CFGR2 CLL LL_SYSCFG_SetTIMBreakInputs
SYSCFG_CFGR2 SPL LL_SYSCFG_SetTIMBreakInputs
SYSCFG_CFGR2 PVDL LL_SYSCFG_SetTIMBreakInputs
SYSCFG_CFGR2 ECCL LL_SYSCFG_SetTIMBreakInputs. More...
 
__STATIC_INLINE uint32_t LL_SYSCFG_GetTIMBreakInputs (void)
 Get connections to TIM1/8/15/16/17 Break inputs SYSCFG_CFGR2 CLL LL_SYSCFG_GetTIMBreakInputs
SYSCFG_CFGR2 SPL LL_SYSCFG_GetTIMBreakInputs
SYSCFG_CFGR2 PVDL LL_SYSCFG_GetTIMBreakInputs
SYSCFG_CFGR2 ECCL LL_SYSCFG_GetTIMBreakInputs. More...
 
__STATIC_INLINE uint32_t LL_SYSCFG_IsActiveFlag_SP (void)
 Check if SRAM2 parity error detected SYSCFG_CFGR2 SPF LL_SYSCFG_IsActiveFlag_SP. More...
 
__STATIC_INLINE void LL_SYSCFG_ClearFlag_SP (void)
 Clear SRAM2 parity error flag SYSCFG_CFGR2 SPF LL_SYSCFG_ClearFlag_SP. More...
 
__STATIC_INLINE void LL_SYSCFG_EnableSRAM2PageWRP_0_31 (uint32_t SRAM2WRP)
 
__STATIC_INLINE void LL_SYSCFG_EnableSRAM2PageWRP_32_63 (uint32_t SRAM2WRP)
 Enable SRAM2 page write protection for Pages in range 32 to 63. More...
 
__STATIC_INLINE void LL_SYSCFG_LockSRAM2WRP (void)
 SRAM2 page write protection lock prior to erase SYSCFG_SKR KEY LL_SYSCFG_LockSRAM2WRP. More...
 
__STATIC_INLINE void LL_SYSCFG_UnlockSRAM2WRP (void)
 SRAM2 page write protection unlock prior to erase SYSCFG_SKR KEY LL_SYSCFG_UnlockSRAM2WRP. More...
 

Detailed Description

Function Documentation

◆ LL_SYSCFG_ClearFlag_SP()

__STATIC_INLINE void LL_SYSCFG_ClearFlag_SP ( void  )

Clear SRAM2 parity error flag SYSCFG_CFGR2 SPF LL_SYSCFG_ClearFlag_SP.

Return values
None

Definition at line 893 of file stm32l4xx_ll_system.h.

894 {
895  SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_SPF);
896 }

◆ LL_SYSCFG_DisableAnalogBooster()

__STATIC_INLINE void LL_SYSCFG_DisableAnalogBooster ( void  )

Disable I/O analog switch voltage booster.

Note
When voltage booster is enabled, I/O analog switches are supplied by a dedicated voltage booster, from VDD power domain. This is the recommended configuration with low VDDA voltage operation.
The I/O analog switch voltage booster is relevant for peripherals using I/O in analog input: ADC, COMP, OPAMP. However, COMP and OPAMP inputs have a high impedance and voltage booster do not impact performance significantly. Therefore, the voltage booster is mainly intended for usage with ADC. SYSCFG_CFGR1 BOOSTEN LL_SYSCFG_DisableAnalogBooster
Return values
None

Definition at line 506 of file stm32l4xx_ll_system.h.

507 {
508  CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOSTEN);
509 }
CLEAR_BIT(hrtc->Instance->CR, RTC_CR_WUTE)

◆ LL_SYSCFG_DisableFastModePlus()

__STATIC_INLINE void LL_SYSCFG_DisableFastModePlus ( uint32_t  ConfigFastModePlus)

Disable the I2C fast mode plus driving capability. SYSCFG_CFGR1 I2C_PBx_FMP LL_SYSCFG_DisableFastModePlus
SYSCFG_CFGR1 I2Cx_FMP LL_SYSCFG_DisableFastModePlus.

Parameters
ConfigFastModePlusThis parameter can be a combination of the following values:
  • LL_SYSCFG_I2C_FASTMODEPLUS_PB6
  • LL_SYSCFG_I2C_FASTMODEPLUS_PB7
  • LL_SYSCFG_I2C_FASTMODEPLUS_PB8 (*)
  • LL_SYSCFG_I2C_FASTMODEPLUS_PB9 (*)
  • LL_SYSCFG_I2C_FASTMODEPLUS_I2C1
  • LL_SYSCFG_I2C_FASTMODEPLUS_I2C2 (*)
  • LL_SYSCFG_I2C_FASTMODEPLUS_I2C3
  • LL_SYSCFG_I2C_FASTMODEPLUS_I2C4 (*)
(*) value not defined in all devices
Return values
None

Definition at line 550 of file stm32l4xx_ll_system.h.

551 {
552  CLEAR_BIT(SYSCFG->CFGR1, ConfigFastModePlus);
553 }
CLEAR_BIT(hrtc->Instance->CR, RTC_CR_WUTE)

◆ LL_SYSCFG_DisableIT_FPU_DZC()

__STATIC_INLINE void LL_SYSCFG_DisableIT_FPU_DZC ( void  )

Disable Floating Point Unit Divide-by-zero Interrupt SYSCFG_CFGR1 FPU_IE_1 LL_SYSCFG_DisableIT_FPU_DZC.

Return values
None

Definition at line 630 of file stm32l4xx_ll_system.h.

631 {
632  CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_1);
633 }
CLEAR_BIT(hrtc->Instance->CR, RTC_CR_WUTE)

◆ LL_SYSCFG_DisableIT_FPU_IDC()

__STATIC_INLINE void LL_SYSCFG_DisableIT_FPU_IDC ( void  )

Disable Floating Point Unit Input denormal Interrupt SYSCFG_CFGR1 FPU_IE_4 LL_SYSCFG_DisableIT_FPU_IDC.

Return values
None

Definition at line 660 of file stm32l4xx_ll_system.h.

661 {
662  CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_4);
663 }
CLEAR_BIT(hrtc->Instance->CR, RTC_CR_WUTE)

◆ LL_SYSCFG_DisableIT_FPU_IOC()

__STATIC_INLINE void LL_SYSCFG_DisableIT_FPU_IOC ( void  )

Disable Floating Point Unit Invalid operation Interrupt SYSCFG_CFGR1 FPU_IE_0 LL_SYSCFG_DisableIT_FPU_IOC.

Return values
None

Definition at line 620 of file stm32l4xx_ll_system.h.

621 {
622  CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_0);
623 }
CLEAR_BIT(hrtc->Instance->CR, RTC_CR_WUTE)

◆ LL_SYSCFG_DisableIT_FPU_IXC()

__STATIC_INLINE void LL_SYSCFG_DisableIT_FPU_IXC ( void  )

Disable Floating Point Unit Inexact Interrupt SYSCFG_CFGR1 FPU_IE_5 LL_SYSCFG_DisableIT_FPU_IXC.

Return values
None

Definition at line 670 of file stm32l4xx_ll_system.h.

671 {
672  CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_5);
673 }
CLEAR_BIT(hrtc->Instance->CR, RTC_CR_WUTE)

◆ LL_SYSCFG_DisableIT_FPU_OFC()

__STATIC_INLINE void LL_SYSCFG_DisableIT_FPU_OFC ( void  )

Disable Floating Point Unit Overflow Interrupt SYSCFG_CFGR1 FPU_IE_3 LL_SYSCFG_DisableIT_FPU_OFC.

Return values
None

Definition at line 650 of file stm32l4xx_ll_system.h.

651 {
652  CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_3);
653 }
CLEAR_BIT(hrtc->Instance->CR, RTC_CR_WUTE)

◆ LL_SYSCFG_DisableIT_FPU_UFC()

__STATIC_INLINE void LL_SYSCFG_DisableIT_FPU_UFC ( void  )

Disable Floating Point Unit Underflow Interrupt SYSCFG_CFGR1 FPU_IE_2 LL_SYSCFG_DisableIT_FPU_UFC.

Return values
None

Definition at line 640 of file stm32l4xx_ll_system.h.

641 {
642  CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_2);
643 }
CLEAR_BIT(hrtc->Instance->CR, RTC_CR_WUTE)

◆ LL_SYSCFG_EnableAnalogBooster()

__STATIC_INLINE void LL_SYSCFG_EnableAnalogBooster ( void  )

Enable I/O analog switch voltage booster.

Note
When voltage booster is enabled, I/O analog switches are supplied by a dedicated voltage booster, from VDD power domain. This is the recommended configuration with low VDDA voltage operation.
The I/O analog switch voltage booster is relevant for peripherals using I/O in analog input: ADC, COMP, OPAMP. However, COMP and OPAMP inputs have a high impedance and voltage booster do not impact performance significantly. Therefore, the voltage booster is mainly intended for usage with ADC. SYSCFG_CFGR1 BOOSTEN LL_SYSCFG_EnableAnalogBooster
Return values
None

Definition at line 487 of file stm32l4xx_ll_system.h.

488 {
489  SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOSTEN);
490 }

◆ LL_SYSCFG_EnableFastModePlus()

__STATIC_INLINE void LL_SYSCFG_EnableFastModePlus ( uint32_t  ConfigFastModePlus)

Enable the I2C fast mode plus driving capability. SYSCFG_CFGR1 I2C_PBx_FMP LL_SYSCFG_EnableFastModePlus
SYSCFG_CFGR1 I2Cx_FMP LL_SYSCFG_EnableFastModePlus.

Parameters
ConfigFastModePlusThis parameter can be a combination of the following values:
  • LL_SYSCFG_I2C_FASTMODEPLUS_PB6
  • LL_SYSCFG_I2C_FASTMODEPLUS_PB7
  • LL_SYSCFG_I2C_FASTMODEPLUS_PB8 (*)
  • LL_SYSCFG_I2C_FASTMODEPLUS_PB9 (*)
  • LL_SYSCFG_I2C_FASTMODEPLUS_I2C1
  • LL_SYSCFG_I2C_FASTMODEPLUS_I2C2 (*)
  • LL_SYSCFG_I2C_FASTMODEPLUS_I2C3
  • LL_SYSCFG_I2C_FASTMODEPLUS_I2C4 (*)
(*) value not defined in all devices
Return values
None

Definition at line 528 of file stm32l4xx_ll_system.h.

529 {
530  SET_BIT(SYSCFG->CFGR1, ConfigFastModePlus);
531 }

◆ LL_SYSCFG_EnableFirewall()

__STATIC_INLINE void LL_SYSCFG_EnableFirewall ( void  )

Firewall protection enabled SYSCFG_CFGR1 FWDIS LL_SYSCFG_EnableFirewall.

Return values
None

Definition at line 458 of file stm32l4xx_ll_system.h.

459 {
460  CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FWDIS);
461 }
CLEAR_BIT(hrtc->Instance->CR, RTC_CR_WUTE)

◆ LL_SYSCFG_EnableIT_FPU_DZC()

__STATIC_INLINE void LL_SYSCFG_EnableIT_FPU_DZC ( void  )

Enable Floating Point Unit Divide-by-zero Interrupt SYSCFG_CFGR1 FPU_IE_1 LL_SYSCFG_EnableIT_FPU_DZC.

Return values
None

Definition at line 570 of file stm32l4xx_ll_system.h.

571 {
572  SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_1);
573 }

◆ LL_SYSCFG_EnableIT_FPU_IDC()

__STATIC_INLINE void LL_SYSCFG_EnableIT_FPU_IDC ( void  )

Enable Floating Point Unit Input denormal Interrupt SYSCFG_CFGR1 FPU_IE_4 LL_SYSCFG_EnableIT_FPU_IDC.

Return values
None

Definition at line 600 of file stm32l4xx_ll_system.h.

601 {
602  SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_4);
603 }

◆ LL_SYSCFG_EnableIT_FPU_IOC()

__STATIC_INLINE void LL_SYSCFG_EnableIT_FPU_IOC ( void  )

Enable Floating Point Unit Invalid operation Interrupt SYSCFG_CFGR1 FPU_IE_0 LL_SYSCFG_EnableIT_FPU_IOC.

Return values
None

Definition at line 560 of file stm32l4xx_ll_system.h.

561 {
562  SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_0);
563 }

◆ LL_SYSCFG_EnableIT_FPU_IXC()

__STATIC_INLINE void LL_SYSCFG_EnableIT_FPU_IXC ( void  )

Enable Floating Point Unit Inexact Interrupt SYSCFG_CFGR1 FPU_IE_5 LL_SYSCFG_EnableIT_FPU_IXC.

Return values
None

Definition at line 610 of file stm32l4xx_ll_system.h.

611 {
612  SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_5);
613 }

◆ LL_SYSCFG_EnableIT_FPU_OFC()

__STATIC_INLINE void LL_SYSCFG_EnableIT_FPU_OFC ( void  )

Enable Floating Point Unit Overflow Interrupt SYSCFG_CFGR1 FPU_IE_3 LL_SYSCFG_EnableIT_FPU_OFC.

Return values
None

Definition at line 590 of file stm32l4xx_ll_system.h.

591 {
592  SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_3);
593 }

◆ LL_SYSCFG_EnableIT_FPU_UFC()

__STATIC_INLINE void LL_SYSCFG_EnableIT_FPU_UFC ( void  )

Enable Floating Point Unit Underflow Interrupt SYSCFG_CFGR1 FPU_IE_2 LL_SYSCFG_EnableIT_FPU_UFC.

Return values
None

Definition at line 580 of file stm32l4xx_ll_system.h.

581 {
582  SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_2);
583 }

◆ LL_SYSCFG_EnableSRAM2Erase()

__STATIC_INLINE void LL_SYSCFG_EnableSRAM2Erase ( void  )

Enable SRAM2 Erase (starts a hardware SRAM2 erase operation. This bit is automatically cleared at the end of the SRAM2 erase operation.)

Note
This bit is write-protected: setting this bit is possible only after the correct key sequence is written in the SYSCFG_SKR register as described in the Reference Manual. SYSCFG_SCSR SRAM2ER LL_SYSCFG_EnableSRAM2Erase
Return values
None

Definition at line 827 of file stm32l4xx_ll_system.h.

828 {
829  /* Starts a hardware SRAM2 erase operation*/
830  SET_BIT(SYSCFG->SCSR, SYSCFG_SCSR_SRAM2ER);
831 }

◆ LL_SYSCFG_EnableSRAM2PageWRP_0_31()

__STATIC_INLINE void LL_SYSCFG_EnableSRAM2PageWRP_0_31 ( uint32_t  SRAM2WRP)

Definition at line 941 of file stm32l4xx_ll_system.h.

942 {
943  SET_BIT(SYSCFG->SWPR, SRAM2WRP);
944 }

◆ LL_SYSCFG_EnableSRAM2PageWRP_32_63()

__STATIC_INLINE void LL_SYSCFG_EnableSRAM2PageWRP_32_63 ( uint32_t  SRAM2WRP)

Enable SRAM2 page write protection for Pages in range 32 to 63.

Note
Write protection is cleared only by a system reset SYSCFG_SWPR2 PxWP LL_SYSCFG_EnableSRAM2PageWRP_32_63
Parameters
SRAM2WRPThis parameter can be a combination of the following values:
  • LL_SYSCFG_SRAM2WRP_PAGE32 (*)
  • LL_SYSCFG_SRAM2WRP_PAGE33 (*)
  • LL_SYSCFG_SRAM2WRP_PAGE34 (*)
  • LL_SYSCFG_SRAM2WRP_PAGE35 (*)
  • LL_SYSCFG_SRAM2WRP_PAGE36 (*)
  • LL_SYSCFG_SRAM2WRP_PAGE37 (*)
  • LL_SYSCFG_SRAM2WRP_PAGE38 (*)
  • LL_SYSCFG_SRAM2WRP_PAGE39 (*)
  • LL_SYSCFG_SRAM2WRP_PAGE40 (*)
  • LL_SYSCFG_SRAM2WRP_PAGE41 (*)
  • LL_SYSCFG_SRAM2WRP_PAGE42 (*)
  • LL_SYSCFG_SRAM2WRP_PAGE43 (*)
  • LL_SYSCFG_SRAM2WRP_PAGE44 (*)
  • LL_SYSCFG_SRAM2WRP_PAGE45 (*)
  • LL_SYSCFG_SRAM2WRP_PAGE46 (*)
  • LL_SYSCFG_SRAM2WRP_PAGE47 (*)
  • LL_SYSCFG_SRAM2WRP_PAGE48 (*)
  • LL_SYSCFG_SRAM2WRP_PAGE49 (*)
  • LL_SYSCFG_SRAM2WRP_PAGE50 (*)
  • LL_SYSCFG_SRAM2WRP_PAGE51 (*)
  • LL_SYSCFG_SRAM2WRP_PAGE52 (*)
  • LL_SYSCFG_SRAM2WRP_PAGE53 (*)
  • LL_SYSCFG_SRAM2WRP_PAGE54 (*)
  • LL_SYSCFG_SRAM2WRP_PAGE55 (*)
  • LL_SYSCFG_SRAM2WRP_PAGE56 (*)
  • LL_SYSCFG_SRAM2WRP_PAGE57 (*)
  • LL_SYSCFG_SRAM2WRP_PAGE58 (*)
  • LL_SYSCFG_SRAM2WRP_PAGE59 (*)
  • LL_SYSCFG_SRAM2WRP_PAGE60 (*)
  • LL_SYSCFG_SRAM2WRP_PAGE61 (*)
  • LL_SYSCFG_SRAM2WRP_PAGE62 (*)
  • LL_SYSCFG_SRAM2WRP_PAGE63 (*)
(*) value not defined in all devices
Return values
None

Definition at line 988 of file stm32l4xx_ll_system.h.

989 {
990  SET_BIT(SYSCFG->SWPR2, SRAM2WRP);
991 }

◆ LL_SYSCFG_GetEXTISource()

__STATIC_INLINE uint32_t LL_SYSCFG_GetEXTISource ( uint32_t  Line)

Get the configured defined for specific EXTI Line SYSCFG_EXTICR1 EXTIx LL_SYSCFG_GetEXTISource
SYSCFG_EXTICR2 EXTIx LL_SYSCFG_GetEXTISource
SYSCFG_EXTICR3 EXTIx LL_SYSCFG_GetEXTISource
SYSCFG_EXTICR4 EXTIx LL_SYSCFG_GetEXTISource.

Parameters
LineThis parameter can be one of the following values:
  • LL_SYSCFG_EXTI_LINE0
  • LL_SYSCFG_EXTI_LINE1
  • LL_SYSCFG_EXTI_LINE2
  • LL_SYSCFG_EXTI_LINE3
  • LL_SYSCFG_EXTI_LINE4
  • LL_SYSCFG_EXTI_LINE5
  • LL_SYSCFG_EXTI_LINE6
  • LL_SYSCFG_EXTI_LINE7
  • LL_SYSCFG_EXTI_LINE8
  • LL_SYSCFG_EXTI_LINE9
  • LL_SYSCFG_EXTI_LINE10
  • LL_SYSCFG_EXTI_LINE11
  • LL_SYSCFG_EXTI_LINE12
  • LL_SYSCFG_EXTI_LINE13
  • LL_SYSCFG_EXTI_LINE14
  • LL_SYSCFG_EXTI_LINE15
Return values
Returnedvalue can be one of the following values:
  • LL_SYSCFG_EXTI_PORTA
  • LL_SYSCFG_EXTI_PORTB
  • LL_SYSCFG_EXTI_PORTC
  • LL_SYSCFG_EXTI_PORTD
  • LL_SYSCFG_EXTI_PORTE
  • LL_SYSCFG_EXTI_PORTF (*)
  • LL_SYSCFG_EXTI_PORTG (*)
  • LL_SYSCFG_EXTI_PORTH
  • LL_SYSCFG_EXTI_PORTI (*)
(*) value not defined in all devices

Definition at line 813 of file stm32l4xx_ll_system.h.

814 {
815  return (uint32_t)(READ_BIT(SYSCFG->EXTICR[Line & 0xFFU], (Line >> 16U)) >> POSITION_VAL(Line >> 16U));
816 }

◆ LL_SYSCFG_GetFlashBankMode()

__STATIC_INLINE uint32_t LL_SYSCFG_GetFlashBankMode ( void  )

Get Flash bank mode (Bank flashed at 0x08000000) SYSCFG_MEMRMP FB_MODE LL_SYSCFG_GetFlashBankMode.

Return values
Returnedvalue can be one of the following values:
  • LL_SYSCFG_BANKMODE_BANK1
  • LL_SYSCFG_BANKMODE_BANK2

Definition at line 447 of file stm32l4xx_ll_system.h.

448 {
449  return (uint32_t)(READ_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_FB_MODE));
450 }

◆ LL_SYSCFG_GetRemapMemory()

__STATIC_INLINE uint32_t LL_SYSCFG_GetRemapMemory ( void  )

Get memory mapping at address 0x00000000 SYSCFG_MEMRMP MEM_MODE LL_SYSCFG_GetRemapMemory.

Return values
Returnedvalue can be one of the following values:
  • LL_SYSCFG_REMAP_FLASH
  • LL_SYSCFG_REMAP_SYSTEMFLASH
  • LL_SYSCFG_REMAP_SRAM
  • LL_SYSCFG_REMAP_FMC (*)
  • LL_SYSCFG_REMAP_QUADSPI
(*) value not defined in all devices

Definition at line 421 of file stm32l4xx_ll_system.h.

422 {
423  return (uint32_t)(READ_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE));
424 }

◆ LL_SYSCFG_GetTIMBreakInputs()

__STATIC_INLINE uint32_t LL_SYSCFG_GetTIMBreakInputs ( void  )

Get connections to TIM1/8/15/16/17 Break inputs SYSCFG_CFGR2 CLL LL_SYSCFG_GetTIMBreakInputs
SYSCFG_CFGR2 SPL LL_SYSCFG_GetTIMBreakInputs
SYSCFG_CFGR2 PVDL LL_SYSCFG_GetTIMBreakInputs
SYSCFG_CFGR2 ECCL LL_SYSCFG_GetTIMBreakInputs.

Return values
Returnedvalue can be can be a combination of the following values:
  • LL_SYSCFG_TIMBREAK_ECC
  • LL_SYSCFG_TIMBREAK_PVD
  • LL_SYSCFG_TIMBREAK_SRAM2_PARITY
  • LL_SYSCFG_TIMBREAK_LOCKUP

Definition at line 873 of file stm32l4xx_ll_system.h.

874 {
875  return (uint32_t)(READ_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_CLL | SYSCFG_CFGR2_SPL | SYSCFG_CFGR2_PVDL | SYSCFG_CFGR2_ECCL));
876 }

◆ LL_SYSCFG_IsActiveFlag_SP()

__STATIC_INLINE uint32_t LL_SYSCFG_IsActiveFlag_SP ( void  )

Check if SRAM2 parity error detected SYSCFG_CFGR2 SPF LL_SYSCFG_IsActiveFlag_SP.

Return values
Stateof bit (1 or 0).

Definition at line 883 of file stm32l4xx_ll_system.h.

884 {
885  return (READ_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_SPF) == (SYSCFG_CFGR2_SPF));
886 }

◆ LL_SYSCFG_IsEnabledFirewall()

__STATIC_INLINE uint32_t LL_SYSCFG_IsEnabledFirewall ( void  )

Check if Firewall protection is enabled or not SYSCFG_CFGR1 FWDIS LL_SYSCFG_IsEnabledFirewall.

Return values
Stateof bit (1 or 0).

Definition at line 468 of file stm32l4xx_ll_system.h.

469 {
470  return !(READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FWDIS) == SYSCFG_CFGR1_FWDIS);
471 }

◆ LL_SYSCFG_IsEnabledIT_FPU_DZC()

__STATIC_INLINE uint32_t LL_SYSCFG_IsEnabledIT_FPU_DZC ( void  )

Check if Floating Point Unit Divide-by-zero Interrupt source is enabled or disabled. SYSCFG_CFGR1 FPU_IE_1 LL_SYSCFG_IsEnabledIT_FPU_DZC.

Return values
Stateof bit (1 or 0).

Definition at line 690 of file stm32l4xx_ll_system.h.

691 {
692  return (READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_1) == (SYSCFG_CFGR1_FPU_IE_1));
693 }

◆ LL_SYSCFG_IsEnabledIT_FPU_IDC()

__STATIC_INLINE uint32_t LL_SYSCFG_IsEnabledIT_FPU_IDC ( void  )

Check if Floating Point Unit Input denormal Interrupt source is enabled or disabled. SYSCFG_CFGR1 FPU_IE_4 LL_SYSCFG_IsEnabledIT_FPU_IDC.

Return values
Stateof bit (1 or 0).

Definition at line 720 of file stm32l4xx_ll_system.h.

721 {
722  return (READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_4) == (SYSCFG_CFGR1_FPU_IE_4));
723 }

◆ LL_SYSCFG_IsEnabledIT_FPU_IOC()

__STATIC_INLINE uint32_t LL_SYSCFG_IsEnabledIT_FPU_IOC ( void  )

Check if Floating Point Unit Invalid operation Interrupt source is enabled or disabled. SYSCFG_CFGR1 FPU_IE_0 LL_SYSCFG_IsEnabledIT_FPU_IOC.

Return values
Stateof bit (1 or 0).

Definition at line 680 of file stm32l4xx_ll_system.h.

681 {
682  return (READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_0) == (SYSCFG_CFGR1_FPU_IE_0));
683 }

◆ LL_SYSCFG_IsEnabledIT_FPU_IXC()

__STATIC_INLINE uint32_t LL_SYSCFG_IsEnabledIT_FPU_IXC ( void  )

Check if Floating Point Unit Inexact Interrupt source is enabled or disabled. SYSCFG_CFGR1 FPU_IE_5 LL_SYSCFG_IsEnabledIT_FPU_IXC.

Return values
Stateof bit (1 or 0).

Definition at line 730 of file stm32l4xx_ll_system.h.

731 {
732  return (READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_5) == (SYSCFG_CFGR1_FPU_IE_5));
733 }

◆ LL_SYSCFG_IsEnabledIT_FPU_OFC()

__STATIC_INLINE uint32_t LL_SYSCFG_IsEnabledIT_FPU_OFC ( void  )

Check if Floating Point Unit Overflow Interrupt source is enabled or disabled. SYSCFG_CFGR1 FPU_IE_3 LL_SYSCFG_IsEnabledIT_FPU_OFC.

Return values
Stateof bit (1 or 0).

Definition at line 710 of file stm32l4xx_ll_system.h.

711 {
712  return (READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_3) == (SYSCFG_CFGR1_FPU_IE_3));
713 }

◆ LL_SYSCFG_IsEnabledIT_FPU_UFC()

__STATIC_INLINE uint32_t LL_SYSCFG_IsEnabledIT_FPU_UFC ( void  )

Check if Floating Point Unit Underflow Interrupt source is enabled or disabled. SYSCFG_CFGR1 FPU_IE_2 LL_SYSCFG_IsEnabledIT_FPU_UFC.

Return values
Stateof bit (1 or 0).

Definition at line 700 of file stm32l4xx_ll_system.h.

701 {
702  return (READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_2) == (SYSCFG_CFGR1_FPU_IE_2));
703 }

◆ LL_SYSCFG_IsSRAM2EraseOngoing()

__STATIC_INLINE uint32_t LL_SYSCFG_IsSRAM2EraseOngoing ( void  )

Check if SRAM2 erase operation is on going SYSCFG_SCSR SRAM2BSY LL_SYSCFG_IsSRAM2EraseOngoing.

Return values
Stateof bit (1 or 0).

Definition at line 838 of file stm32l4xx_ll_system.h.

839 {
840  return (READ_BIT(SYSCFG->SCSR, SYSCFG_SCSR_SRAM2BSY) == (SYSCFG_SCSR_SRAM2BSY));
841 }

◆ LL_SYSCFG_LockSRAM2WRP()

__STATIC_INLINE void LL_SYSCFG_LockSRAM2WRP ( void  )

SRAM2 page write protection lock prior to erase SYSCFG_SKR KEY LL_SYSCFG_LockSRAM2WRP.

Return values
None

Definition at line 999 of file stm32l4xx_ll_system.h.

1000 {
1001  /* Writing a wrong key reactivates the write protection */
1002  WRITE_REG(SYSCFG->SKR, 0x00);
1003 }

◆ LL_SYSCFG_SetEXTISource()

__STATIC_INLINE void LL_SYSCFG_SetEXTISource ( uint32_t  Port,
uint32_t  Line 
)

Configure source input for the EXTI external interrupt. SYSCFG_EXTICR1 EXTIx LL_SYSCFG_SetEXTISource
SYSCFG_EXTICR2 EXTIx LL_SYSCFG_SetEXTISource
SYSCFG_EXTICR3 EXTIx LL_SYSCFG_SetEXTISource
SYSCFG_EXTICR4 EXTIx LL_SYSCFG_SetEXTISource.

Parameters
PortThis parameter can be one of the following values:
  • LL_SYSCFG_EXTI_PORTA
  • LL_SYSCFG_EXTI_PORTB
  • LL_SYSCFG_EXTI_PORTC
  • LL_SYSCFG_EXTI_PORTD
  • LL_SYSCFG_EXTI_PORTE
  • LL_SYSCFG_EXTI_PORTF (*)
  • LL_SYSCFG_EXTI_PORTG (*)
  • LL_SYSCFG_EXTI_PORTH
  • LL_SYSCFG_EXTI_PORTI (*)
(*) value not defined in all devices
LineThis parameter can be one of the following values:
  • LL_SYSCFG_EXTI_LINE0
  • LL_SYSCFG_EXTI_LINE1
  • LL_SYSCFG_EXTI_LINE2
  • LL_SYSCFG_EXTI_LINE3
  • LL_SYSCFG_EXTI_LINE4
  • LL_SYSCFG_EXTI_LINE5
  • LL_SYSCFG_EXTI_LINE6
  • LL_SYSCFG_EXTI_LINE7
  • LL_SYSCFG_EXTI_LINE8
  • LL_SYSCFG_EXTI_LINE9
  • LL_SYSCFG_EXTI_LINE10
  • LL_SYSCFG_EXTI_LINE11
  • LL_SYSCFG_EXTI_LINE12
  • LL_SYSCFG_EXTI_LINE13
  • LL_SYSCFG_EXTI_LINE14
  • LL_SYSCFG_EXTI_LINE15
Return values
None

Definition at line 772 of file stm32l4xx_ll_system.h.

773 {
774  MODIFY_REG(SYSCFG->EXTICR[Line & 0xFFU], (Line >> 16U), Port << POSITION_VAL((Line >> 16U)));
775 }
MODIFY_REG(hrtc->Instance->CR, RTC_CR_WUCKSEL,(uint32_t) WakeUpClock)

◆ LL_SYSCFG_SetFlashBankMode()

__STATIC_INLINE void LL_SYSCFG_SetFlashBankMode ( uint32_t  Bank)

Select Flash bank mode (Bank flashed at 0x08000000) SYSCFG_MEMRMP FB_MODE LL_SYSCFG_SetFlashBankMode.

Parameters
BankThis parameter can be one of the following values:
  • LL_SYSCFG_BANKMODE_BANK1
  • LL_SYSCFG_BANKMODE_BANK2
Return values
None

Definition at line 435 of file stm32l4xx_ll_system.h.

436 {
437  MODIFY_REG(SYSCFG->MEMRMP, SYSCFG_MEMRMP_FB_MODE, Bank);
438 }
MODIFY_REG(hrtc->Instance->CR, RTC_CR_WUCKSEL,(uint32_t) WakeUpClock)

◆ LL_SYSCFG_SetRemapMemory()

__STATIC_INLINE void LL_SYSCFG_SetRemapMemory ( uint32_t  Memory)

Set memory mapping at address 0x00000000 SYSCFG_MEMRMP MEM_MODE LL_SYSCFG_SetRemapMemory.

Parameters
MemoryThis parameter can be one of the following values:
  • LL_SYSCFG_REMAP_FLASH
  • LL_SYSCFG_REMAP_SYSTEMFLASH
  • LL_SYSCFG_REMAP_SRAM
  • LL_SYSCFG_REMAP_FMC (*)
  • LL_SYSCFG_REMAP_QUADSPI
(*) value not defined in all devices
Return values
None

Definition at line 404 of file stm32l4xx_ll_system.h.

405 {
406  MODIFY_REG(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE, Memory);
407 }
MODIFY_REG(hrtc->Instance->CR, RTC_CR_WUCKSEL,(uint32_t) WakeUpClock)

◆ LL_SYSCFG_SetTIMBreakInputs()

__STATIC_INLINE void LL_SYSCFG_SetTIMBreakInputs ( uint32_t  Break)

Set connections to TIM1/8/15/16/17 Break inputs SYSCFG_CFGR2 CLL LL_SYSCFG_SetTIMBreakInputs
SYSCFG_CFGR2 SPL LL_SYSCFG_SetTIMBreakInputs
SYSCFG_CFGR2 PVDL LL_SYSCFG_SetTIMBreakInputs
SYSCFG_CFGR2 ECCL LL_SYSCFG_SetTIMBreakInputs.

Parameters
BreakThis parameter can be a combination of the following values:
  • LL_SYSCFG_TIMBREAK_ECC
  • LL_SYSCFG_TIMBREAK_PVD
  • LL_SYSCFG_TIMBREAK_SRAM2_PARITY
  • LL_SYSCFG_TIMBREAK_LOCKUP
Return values
None

Definition at line 856 of file stm32l4xx_ll_system.h.

857 {
858  MODIFY_REG(SYSCFG->CFGR2, SYSCFG_CFGR2_CLL | SYSCFG_CFGR2_SPL | SYSCFG_CFGR2_PVDL | SYSCFG_CFGR2_ECCL, Break);
859 }
MODIFY_REG(hrtc->Instance->CR, RTC_CR_WUCKSEL,(uint32_t) WakeUpClock)

◆ LL_SYSCFG_UnlockSRAM2WRP()

__STATIC_INLINE void LL_SYSCFG_UnlockSRAM2WRP ( void  )

SRAM2 page write protection unlock prior to erase SYSCFG_SKR KEY LL_SYSCFG_UnlockSRAM2WRP.

Return values
None

Definition at line 1010 of file stm32l4xx_ll_system.h.

1011 {
1012  /* unlock the write protection of the SRAM2ER bit */
1013  WRITE_REG(SYSCFG->SKR, 0xCA);
1014  WRITE_REG(SYSCFG->SKR, 0x53);
1015 }