Functions
__STATIC_INLINE void	LL_TIM_OC_ConfigOutput (TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Configuration)
	Configure an output channel. CCMR1 CC1S LL_TIM_OC_ConfigOutput CCMR1 CC2S LL_TIM_OC_ConfigOutput CCMR2 CC3S LL_TIM_OC_ConfigOutput CCMR2 CC4S LL_TIM_OC_ConfigOutput CCMR3 CC5S LL_TIM_OC_ConfigOutput CCMR3 CC6S LL_TIM_OC_ConfigOutput CCER CC1P LL_TIM_OC_ConfigOutput CCER CC2P LL_TIM_OC_ConfigOutput CCER CC3P LL_TIM_OC_ConfigOutput CCER CC4P LL_TIM_OC_ConfigOutput CCER CC5P LL_TIM_OC_ConfigOutput CCER CC6P LL_TIM_OC_ConfigOutput CR2 OIS1 LL_TIM_OC_ConfigOutput CR2 OIS2 LL_TIM_OC_ConfigOutput CR2 OIS3 LL_TIM_OC_ConfigOutput CR2 OIS4 LL_TIM_OC_ConfigOutput CR2 OIS5 LL_TIM_OC_ConfigOutput CR2 OIS6 LL_TIM_OC_ConfigOutput. More...

__STATIC_INLINE void	LL_TIM_OC_SetMode (TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Mode)
	Define the behavior of the output reference signal OCxREF from which OCx and OCxN (when relevant) are derived. CCMR1 OC1M LL_TIM_OC_SetMode CCMR1 OC2M LL_TIM_OC_SetMode CCMR2 OC3M LL_TIM_OC_SetMode CCMR2 OC4M LL_TIM_OC_SetMode CCMR3 OC5M LL_TIM_OC_SetMode CCMR3 OC6M LL_TIM_OC_SetMode. More...

__STATIC_INLINE uint32_t	LL_TIM_OC_GetMode (TIM_TypeDef *TIMx, uint32_t Channel)
	Get the output compare mode of an output channel. CCMR1 OC1M LL_TIM_OC_GetMode CCMR1 OC2M LL_TIM_OC_GetMode CCMR2 OC3M LL_TIM_OC_GetMode CCMR2 OC4M LL_TIM_OC_GetMode CCMR3 OC5M LL_TIM_OC_GetMode CCMR3 OC6M LL_TIM_OC_GetMode. More...

__STATIC_INLINE void	LL_TIM_OC_SetPolarity (TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Polarity)
	Set the polarity of an output channel. CCER CC1P LL_TIM_OC_SetPolarity CCER CC1NP LL_TIM_OC_SetPolarity CCER CC2P LL_TIM_OC_SetPolarity CCER CC2NP LL_TIM_OC_SetPolarity CCER CC3P LL_TIM_OC_SetPolarity CCER CC3NP LL_TIM_OC_SetPolarity CCER CC4P LL_TIM_OC_SetPolarity CCER CC5P LL_TIM_OC_SetPolarity CCER CC6P LL_TIM_OC_SetPolarity. More...

__STATIC_INLINE uint32_t	LL_TIM_OC_GetPolarity (TIM_TypeDef *TIMx, uint32_t Channel)
	Get the polarity of an output channel. CCER CC1P LL_TIM_OC_GetPolarity CCER CC1NP LL_TIM_OC_GetPolarity CCER CC2P LL_TIM_OC_GetPolarity CCER CC2NP LL_TIM_OC_GetPolarity CCER CC3P LL_TIM_OC_GetPolarity CCER CC3NP LL_TIM_OC_GetPolarity CCER CC4P LL_TIM_OC_GetPolarity CCER CC5P LL_TIM_OC_GetPolarity CCER CC6P LL_TIM_OC_GetPolarity. More...

__STATIC_INLINE void	LL_TIM_OC_SetIdleState (TIM_TypeDef *TIMx, uint32_t Channel, uint32_t IdleState)
	Set the IDLE state of an output channel. More...

__STATIC_INLINE uint32_t	LL_TIM_OC_GetIdleState (TIM_TypeDef *TIMx, uint32_t Channel)
	Get the IDLE state of an output channel CR2 OIS1 LL_TIM_OC_GetIdleState CR2 OIS2N LL_TIM_OC_GetIdleState CR2 OIS2 LL_TIM_OC_GetIdleState CR2 OIS2N LL_TIM_OC_GetIdleState CR2 OIS3 LL_TIM_OC_GetIdleState CR2 OIS3N LL_TIM_OC_GetIdleState CR2 OIS4 LL_TIM_OC_GetIdleState CR2 OIS5 LL_TIM_OC_GetIdleState CR2 OIS6 LL_TIM_OC_GetIdleState. More...

__STATIC_INLINE void	LL_TIM_OC_EnableFast (TIM_TypeDef *TIMx, uint32_t Channel)
	Enable fast mode for the output channel. More...

__STATIC_INLINE void	LL_TIM_OC_DisableFast (TIM_TypeDef *TIMx, uint32_t Channel)
	Disable fast mode for the output channel. CCMR1 OC1FE LL_TIM_OC_DisableFast CCMR1 OC2FE LL_TIM_OC_DisableFast CCMR2 OC3FE LL_TIM_OC_DisableFast CCMR2 OC4FE LL_TIM_OC_DisableFast CCMR3 OC5FE LL_TIM_OC_DisableFast CCMR3 OC6FE LL_TIM_OC_DisableFast. More...

__STATIC_INLINE uint32_t	LL_TIM_OC_IsEnabledFast (TIM_TypeDef *TIMx, uint32_t Channel)
	Indicates whether fast mode is enabled for the output channel. CCMR1 OC1FE LL_TIM_OC_IsEnabledFast CCMR1 OC2FE LL_TIM_OC_IsEnabledFast CCMR2 OC3FE LL_TIM_OC_IsEnabledFast CCMR2 OC4FE LL_TIM_OC_IsEnabledFast CCMR3 OC5FE LL_TIM_OC_IsEnabledFast CCMR3 OC6FE LL_TIM_OC_IsEnabledFast. More...

__STATIC_INLINE void	LL_TIM_OC_EnablePreload (TIM_TypeDef *TIMx, uint32_t Channel)
	Enable compare register (TIMx_CCRx) preload for the output channel. CCMR1 OC1PE LL_TIM_OC_EnablePreload CCMR1 OC2PE LL_TIM_OC_EnablePreload CCMR2 OC3PE LL_TIM_OC_EnablePreload CCMR2 OC4PE LL_TIM_OC_EnablePreload CCMR3 OC5PE LL_TIM_OC_EnablePreload CCMR3 OC6PE LL_TIM_OC_EnablePreload. More...

__STATIC_INLINE void	LL_TIM_OC_DisablePreload (TIM_TypeDef *TIMx, uint32_t Channel)
	Disable compare register (TIMx_CCRx) preload for the output channel. CCMR1 OC1PE LL_TIM_OC_DisablePreload CCMR1 OC2PE LL_TIM_OC_DisablePreload CCMR2 OC3PE LL_TIM_OC_DisablePreload CCMR2 OC4PE LL_TIM_OC_DisablePreload CCMR3 OC5PE LL_TIM_OC_DisablePreload CCMR3 OC6PE LL_TIM_OC_DisablePreload. More...

__STATIC_INLINE uint32_t	LL_TIM_OC_IsEnabledPreload (TIM_TypeDef *TIMx, uint32_t Channel)
	Indicates whether compare register (TIMx_CCRx) preload is enabled for the output channel. CCMR1 OC1PE LL_TIM_OC_IsEnabledPreload CCMR1 OC2PE LL_TIM_OC_IsEnabledPreload CCMR2 OC3PE LL_TIM_OC_IsEnabledPreload CCMR2 OC4PE LL_TIM_OC_IsEnabledPreload CCMR3 OC5PE LL_TIM_OC_IsEnabledPreload CCMR3 OC6PE LL_TIM_OC_IsEnabledPreload. More...

__STATIC_INLINE void	LL_TIM_OC_EnableClear (TIM_TypeDef *TIMx, uint32_t Channel)
	Enable clearing the output channel on an external event. More...

__STATIC_INLINE void	LL_TIM_OC_DisableClear (TIM_TypeDef *TIMx, uint32_t Channel)
	Disable clearing the output channel on an external event. More...

__STATIC_INLINE uint32_t	LL_TIM_OC_IsEnabledClear (TIM_TypeDef *TIMx, uint32_t Channel)
	Indicates clearing the output channel on an external event is enabled for the output channel. More...

__STATIC_INLINE void	LL_TIM_OC_SetDeadTime (TIM_TypeDef *TIMx, uint32_t DeadTime)
	Set the dead-time delay (delay inserted between the rising edge of the OCxREF signal and the rising edge of the Ocx and OCxN signals). More...

__STATIC_INLINE void	LL_TIM_OC_SetCompareCH1 (TIM_TypeDef *TIMx, uint32_t CompareValue)
	Set compare value for output channel 1 (TIMx_CCR1). More...

__STATIC_INLINE void	LL_TIM_OC_SetCompareCH2 (TIM_TypeDef *TIMx, uint32_t CompareValue)
	Set compare value for output channel 2 (TIMx_CCR2). More...

__STATIC_INLINE void	LL_TIM_OC_SetCompareCH3 (TIM_TypeDef *TIMx, uint32_t CompareValue)
	Set compare value for output channel 3 (TIMx_CCR3). More...

__STATIC_INLINE void	LL_TIM_OC_SetCompareCH4 (TIM_TypeDef *TIMx, uint32_t CompareValue)
	Set compare value for output channel 4 (TIMx_CCR4). More...

__STATIC_INLINE void	LL_TIM_OC_SetCompareCH5 (TIM_TypeDef *TIMx, uint32_t CompareValue)
	Set compare value for output channel 5 (TIMx_CCR5). More...

__STATIC_INLINE void	LL_TIM_OC_SetCompareCH6 (TIM_TypeDef *TIMx, uint32_t CompareValue)
	Set compare value for output channel 6 (TIMx_CCR6). More...

__STATIC_INLINE uint32_t	LL_TIM_OC_GetCompareCH1 (TIM_TypeDef *TIMx)
	Get compare value (TIMx_CCR1) set for output channel 1. More...

__STATIC_INLINE uint32_t	LL_TIM_OC_GetCompareCH2 (TIM_TypeDef *TIMx)
	Get compare value (TIMx_CCR2) set for output channel 2. More...

__STATIC_INLINE uint32_t	LL_TIM_OC_GetCompareCH3 (TIM_TypeDef *TIMx)
	Get compare value (TIMx_CCR3) set for output channel 3. More...

__STATIC_INLINE uint32_t	LL_TIM_OC_GetCompareCH4 (TIM_TypeDef *TIMx)
	Get compare value (TIMx_CCR4) set for output channel 4. More...

__STATIC_INLINE uint32_t	LL_TIM_OC_GetCompareCH5 (TIM_TypeDef *TIMx)
	Get compare value (TIMx_CCR5) set for output channel 5. More...

__STATIC_INLINE uint32_t	LL_TIM_OC_GetCompareCH6 (TIM_TypeDef *TIMx)
	Get compare value (TIMx_CCR6) set for output channel 6. More...

__STATIC_INLINE void	LL_TIM_SetCH5CombinedChannels (TIM_TypeDef *TIMx, uint32_t GroupCH5)
	Select on which reference signal the OC5REF is combined to. More...

Detailed Description

Function Documentation

◆ LL_TIM_OC_ConfigOutput()

__STATIC_INLINE void LL_TIM_OC_ConfigOutput	(	TIM_TypeDef *	TIMx,
		uint32_t	Channel,
		uint32_t	Configuration
	)

Configure an output channel. CCMR1 CC1S LL_TIM_OC_ConfigOutput
CCMR1 CC2S LL_TIM_OC_ConfigOutput
CCMR2 CC3S LL_TIM_OC_ConfigOutput
CCMR2 CC4S LL_TIM_OC_ConfigOutput
CCMR3 CC5S LL_TIM_OC_ConfigOutput
CCMR3 CC6S LL_TIM_OC_ConfigOutput
CCER CC1P LL_TIM_OC_ConfigOutput
CCER CC2P LL_TIM_OC_ConfigOutput
CCER CC3P LL_TIM_OC_ConfigOutput
CCER CC4P LL_TIM_OC_ConfigOutput
CCER CC5P LL_TIM_OC_ConfigOutput
CCER CC6P LL_TIM_OC_ConfigOutput
CR2 OIS1 LL_TIM_OC_ConfigOutput
CR2 OIS2 LL_TIM_OC_ConfigOutput
CR2 OIS3 LL_TIM_OC_ConfigOutput
CR2 OIS4 LL_TIM_OC_ConfigOutput
CR2 OIS5 LL_TIM_OC_ConfigOutput
CR2 OIS6 LL_TIM_OC_ConfigOutput.

Parameters

TIMx	Timer instance
Channel	This parameter can be one of the following values: LL_TIM_CHANNEL_CH1 LL_TIM_CHANNEL_CH2 LL_TIM_CHANNEL_CH3 LL_TIM_CHANNEL_CH4 LL_TIM_CHANNEL_CH5 LL_TIM_CHANNEL_CH6
Configuration	This parameter must be a combination of all the following values: LL_TIM_OCPOLARITY_HIGH or LL_TIM_OCPOLARITY_LOW LL_TIM_OCIDLESTATE_LOW or LL_TIM_OCIDLESTATE_HIGH

Return values

None

Definition at line 2047 of file stm32l4xx_ll_tim.h.

 {
   register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
   register __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
   CLEAR_BIT(*pReg, (TIM_CCMR1_CC1S << SHIFT_TAB_OCxx[iChannel]));
   MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]),
              (Configuration & TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]);
   MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]),
              (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]);
 }

◆ LL_TIM_OC_DisableClear()

__STATIC_INLINE void LL_TIM_OC_DisableClear	(	TIM_TypeDef *	TIMx,
		uint32_t	Channel
	)

Disable clearing the output channel on an external event.

Note: Macro IS_TIM_OCXREF_CLEAR_INSTANCE(TIMx) can be used to check whether or not a timer instance can clear the OCxREF signal on an external event. CCMR1 OC1CE LL_TIM_OC_DisableClear
CCMR1 OC2CE LL_TIM_OC_DisableClear
CCMR2 OC3CE LL_TIM_OC_DisableClear
CCMR2 OC4CE LL_TIM_OC_DisableClear
CCMR3 OC5CE LL_TIM_OC_DisableClear
CCMR3 OC6CE LL_TIM_OC_DisableClear

Parameters

TIMx	Timer instance
Channel	This parameter can be one of the following values: LL_TIM_CHANNEL_CH1 LL_TIM_CHANNEL_CH2 LL_TIM_CHANNEL_CH3 LL_TIM_CHANNEL_CH4 LL_TIM_CHANNEL_CH5 LL_TIM_CHANNEL_CH6

Return values

None

Definition at line 2475 of file stm32l4xx_ll_tim.h.

 {
   register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
   register __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
   CLEAR_BIT(*pReg, (TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel]));
 }

◆ LL_TIM_OC_DisableFast()

__STATIC_INLINE void LL_TIM_OC_DisableFast	(	TIM_TypeDef *	TIMx,
		uint32_t	Channel
	)

Disable fast mode for the output channel. CCMR1 OC1FE LL_TIM_OC_DisableFast
CCMR1 OC2FE LL_TIM_OC_DisableFast
CCMR2 OC3FE LL_TIM_OC_DisableFast
CCMR2 OC4FE LL_TIM_OC_DisableFast
CCMR3 OC5FE LL_TIM_OC_DisableFast
CCMR3 OC6FE LL_TIM_OC_DisableFast.

Parameters

TIMx	Timer instance
Channel	This parameter can be one of the following values: LL_TIM_CHANNEL_CH1 LL_TIM_CHANNEL_CH2 LL_TIM_CHANNEL_CH3 LL_TIM_CHANNEL_CH4 LL_TIM_CHANNEL_CH5 LL_TIM_CHANNEL_CH6

Return values

None

Definition at line 2317 of file stm32l4xx_ll_tim.h.

 {
   register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
   register __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
   CLEAR_BIT(*pReg, (TIM_CCMR1_OC1FE << SHIFT_TAB_OCxx[iChannel]));
 
 }

◆ LL_TIM_OC_DisablePreload()

__STATIC_INLINE void LL_TIM_OC_DisablePreload	(	TIM_TypeDef *	TIMx,
		uint32_t	Channel
	)

Disable compare register (TIMx_CCRx) preload for the output channel. CCMR1 OC1PE LL_TIM_OC_DisablePreload
CCMR1 OC2PE LL_TIM_OC_DisablePreload
CCMR2 OC3PE LL_TIM_OC_DisablePreload
CCMR2 OC4PE LL_TIM_OC_DisablePreload
CCMR3 OC5PE LL_TIM_OC_DisablePreload
CCMR3 OC6PE LL_TIM_OC_DisablePreload.

Parameters

TIMx	Timer instance
Channel	This parameter can be one of the following values: LL_TIM_CHANNEL_CH1 LL_TIM_CHANNEL_CH2 LL_TIM_CHANNEL_CH3 LL_TIM_CHANNEL_CH4 LL_TIM_CHANNEL_CH5 LL_TIM_CHANNEL_CH6

Return values

None

Definition at line 2394 of file stm32l4xx_ll_tim.h.

 {
   register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
   register __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
   CLEAR_BIT(*pReg, (TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel]));
 }

◆ LL_TIM_OC_EnableClear()

__STATIC_INLINE void LL_TIM_OC_EnableClear	(	TIM_TypeDef *	TIMx,
		uint32_t	Channel
	)

Enable clearing the output channel on an external event.

Note: This function can only be used in Output compare and PWM modes. It does not work in Forced mode.; Macro IS_TIM_OCXREF_CLEAR_INSTANCE(TIMx) can be used to check whether or not a timer instance can clear the OCxREF signal on an external event. CCMR1 OC1CE LL_TIM_OC_EnableClear
CCMR1 OC2CE LL_TIM_OC_EnableClear
CCMR2 OC3CE LL_TIM_OC_EnableClear
CCMR2 OC4CE LL_TIM_OC_EnableClear
CCMR3 OC5CE LL_TIM_OC_EnableClear
CCMR3 OC6CE LL_TIM_OC_EnableClear

Parameters

TIMx	Timer instance
Channel	This parameter can be one of the following values: LL_TIM_CHANNEL_CH1 LL_TIM_CHANNEL_CH2 LL_TIM_CHANNEL_CH3 LL_TIM_CHANNEL_CH4 LL_TIM_CHANNEL_CH5 LL_TIM_CHANNEL_CH6

Return values

None

Definition at line 2448 of file stm32l4xx_ll_tim.h.

 {
   register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
   register __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
   SET_BIT(*pReg, (TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel]));
 }

◆ LL_TIM_OC_EnableFast()

__STATIC_INLINE void LL_TIM_OC_EnableFast	(	TIM_TypeDef *	TIMx,
		uint32_t	Channel
	)

Enable fast mode for the output channel.

Note: Acts only if the channel is configured in PWM1 or PWM2 mode. CCMR1 OC1FE LL_TIM_OC_EnableFast
CCMR1 OC2FE LL_TIM_OC_EnableFast
CCMR2 OC3FE LL_TIM_OC_EnableFast
CCMR2 OC4FE LL_TIM_OC_EnableFast
CCMR3 OC5FE LL_TIM_OC_EnableFast
CCMR3 OC6FE LL_TIM_OC_EnableFast

Parameters

TIMx	Timer instance
Channel	This parameter can be one of the following values: LL_TIM_CHANNEL_CH1 LL_TIM_CHANNEL_CH2 LL_TIM_CHANNEL_CH3 LL_TIM_CHANNEL_CH4 LL_TIM_CHANNEL_CH5 LL_TIM_CHANNEL_CH6

Return values

None

Definition at line 2291 of file stm32l4xx_ll_tim.h.

 {
   register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
   register __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
   SET_BIT(*pReg, (TIM_CCMR1_OC1FE << SHIFT_TAB_OCxx[iChannel]));
 
 }

◆ LL_TIM_OC_EnablePreload()

__STATIC_INLINE void LL_TIM_OC_EnablePreload	(	TIM_TypeDef *	TIMx,
		uint32_t	Channel
	)

Enable compare register (TIMx_CCRx) preload for the output channel. CCMR1 OC1PE LL_TIM_OC_EnablePreload
CCMR1 OC2PE LL_TIM_OC_EnablePreload
CCMR2 OC3PE LL_TIM_OC_EnablePreload
CCMR2 OC4PE LL_TIM_OC_EnablePreload
CCMR3 OC5PE LL_TIM_OC_EnablePreload
CCMR3 OC6PE LL_TIM_OC_EnablePreload.

Parameters

TIMx	Timer instance
Channel	This parameter can be one of the following values: LL_TIM_CHANNEL_CH1 LL_TIM_CHANNEL_CH2 LL_TIM_CHANNEL_CH3 LL_TIM_CHANNEL_CH4 LL_TIM_CHANNEL_CH5 LL_TIM_CHANNEL_CH6

Return values

None

Definition at line 2369 of file stm32l4xx_ll_tim.h.

 {
   register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
   register __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
   SET_BIT(*pReg, (TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel]));
 }

◆ LL_TIM_OC_GetCompareCH1()

__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH1 ( TIM_TypeDef * TIMx )

Get compare value (TIMx_CCR1) set for output channel 1.

Note: In 32-bit timer implementations returned compare value can be between 0x00000000 and 0xFFFFFFFF.; Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check whether or not a timer instance supports a 32 bits counter.; Macro IS_TIM_CC1_INSTANCE(TIMx) can be used to check whether or not output channel 1 is supported by a timer instance. CCR1 CCR1 LL_TIM_OC_GetCompareCH1

Parameters

TIMx	Timer instance

Return values

CompareValue (between Min_Data=0 and Max_Data=65535)

Definition at line 2634 of file stm32l4xx_ll_tim.h.

 {
   return (uint32_t)(READ_REG(TIMx->CCR1));
 }

◆ LL_TIM_OC_GetCompareCH2()

__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH2 ( TIM_TypeDef * TIMx )

Get compare value (TIMx_CCR2) set for output channel 2.

Note: In 32-bit timer implementations returned compare value can be between 0x00000000 and 0xFFFFFFFF.; Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check whether or not a timer instance supports a 32 bits counter.; Macro IS_TIM_CC2_INSTANCE(TIMx) can be used to check whether or not output channel 2 is supported by a timer instance. CCR2 CCR2 LL_TIM_OC_GetCompareCH2

Parameters

TIMx	Timer instance

Return values

CompareValue (between Min_Data=0 and Max_Data=65535)

Definition at line 2650 of file stm32l4xx_ll_tim.h.

 {
   return (uint32_t)(READ_REG(TIMx->CCR2));
 }

◆ LL_TIM_OC_GetCompareCH3()

__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH3 ( TIM_TypeDef * TIMx )

Get compare value (TIMx_CCR3) set for output channel 3.

Note: In 32-bit timer implementations returned compare value can be between 0x00000000 and 0xFFFFFFFF.; Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check whether or not a timer instance supports a 32 bits counter.; Macro IS_TIM_CC3_INSTANCE(TIMx) can be used to check whether or not output channel 3 is supported by a timer instance. CCR3 CCR3 LL_TIM_OC_GetCompareCH3

Parameters

TIMx	Timer instance

Return values

CompareValue (between Min_Data=0 and Max_Data=65535)

Definition at line 2666 of file stm32l4xx_ll_tim.h.

 {
   return (uint32_t)(READ_REG(TIMx->CCR3));
 }

◆ LL_TIM_OC_GetCompareCH4()

__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH4 ( TIM_TypeDef * TIMx )

Get compare value (TIMx_CCR4) set for output channel 4.

Note: In 32-bit timer implementations returned compare value can be between 0x00000000 and 0xFFFFFFFF.; Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check whether or not a timer instance supports a 32 bits counter.; Macro IS_TIM_CC4_INSTANCE(TIMx) can be used to check whether or not output channel 4 is supported by a timer instance. CCR4 CCR4 LL_TIM_OC_GetCompareCH4

Parameters

TIMx	Timer instance

Return values

CompareValue (between Min_Data=0 and Max_Data=65535)

Definition at line 2682 of file stm32l4xx_ll_tim.h.

 {
   return (uint32_t)(READ_REG(TIMx->CCR4));
 }

◆ LL_TIM_OC_GetCompareCH5()

__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH5 ( TIM_TypeDef * TIMx )

Get compare value (TIMx_CCR5) set for output channel 5.

Note: Macro IS_TIM_CC5_INSTANCE(TIMx) can be used to check whether or not output channel 5 is supported by a timer instance. CCR5 CCR5 LL_TIM_OC_GetCompareCH5

Parameters

TIMx	Timer instance

Return values

CompareValue (between Min_Data=0 and Max_Data=65535)

Definition at line 2695 of file stm32l4xx_ll_tim.h.

 {
   return (uint32_t)(READ_BIT(TIMx->CCR5, TIM_CCR5_CCR5));
 }

◆ LL_TIM_OC_GetCompareCH6()

__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH6 ( TIM_TypeDef * TIMx )

Get compare value (TIMx_CCR6) set for output channel 6.

Note: Macro IS_TIM_CC6_INSTANCE(TIMx) can be used to check whether or not output channel 6 is supported by a timer instance. CCR6 CCR6 LL_TIM_OC_GetCompareCH6

Parameters

TIMx	Timer instance

Return values

CompareValue (between Min_Data=0 and Max_Data=65535)

Definition at line 2708 of file stm32l4xx_ll_tim.h.

 {
   return (uint32_t)(READ_REG(TIMx->CCR6));
 }

◆ LL_TIM_OC_GetIdleState()

__STATIC_INLINE uint32_t LL_TIM_OC_GetIdleState	(	TIM_TypeDef *	TIMx,
		uint32_t	Channel
	)

Get the IDLE state of an output channel CR2 OIS1 LL_TIM_OC_GetIdleState
CR2 OIS2N LL_TIM_OC_GetIdleState
CR2 OIS2 LL_TIM_OC_GetIdleState
CR2 OIS2N LL_TIM_OC_GetIdleState
CR2 OIS3 LL_TIM_OC_GetIdleState
CR2 OIS3N LL_TIM_OC_GetIdleState
CR2 OIS4 LL_TIM_OC_GetIdleState
CR2 OIS5 LL_TIM_OC_GetIdleState
CR2 OIS6 LL_TIM_OC_GetIdleState.

Parameters

TIMx	Timer instance
Channel	This parameter can be one of the following values: LL_TIM_CHANNEL_CH1 LL_TIM_CHANNEL_CH1N LL_TIM_CHANNEL_CH2 LL_TIM_CHANNEL_CH2N LL_TIM_CHANNEL_CH3 LL_TIM_CHANNEL_CH3N LL_TIM_CHANNEL_CH4 LL_TIM_CHANNEL_CH5 LL_TIM_CHANNEL_CH6

Return values

Returned

value can be one of the following values:

LL_TIM_OCIDLESTATE_LOW
LL_TIM_OCIDLESTATE_HIGH

Definition at line 2266 of file stm32l4xx_ll_tim.h.

 {
   register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
   return (READ_BIT(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel])) >> SHIFT_TAB_OISx[iChannel]);
 }

◆ LL_TIM_OC_GetMode()

__STATIC_INLINE uint32_t LL_TIM_OC_GetMode	(	TIM_TypeDef *	TIMx,
		uint32_t	Channel
	)

Get the output compare mode of an output channel. CCMR1 OC1M LL_TIM_OC_GetMode
CCMR1 OC2M LL_TIM_OC_GetMode
CCMR2 OC3M LL_TIM_OC_GetMode
CCMR2 OC4M LL_TIM_OC_GetMode
CCMR3 OC5M LL_TIM_OC_GetMode
CCMR3 OC6M LL_TIM_OC_GetMode.

Parameters

TIMx	Timer instance
Channel	This parameter can be one of the following values: LL_TIM_CHANNEL_CH1 LL_TIM_CHANNEL_CH2 LL_TIM_CHANNEL_CH3 LL_TIM_CHANNEL_CH4 LL_TIM_CHANNEL_CH5 LL_TIM_CHANNEL_CH6

Return values

Returned

value can be one of the following values:

LL_TIM_OCMODE_FROZEN
LL_TIM_OCMODE_ACTIVE
LL_TIM_OCMODE_INACTIVE
LL_TIM_OCMODE_TOGGLE
LL_TIM_OCMODE_FORCED_INACTIVE
LL_TIM_OCMODE_FORCED_ACTIVE
LL_TIM_OCMODE_PWM1
LL_TIM_OCMODE_PWM2
LL_TIM_OCMODE_RETRIG_OPM1
LL_TIM_OCMODE_RETRIG_OPM2
LL_TIM_OCMODE_COMBINED_PWM1
LL_TIM_OCMODE_COMBINED_PWM2
LL_TIM_OCMODE_ASSYMETRIC_PWM1
LL_TIM_OCMODE_ASSYMETRIC_PWM2

Definition at line 2131 of file stm32l4xx_ll_tim.h.

 {
   register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
   register const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
   return (READ_BIT(*pReg, ((TIM_CCMR1_OC1M  | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel])) >> SHIFT_TAB_OCxx[iChannel]);
 }

◆ LL_TIM_OC_GetPolarity()

__STATIC_INLINE uint32_t LL_TIM_OC_GetPolarity	(	TIM_TypeDef *	TIMx,
		uint32_t	Channel
	)

Get the polarity of an output channel. CCER CC1P LL_TIM_OC_GetPolarity
CCER CC1NP LL_TIM_OC_GetPolarity
CCER CC2P LL_TIM_OC_GetPolarity
CCER CC2NP LL_TIM_OC_GetPolarity
CCER CC3P LL_TIM_OC_GetPolarity
CCER CC3NP LL_TIM_OC_GetPolarity
CCER CC4P LL_TIM_OC_GetPolarity
CCER CC5P LL_TIM_OC_GetPolarity
CCER CC6P LL_TIM_OC_GetPolarity.

Parameters

TIMx	Timer instance
Channel	This parameter can be one of the following values: LL_TIM_CHANNEL_CH1 LL_TIM_CHANNEL_CH1N LL_TIM_CHANNEL_CH2 LL_TIM_CHANNEL_CH2N LL_TIM_CHANNEL_CH3 LL_TIM_CHANNEL_CH3N LL_TIM_CHANNEL_CH4 LL_TIM_CHANNEL_CH5 LL_TIM_CHANNEL_CH6

Return values

Returned

value can be one of the following values:

LL_TIM_OCPOLARITY_HIGH
LL_TIM_OCPOLARITY_LOW

Definition at line 2197 of file stm32l4xx_ll_tim.h.

 {
   register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
   return (READ_BIT(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel])) >> SHIFT_TAB_CCxP[iChannel]);
 }

◆ LL_TIM_OC_IsEnabledClear()

__STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledClear	(	TIM_TypeDef *	TIMx,
		uint32_t	Channel
	)

Indicates clearing the output channel on an external event is enabled for the output channel.

Note: This function enables clearing the output channel on an external event.; This function can only be used in Output compare and PWM modes. It does not work in Forced mode.; Macro IS_TIM_OCXREF_CLEAR_INSTANCE(TIMx) can be used to check whether or not a timer instance can clear the OCxREF signal on an external event. CCMR1 OC1CE LL_TIM_OC_IsEnabledClear
CCMR1 OC2CE LL_TIM_OC_IsEnabledClear
CCMR2 OC3CE LL_TIM_OC_IsEnabledClear
CCMR2 OC4CE LL_TIM_OC_IsEnabledClear
CCMR3 OC5CE LL_TIM_OC_IsEnabledClear
CCMR3 OC6CE LL_TIM_OC_IsEnabledClear

Parameters

TIMx	Timer instance
Channel	This parameter can be one of the following values: LL_TIM_CHANNEL_CH1 LL_TIM_CHANNEL_CH2 LL_TIM_CHANNEL_CH3 LL_TIM_CHANNEL_CH4 LL_TIM_CHANNEL_CH5 LL_TIM_CHANNEL_CH6

Return values

State of bit (1 or 0).

Definition at line 2504 of file stm32l4xx_ll_tim.h.

 {
   register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
   register const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
   register uint32_t bitfield = TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel];
   return ((READ_BIT(*pReg, bitfield) == bitfield) ? 1UL : 0UL);
 }

◆ LL_TIM_OC_IsEnabledFast()

__STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledFast	(	TIM_TypeDef *	TIMx,
		uint32_t	Channel
	)

Indicates whether fast mode is enabled for the output channel. CCMR1 OC1FE LL_TIM_OC_IsEnabledFast
CCMR1 OC2FE LL_TIM_OC_IsEnabledFast
CCMR2 OC3FE LL_TIM_OC_IsEnabledFast
CCMR2 OC4FE LL_TIM_OC_IsEnabledFast
CCMR3 OC5FE LL_TIM_OC_IsEnabledFast
CCMR3 OC6FE LL_TIM_OC_IsEnabledFast.

Parameters

TIMx	Timer instance
Channel	This parameter can be one of the following values: LL_TIM_CHANNEL_CH1 LL_TIM_CHANNEL_CH2 LL_TIM_CHANNEL_CH3 LL_TIM_CHANNEL_CH4 LL_TIM_CHANNEL_CH5 LL_TIM_CHANNEL_CH6

Return values

State of bit (1 or 0).

Definition at line 2343 of file stm32l4xx_ll_tim.h.

 {
   register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
   register const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
   register uint32_t bitfield = TIM_CCMR1_OC1FE << SHIFT_TAB_OCxx[iChannel];
   return ((READ_BIT(*pReg, bitfield) == bitfield) ? 1UL : 0UL);
 }

◆ LL_TIM_OC_IsEnabledPreload()

__STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledPreload	(	TIM_TypeDef *	TIMx,
		uint32_t	Channel
	)

Indicates whether compare register (TIMx_CCRx) preload is enabled for the output channel. CCMR1 OC1PE LL_TIM_OC_IsEnabledPreload
CCMR1 OC2PE LL_TIM_OC_IsEnabledPreload
CCMR2 OC3PE LL_TIM_OC_IsEnabledPreload
CCMR2 OC4PE LL_TIM_OC_IsEnabledPreload
CCMR3 OC5PE LL_TIM_OC_IsEnabledPreload
CCMR3 OC6PE LL_TIM_OC_IsEnabledPreload.

Parameters

TIMx	Timer instance
Channel	This parameter can be one of the following values: LL_TIM_CHANNEL_CH1 LL_TIM_CHANNEL_CH2 LL_TIM_CHANNEL_CH3 LL_TIM_CHANNEL_CH4 LL_TIM_CHANNEL_CH5 LL_TIM_CHANNEL_CH6

Return values

State of bit (1 or 0).

Definition at line 2419 of file stm32l4xx_ll_tim.h.

 {
   register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
   register const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
   register uint32_t bitfield = TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel];
   return ((READ_BIT(*pReg, bitfield) == bitfield) ? 1UL : 0UL);
 }

◆ LL_TIM_OC_SetCompareCH1()

__STATIC_INLINE void LL_TIM_OC_SetCompareCH1	(	TIM_TypeDef *	TIMx,
		uint32_t	CompareValue
	)

Set compare value for output channel 1 (TIMx_CCR1).

Note: In 32-bit timer implementations compare value can be between 0x00000000 and 0xFFFFFFFF.; Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check whether or not a timer instance supports a 32 bits counter.; Macro IS_TIM_CC1_INSTANCE(TIMx) can be used to check whether or not output channel 1 is supported by a timer instance. CCR1 CCR1 LL_TIM_OC_SetCompareCH1

Parameters

TIMx	Timer instance
CompareValue	between Min_Data=0 and Max_Data=65535

Return values

None

Definition at line 2539 of file stm32l4xx_ll_tim.h.

 {
   WRITE_REG(TIMx->CCR1, CompareValue);
 }

◆ LL_TIM_OC_SetCompareCH2()

__STATIC_INLINE void LL_TIM_OC_SetCompareCH2	(	TIM_TypeDef *	TIMx,
		uint32_t	CompareValue
	)

Set compare value for output channel 2 (TIMx_CCR2).

Note: In 32-bit timer implementations compare value can be between 0x00000000 and 0xFFFFFFFF.; Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check whether or not a timer instance supports a 32 bits counter.; Macro IS_TIM_CC2_INSTANCE(TIMx) can be used to check whether or not output channel 2 is supported by a timer instance. CCR2 CCR2 LL_TIM_OC_SetCompareCH2

Parameters

TIMx	Timer instance
CompareValue	between Min_Data=0 and Max_Data=65535

Return values

None

Definition at line 2556 of file stm32l4xx_ll_tim.h.

 {
   WRITE_REG(TIMx->CCR2, CompareValue);
 }

◆ LL_TIM_OC_SetCompareCH3()

__STATIC_INLINE void LL_TIM_OC_SetCompareCH3	(	TIM_TypeDef *	TIMx,
		uint32_t	CompareValue
	)

Set compare value for output channel 3 (TIMx_CCR3).

Note: In 32-bit timer implementations compare value can be between 0x00000000 and 0xFFFFFFFF.; Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check whether or not a timer instance supports a 32 bits counter.; Macro IS_TIM_CC3_INSTANCE(TIMx) can be used to check whether or not output channel is supported by a timer instance. CCR3 CCR3 LL_TIM_OC_SetCompareCH3

Parameters

TIMx	Timer instance
CompareValue	between Min_Data=0 and Max_Data=65535

Return values

None

Definition at line 2573 of file stm32l4xx_ll_tim.h.

 {
   WRITE_REG(TIMx->CCR3, CompareValue);
 }

◆ LL_TIM_OC_SetCompareCH4()

__STATIC_INLINE void LL_TIM_OC_SetCompareCH4	(	TIM_TypeDef *	TIMx,
		uint32_t	CompareValue
	)

Set compare value for output channel 4 (TIMx_CCR4).

Note: In 32-bit timer implementations compare value can be between 0x00000000 and 0xFFFFFFFF.; Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check whether or not a timer instance supports a 32 bits counter.; Macro IS_TIM_CC4_INSTANCE(TIMx) can be used to check whether or not output channel 4 is supported by a timer instance. CCR4 CCR4 LL_TIM_OC_SetCompareCH4

Parameters

TIMx	Timer instance
CompareValue	between Min_Data=0 and Max_Data=65535

Return values

None

Definition at line 2590 of file stm32l4xx_ll_tim.h.

 {
   WRITE_REG(TIMx->CCR4, CompareValue);
 }

◆ LL_TIM_OC_SetCompareCH5()

__STATIC_INLINE void LL_TIM_OC_SetCompareCH5	(	TIM_TypeDef *	TIMx,
		uint32_t	CompareValue
	)

Set compare value for output channel 5 (TIMx_CCR5).

Note: Macro IS_TIM_CC5_INSTANCE(TIMx) can be used to check whether or not output channel 5 is supported by a timer instance. CCR5 CCR5 LL_TIM_OC_SetCompareCH5

Parameters

TIMx	Timer instance
CompareValue	between Min_Data=0 and Max_Data=65535

Return values

None

Definition at line 2604 of file stm32l4xx_ll_tim.h.

 {
   MODIFY_REG(TIMx->CCR5, TIM_CCR5_CCR5, CompareValue);
 }

◆ LL_TIM_OC_SetCompareCH6()

__STATIC_INLINE void LL_TIM_OC_SetCompareCH6	(	TIM_TypeDef *	TIMx,
		uint32_t	CompareValue
	)

Set compare value for output channel 6 (TIMx_CCR6).

Note: Macro IS_TIM_CC6_INSTANCE(TIMx) can be used to check whether or not output channel 6 is supported by a timer instance. CCR6 CCR6 LL_TIM_OC_SetCompareCH6

Parameters

TIMx	Timer instance
CompareValue	between Min_Data=0 and Max_Data=65535

Return values

None

Definition at line 2618 of file stm32l4xx_ll_tim.h.

 {
   WRITE_REG(TIMx->CCR6, CompareValue);
 }

◆ LL_TIM_OC_SetDeadTime()

__STATIC_INLINE void LL_TIM_OC_SetDeadTime	(	TIM_TypeDef *	TIMx,
		uint32_t	DeadTime
	)

Set the dead-time delay (delay inserted between the rising edge of the OCxREF signal and the rising edge of the Ocx and OCxN signals).

Note: Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not dead-time insertion feature is supported by a timer instance.; Helper macro __LL_TIM_CALC_DEADTIME can be used to calculate the DeadTime parameter BDTR DTG LL_TIM_OC_SetDeadTime

Parameters

TIMx	Timer instance
DeadTime	between Min_Data=0 and Max_Data=255

Return values

None

Definition at line 2522 of file stm32l4xx_ll_tim.h.

 {
   MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime);
 }

◆ LL_TIM_OC_SetIdleState()

__STATIC_INLINE void LL_TIM_OC_SetIdleState	(	TIM_TypeDef *	TIMx,
		uint32_t	Channel,
		uint32_t	IdleState
	)

Set the IDLE state of an output channel.

Note: This function is significant only for the timer instances supporting the break feature. Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not a timer instance provides a break input. CR2 OIS1 LL_TIM_OC_SetIdleState
CR2 OIS2N LL_TIM_OC_SetIdleState
CR2 OIS2 LL_TIM_OC_SetIdleState
CR2 OIS2N LL_TIM_OC_SetIdleState
CR2 OIS3 LL_TIM_OC_SetIdleState
CR2 OIS3N LL_TIM_OC_SetIdleState
CR2 OIS4 LL_TIM_OC_SetIdleState
CR2 OIS5 LL_TIM_OC_SetIdleState
CR2 OIS6 LL_TIM_OC_SetIdleState

Parameters

TIMx	Timer instance
Channel	This parameter can be one of the following values: LL_TIM_CHANNEL_CH1 LL_TIM_CHANNEL_CH1N LL_TIM_CHANNEL_CH2 LL_TIM_CHANNEL_CH2N LL_TIM_CHANNEL_CH3 LL_TIM_CHANNEL_CH3N LL_TIM_CHANNEL_CH4 LL_TIM_CHANNEL_CH5 LL_TIM_CHANNEL_CH6
IdleState	This parameter can be one of the following values: LL_TIM_OCIDLESTATE_LOW LL_TIM_OCIDLESTATE_HIGH

Return values

None

Definition at line 2234 of file stm32l4xx_ll_tim.h.

 {
   register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
   MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]),  IdleState << SHIFT_TAB_OISx[iChannel]);
 }

◆ LL_TIM_OC_SetMode()

__STATIC_INLINE void LL_TIM_OC_SetMode	(	TIM_TypeDef *	TIMx,
		uint32_t	Channel,
		uint32_t	Mode
	)

Define the behavior of the output reference signal OCxREF from which OCx and OCxN (when relevant) are derived. CCMR1 OC1M LL_TIM_OC_SetMode
CCMR1 OC2M LL_TIM_OC_SetMode
CCMR2 OC3M LL_TIM_OC_SetMode
CCMR2 OC4M LL_TIM_OC_SetMode
CCMR3 OC5M LL_TIM_OC_SetMode
CCMR3 OC6M LL_TIM_OC_SetMode.

Parameters

TIMx	Timer instance
Channel	This parameter can be one of the following values: LL_TIM_CHANNEL_CH1 LL_TIM_CHANNEL_CH2 LL_TIM_CHANNEL_CH3 LL_TIM_CHANNEL_CH4 LL_TIM_CHANNEL_CH5 LL_TIM_CHANNEL_CH6
Mode	This parameter can be one of the following values: LL_TIM_OCMODE_FROZEN LL_TIM_OCMODE_ACTIVE LL_TIM_OCMODE_INACTIVE LL_TIM_OCMODE_TOGGLE LL_TIM_OCMODE_FORCED_INACTIVE LL_TIM_OCMODE_FORCED_ACTIVE LL_TIM_OCMODE_PWM1 LL_TIM_OCMODE_PWM2 LL_TIM_OCMODE_RETRIG_OPM1 LL_TIM_OCMODE_RETRIG_OPM2 LL_TIM_OCMODE_COMBINED_PWM1 LL_TIM_OCMODE_COMBINED_PWM2 LL_TIM_OCMODE_ASSYMETRIC_PWM1 LL_TIM_OCMODE_ASSYMETRIC_PWM2

Return values

None

Definition at line 2092 of file stm32l4xx_ll_tim.h.

 {
   register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
   register __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
   MODIFY_REG(*pReg, ((TIM_CCMR1_OC1M  | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]),  Mode << SHIFT_TAB_OCxx[iChannel]);
 }

◆ LL_TIM_OC_SetPolarity()

__STATIC_INLINE void LL_TIM_OC_SetPolarity	(	TIM_TypeDef *	TIMx,
		uint32_t	Channel,
		uint32_t	Polarity
	)

Set the polarity of an output channel. CCER CC1P LL_TIM_OC_SetPolarity
CCER CC1NP LL_TIM_OC_SetPolarity
CCER CC2P LL_TIM_OC_SetPolarity
CCER CC2NP LL_TIM_OC_SetPolarity
CCER CC3P LL_TIM_OC_SetPolarity
CCER CC3NP LL_TIM_OC_SetPolarity
CCER CC4P LL_TIM_OC_SetPolarity
CCER CC5P LL_TIM_OC_SetPolarity
CCER CC6P LL_TIM_OC_SetPolarity.

Parameters

TIMx	Timer instance
Channel	This parameter can be one of the following values: LL_TIM_CHANNEL_CH1 LL_TIM_CHANNEL_CH1N LL_TIM_CHANNEL_CH2 LL_TIM_CHANNEL_CH2N LL_TIM_CHANNEL_CH3 LL_TIM_CHANNEL_CH3N LL_TIM_CHANNEL_CH4 LL_TIM_CHANNEL_CH5 LL_TIM_CHANNEL_CH6
Polarity	This parameter can be one of the following values: LL_TIM_OCPOLARITY_HIGH LL_TIM_OCPOLARITY_LOW

Return values

None

Definition at line 2165 of file stm32l4xx_ll_tim.h.

 {
   register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
   MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]),  Polarity << SHIFT_TAB_CCxP[iChannel]);
 }

◆ LL_TIM_SetCH5CombinedChannels()

__STATIC_INLINE void LL_TIM_SetCH5CombinedChannels	(	TIM_TypeDef *	TIMx,
		uint32_t	GroupCH5
	)

Select on which reference signal the OC5REF is combined to.

Note: Macro IS_TIM_COMBINED3PHASEPWM_INSTANCE(TIMx) can be used to check whether or not a timer instance supports the combined 3-phase PWM mode. CCR5 GC5C3 LL_TIM_SetCH5CombinedChannels
CCR5 GC5C2 LL_TIM_SetCH5CombinedChannels
CCR5 GC5C1 LL_TIM_SetCH5CombinedChannels

Parameters

TIMx	Timer instance
GroupCH5	This parameter can be a combination of the following values: LL_TIM_GROUPCH5_NONE LL_TIM_GROUPCH5_OC1REFC LL_TIM_GROUPCH5_OC2REFC LL_TIM_GROUPCH5_OC3REFC

Return values

None

Definition at line 2728 of file stm32l4xx_ll_tim.h.

 {
   MODIFY_REG(TIMx->CCR5, (TIM_CCR5_GC5C3 | TIM_CCR5_GC5C2 | TIM_CCR5_GC5C1), GroupCH5);
 }

Functions

Detailed Description

Function Documentation

◆ LL_TIM_OC_ConfigOutput()

◆ LL_TIM_OC_DisableClear()

◆ LL_TIM_OC_DisableFast()

◆ LL_TIM_OC_DisablePreload()

◆ LL_TIM_OC_EnableClear()

◆ LL_TIM_OC_EnableFast()

◆ LL_TIM_OC_EnablePreload()

◆ LL_TIM_OC_GetCompareCH1()

◆ LL_TIM_OC_GetCompareCH2()

◆ LL_TIM_OC_GetCompareCH3()

◆ LL_TIM_OC_GetCompareCH4()

◆ LL_TIM_OC_GetCompareCH5()

◆ LL_TIM_OC_GetCompareCH6()

◆ LL_TIM_OC_GetIdleState()

◆ LL_TIM_OC_GetMode()

◆ LL_TIM_OC_GetPolarity()

◆ LL_TIM_OC_IsEnabledClear()

◆ LL_TIM_OC_IsEnabledFast()

◆ LL_TIM_OC_IsEnabledPreload()

◆ LL_TIM_OC_SetCompareCH1()

◆ LL_TIM_OC_SetCompareCH2()

◆ LL_TIM_OC_SetCompareCH3()

◆ LL_TIM_OC_SetCompareCH4()

◆ LL_TIM_OC_SetCompareCH5()

◆ LL_TIM_OC_SetCompareCH6()

◆ LL_TIM_OC_SetDeadTime()

◆ LL_TIM_OC_SetIdleState()

◆ LL_TIM_OC_SetMode()

◆ LL_TIM_OC_SetPolarity()

◆ LL_TIM_SetCH5CombinedChannels()