21 #ifndef STM32L4xx_HAL_IWDG_H 22 #define STM32L4xx_HAL_IWDG_H 83 #define IWDG_PRESCALER_4 0x00000000u 84 #define IWDG_PRESCALER_8 IWDG_PR_PR_0 85 #define IWDG_PRESCALER_16 IWDG_PR_PR_1 86 #define IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) 87 #define IWDG_PRESCALER_64 IWDG_PR_PR_2 88 #define IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) 89 #define IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) 98 #define IWDG_WINDOW_DISABLE IWDG_WINR_WIN 118 #define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE) 126 #define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD) 167 #define IWDG_KEY_RELOAD 0x0000AAAAu 168 #define IWDG_KEY_ENABLE 0x0000CCCCu 169 #define IWDG_KEY_WRITE_ACCESS_ENABLE 0x00005555u 170 #define IWDG_KEY_WRITE_ACCESS_DISABLE 0x00000000u 186 #define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE) 193 #define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE) 200 #define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \ 201 ((__PRESCALER__) == IWDG_PRESCALER_8) || \ 202 ((__PRESCALER__) == IWDG_PRESCALER_16) || \ 203 ((__PRESCALER__) == IWDG_PRESCALER_32) || \ 204 ((__PRESCALER__) == IWDG_PRESCALER_64) || \ 205 ((__PRESCALER__) == IWDG_PRESCALER_128)|| \ 206 ((__PRESCALER__) == IWDG_PRESCALER_256)) 213 #define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= IWDG_RLR_RL) 220 #define IS_IWDG_WINDOW(__WINDOW__) ((__WINDOW__) <= IWDG_WINR_WIN) HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg)
Refresh the IWDG.
This file contains HAL common defines, enumeration, macros and structures definitions.
IWDG Init structure definition.
HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg)
Initialize the IWDG according to the specified parameters in the IWDG_InitTypeDef and start watchdog...
IWDG Handle Structure definition.