STM32L4xx_HAL_Driver  1.14.0
stm32l4xx_hal_lptim.c
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1 
159 /* Includes ------------------------------------------------------------------*/
160 #include "stm32l4xx_hal.h"
161 
171 #ifdef HAL_LPTIM_MODULE_ENABLED
172 
173 #if defined (LPTIM1) || defined (LPTIM2)
174 
175 /* Private typedef -----------------------------------------------------------*/
176 /* Private define ------------------------------------------------------------*/
177 /* Private macro -------------------------------------------------------------*/
178 #define TIMEOUT 1000UL /* Timeout is 1s */
179 /* Private variables ---------------------------------------------------------*/
180 /* Private function prototypes -----------------------------------------------*/
181 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
182 static void LPTIM_ResetCallback(LPTIM_HandleTypeDef *lptim);
183 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
184 
185 /* Exported functions --------------------------------------------------------*/
186 
215 HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim)
216 {
217  uint32_t tmpcfgr;
218 
219  /* Check the LPTIM handle allocation */
220  if (hlptim == NULL)
221  {
222  return HAL_ERROR;
223  }
224 
225  /* Check the parameters */
226  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
227 
228  assert_param(IS_LPTIM_CLOCK_SOURCE(hlptim->Init.Clock.Source));
229  assert_param(IS_LPTIM_CLOCK_PRESCALER(hlptim->Init.Clock.Prescaler));
230  if ((hlptim->Init.Clock.Source) == LPTIM_CLOCKSOURCE_ULPTIM)
231  {
232  assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
233  assert_param(IS_LPTIM_CLOCK_SAMPLE_TIME(hlptim->Init.UltraLowPowerClock.SampleTime));
234  }
235  assert_param(IS_LPTIM_TRG_SOURCE(hlptim->Init.Trigger.Source));
236  if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
237  {
238  assert_param(IS_LPTIM_TRIG_SAMPLE_TIME(hlptim->Init.Trigger.SampleTime));
239  assert_param(IS_LPTIM_EXT_TRG_POLARITY(hlptim->Init.Trigger.ActiveEdge));
240  }
241  assert_param(IS_LPTIM_OUTPUT_POLARITY(hlptim->Init.OutputPolarity));
242  assert_param(IS_LPTIM_UPDATE_MODE(hlptim->Init.UpdateMode));
243  assert_param(IS_LPTIM_COUNTER_SOURCE(hlptim->Init.CounterSource));
244 
245 #if defined(LPTIM_RCR_REP)
246  assert_param(IS_LPTIM_REPETITION(hlptim->Init.RepetitionCounter));
247 #endif
248 
249  if (hlptim->State == HAL_LPTIM_STATE_RESET)
250  {
251  /* Allocate lock resource and initialize it */
252  hlptim->Lock = HAL_UNLOCKED;
253 
254 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
255  /* Reset interrupt callbacks to legacy weak callbacks */
256  LPTIM_ResetCallback(hlptim);
257 
258  if (hlptim->MspInitCallback == NULL)
259  {
260  hlptim->MspInitCallback = HAL_LPTIM_MspInit;
261  }
262 
263  /* Init the low level hardware : GPIO, CLOCK, NVIC */
264  hlptim->MspInitCallback(hlptim);
265 #else
266  /* Init the low level hardware : GPIO, CLOCK, NVIC */
267  HAL_LPTIM_MspInit(hlptim);
268 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
269  }
270 
271  /* Change the LPTIM state */
272  hlptim->State = HAL_LPTIM_STATE_BUSY;
273 
274  /* Get the LPTIMx CFGR value */
275  tmpcfgr = hlptim->Instance->CFGR;
276 
277  if (((hlptim->Init.Clock.Source) == LPTIM_CLOCKSOURCE_ULPTIM) || ((hlptim->Init.CounterSource) == LPTIM_COUNTERSOURCE_EXTERNAL))
278  {
279  tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKPOL | LPTIM_CFGR_CKFLT));
280  }
281  if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
282  {
283  tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_TRGFLT | LPTIM_CFGR_TRIGSEL));
284  }
285 
286  /* Clear CKSEL, CKPOL, PRESC, TRIGEN, TRGFLT, WAVPOL, PRELOAD & COUNTMODE bits */
287  tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKSEL | LPTIM_CFGR_CKPOL | LPTIM_CFGR_TRIGEN | LPTIM_CFGR_PRELOAD |
288  LPTIM_CFGR_WAVPOL | LPTIM_CFGR_PRESC | LPTIM_CFGR_COUNTMODE));
289 
290  /* Set initialization parameters */
291  tmpcfgr |= (hlptim->Init.Clock.Source |
292  hlptim->Init.Clock.Prescaler |
293  hlptim->Init.OutputPolarity |
294  hlptim->Init.UpdateMode |
295  hlptim->Init.CounterSource);
296 
297  if (((hlptim->Init.Clock.Source) == LPTIM_CLOCKSOURCE_ULPTIM) || ((hlptim->Init.CounterSource) == LPTIM_COUNTERSOURCE_EXTERNAL))
298  {
299  tmpcfgr |= (hlptim->Init.UltraLowPowerClock.Polarity |
300  hlptim->Init.UltraLowPowerClock.SampleTime);
301  }
302 
303  if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
304  {
305  /* Enable External trigger and set the trigger source */
306  tmpcfgr |= (hlptim->Init.Trigger.Source |
307  hlptim->Init.Trigger.ActiveEdge |
308  hlptim->Init.Trigger.SampleTime);
309  }
310 
311  /* Write to LPTIMx CFGR */
312  hlptim->Instance->CFGR = tmpcfgr;
313 
314  /* Configure LPTIM input sources */
315  if (hlptim->Instance == LPTIM1)
316  {
317  /* Check LPTIM Input1 and Input2 sources */
318  assert_param(IS_LPTIM_INPUT1_SOURCE(hlptim->Instance, hlptim->Init.Input1Source));
319  assert_param(IS_LPTIM_INPUT2_SOURCE(hlptim->Instance, hlptim->Init.Input2Source));
320 
321  /* Configure LPTIM Input1 and Input2 sources */
322  hlptim->Instance->OR = (hlptim->Init.Input1Source | hlptim->Init.Input2Source);
323  }
324  else
325  {
326  /* Check LPTIM2 Input1 source */
327  assert_param(IS_LPTIM_INPUT1_SOURCE(hlptim->Instance, hlptim->Init.Input1Source));
328 
329  /* Configure LPTIM2 Input1 source */
330  hlptim->Instance->OR = hlptim->Init.Input1Source;
331  }
332 
333  /* Change the LPTIM state */
334  hlptim->State = HAL_LPTIM_STATE_READY;
335 
336  /* Return function status */
337  return HAL_OK;
338 }
339 
345 HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim)
346 {
347  /* Check the LPTIM handle allocation */
348  if (hlptim == NULL)
349  {
350  return HAL_ERROR;
351  }
352 
353  /* Change the LPTIM state */
354  hlptim->State = HAL_LPTIM_STATE_BUSY;
355 
356  /* Disable the LPTIM Peripheral Clock */
357  __HAL_LPTIM_DISABLE(hlptim);
358 
359 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
360  if (hlptim->MspDeInitCallback == NULL)
361  {
362  hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit;
363  }
364 
365  /* DeInit the low level hardware: CLOCK, NVIC.*/
366  hlptim->MspDeInitCallback(hlptim);
367 #else
368  /* DeInit the low level hardware: CLOCK, NVIC.*/
369  HAL_LPTIM_MspDeInit(hlptim);
370 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
371 
372  /* Change the LPTIM state */
373  hlptim->State = HAL_LPTIM_STATE_RESET;
374 
375  /* Release Lock */
376  __HAL_UNLOCK(hlptim);
377 
378  /* Return function status */
379  return HAL_OK;
380 }
381 
388 {
389  /* Prevent unused argument(s) compilation warning */
390  UNUSED(hlptim);
391 
392  /* NOTE : This function should not be modified, when the callback is needed,
393  the HAL_LPTIM_MspInit could be implemented in the user file
394  */
395 }
396 
403 {
404  /* Prevent unused argument(s) compilation warning */
405  UNUSED(hlptim);
406 
407  /* NOTE : This function should not be modified, when the callback is needed,
408  the HAL_LPTIM_MspDeInit could be implemented in the user file
409  */
410 }
411 
451 HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
452 {
453  /* Check the parameters */
454  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
455  assert_param(IS_LPTIM_PERIOD(Period));
456  assert_param(IS_LPTIM_PULSE(Pulse));
457 
458  /* Set the LPTIM state */
459  hlptim->State = HAL_LPTIM_STATE_BUSY;
460 
461  /* Reset WAVE bit to set PWM mode */
462  hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
463 
464  /* Enable the Peripheral */
465  __HAL_LPTIM_ENABLE(hlptim);
466 
467  /* Load the period value in the autoreload register */
468  __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
469 
470  /* Load the pulse value in the compare register */
471  __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
472 
473 #if defined(LPTIM_RCR_REP)
474  /* Load the repetition value in the repetition counter */
475  if (hlptim->Init.RepetitionCounter != 0)
476  {
477  __HAL_LPTIM_REPETITIONCOUNTER_SET(hlptim, hlptim->Init.RepetitionCounter);
478  }
479 #endif
480 
481  /* Start timer in continuous mode */
482  __HAL_LPTIM_START_CONTINUOUS(hlptim);
483 
484  /* Change the TIM state*/
485  hlptim->State = HAL_LPTIM_STATE_READY;
486 
487  /* Return function status */
488  return HAL_OK;
489 }
490 
496 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim)
497 {
498  /* Check the parameters */
499  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
500 
501  /* Set the LPTIM state */
502  hlptim->State = HAL_LPTIM_STATE_BUSY;
503 
504  /* Disable the Peripheral */
505  __HAL_LPTIM_DISABLE(hlptim);
506 
507  /* Change the TIM state*/
508  hlptim->State = HAL_LPTIM_STATE_READY;
509 
510  /* Return function status */
511  return HAL_OK;
512 }
513 
523 HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
524 {
525  /* Check the parameters */
526  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
527  assert_param(IS_LPTIM_PERIOD(Period));
528  assert_param(IS_LPTIM_PULSE(Pulse));
529 
530  /* Set the LPTIM state */
531  hlptim->State = HAL_LPTIM_STATE_BUSY;
532 
533  /* Reset WAVE bit to set PWM mode */
534  hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
535 
536  /* Enable Autoreload write complete interrupt */
537  __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
538 
539  /* Enable Compare write complete interrupt */
540  __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
541 
542  /* Enable Autoreload match interrupt */
543  __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
544 
545  /* Enable Compare match interrupt */
546  __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
547 
548  /* If external trigger source is used, then enable external trigger interrupt */
549  if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
550  {
551  /* Enable external trigger interrupt */
552  __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
553  }
554 
555 #if defined(LPTIM_RCR_REP)
556  /* Enable the update event and the repetition register update OK interrupts */
557  if ((hlptim->Init.RepetitionCounter) != 0)
558  {
559  __HAL_LPTIM_ENABLE_IT(hlptim, (LPTIM_IT_UPDATE | LPTIM_IT_REPOK));
560  }
561 #endif
562 
563  /* Enable the Peripheral */
564  __HAL_LPTIM_ENABLE(hlptim);
565 
566  /* Load the period value in the autoreload register */
567  __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
568 
569  /* Load the pulse value in the compare register */
570  __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
571 
572 #if defined(LPTIM_RCR_REP)
573  /* Load the repetition value in the repetition counter */
574  if (hlptim->Init.RepetitionCounter != 0)
575  {
576  __HAL_LPTIM_REPETITIONCOUNTER_SET(hlptim, hlptim->Init.RepetitionCounter);
577  }
578 #endif
579 
580  /* Start timer in continuous mode */
581  __HAL_LPTIM_START_CONTINUOUS(hlptim);
582 
583  /* Change the TIM state*/
584  hlptim->State = HAL_LPTIM_STATE_READY;
585 
586  /* Return function status */
587  return HAL_OK;
588 }
589 
595 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim)
596 {
597  /* Check the parameters */
598  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
599 
600  /* Set the LPTIM state */
601  hlptim->State = HAL_LPTIM_STATE_BUSY;
602 
603  /* Disable the Peripheral */
604  __HAL_LPTIM_DISABLE(hlptim);
605 
606  /* Disable Autoreload write complete interrupt */
607  __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
608 
609  /* Disable Compare write complete interrupt */
610  __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
611 
612  /* Disable Autoreload match interrupt */
613  __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
614 
615  /* Disable Compare match interrupt */
616  __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
617 
618  /* If external trigger source is used, then disable external trigger interrupt */
619  if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
620  {
621  /* Disable external trigger interrupt */
622  __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
623  }
624 
625 #if defined(LPTIM_RCR_REP)
626  /* Disable the update event and the repetition register update OK interrupts */
627  if ((hlptim->Init.RepetitionCounter) != 0)
628  {
629  __HAL_LPTIM_DISABLE_IT(hlptim, (LPTIM_IT_UPDATE | LPTIM_IT_REPOK));
630  }
631 #endif
632 
633  /* Change the TIM state*/
634  hlptim->State = HAL_LPTIM_STATE_READY;
635 
636  /* Return function status */
637  return HAL_OK;
638 }
639 
649 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
650 {
651  /* Check the parameters */
652  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
653  assert_param(IS_LPTIM_PERIOD(Period));
654  assert_param(IS_LPTIM_PULSE(Pulse));
655 
656  /* Set the LPTIM state */
657  hlptim->State = HAL_LPTIM_STATE_BUSY;
658 
659  /* Reset WAVE bit to set one pulse mode */
660  hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
661 
662  /* Enable the Peripheral */
663  __HAL_LPTIM_ENABLE(hlptim);
664 
665  /* Load the period value in the autoreload register */
666  __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
667 
668  /* Load the pulse value in the compare register */
669  __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
670 
671  /* Start timer in single (one shot) mode */
672  __HAL_LPTIM_START_SINGLE(hlptim);
673 
674 #if defined(LPTIM_RCR_REP)
675  /* Load the repetition value in the repetition counter */
676  if (hlptim->Init.RepetitionCounter != 0)
677  {
678  __HAL_LPTIM_REPETITIONCOUNTER_SET(hlptim, hlptim->Init.RepetitionCounter);
679  }
680 #endif
681 
682  /* Change the TIM state*/
683  hlptim->State = HAL_LPTIM_STATE_READY;
684 
685  /* Return function status */
686  return HAL_OK;
687 }
688 
695 {
696  /* Check the parameters */
697  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
698 
699  /* Set the LPTIM state */
700  hlptim->State = HAL_LPTIM_STATE_BUSY;
701 
702  /* Disable the Peripheral */
703  __HAL_LPTIM_DISABLE(hlptim);
704 
705  /* Change the TIM state*/
706  hlptim->State = HAL_LPTIM_STATE_READY;
707 
708  /* Return function status */
709  return HAL_OK;
710 }
711 
721 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
722 {
723  /* Check the parameters */
724  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
725  assert_param(IS_LPTIM_PERIOD(Period));
726  assert_param(IS_LPTIM_PULSE(Pulse));
727 
728  /* Set the LPTIM state */
729  hlptim->State = HAL_LPTIM_STATE_BUSY;
730 
731  /* Reset WAVE bit to set one pulse mode */
732  hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
733 
734  /* Enable Autoreload write complete interrupt */
735  __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
736 
737  /* Enable Compare write complete interrupt */
738  __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
739 
740  /* Enable Autoreload match interrupt */
741  __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
742 
743  /* Enable Compare match interrupt */
744  __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
745 
746  /* If external trigger source is used, then enable external trigger interrupt */
747  if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
748  {
749  /* Enable external trigger interrupt */
750  __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
751  }
752 
753 #if defined(LPTIM_RCR_REP)
754  /* Enable the update event and the repetition register update OK interrupts */
755  if ((hlptim->Init.RepetitionCounter) != 0)
756  {
757  __HAL_LPTIM_ENABLE_IT(hlptim, (LPTIM_IT_UPDATE | LPTIM_IT_REPOK));
758  }
759 #endif
760 
761  /* Enable the Peripheral */
762  __HAL_LPTIM_ENABLE(hlptim);
763 
764  /* Load the period value in the autoreload register */
765  __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
766 
767  /* Load the pulse value in the compare register */
768  __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
769 
770 #if defined(LPTIM_RCR_REP)
771  /* Load the repetition value in the repetition counter */
772  if (hlptim->Init.RepetitionCounter != 0)
773  {
774  __HAL_LPTIM_REPETITIONCOUNTER_SET(hlptim, hlptim->Init.RepetitionCounter);
775  }
776 #endif
777 
778  /* Start timer in continuous mode */
779  __HAL_LPTIM_START_SINGLE(hlptim);
780 
781  /* Change the TIM state*/
782  hlptim->State = HAL_LPTIM_STATE_READY;
783 
784  /* Return function status */
785  return HAL_OK;
786 }
787 
794 {
795  /* Check the parameters */
796  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
797 
798  /* Set the LPTIM state */
799  hlptim->State = HAL_LPTIM_STATE_BUSY;
800 
801  /* Disable the Peripheral */
802  __HAL_LPTIM_DISABLE(hlptim);
803 
804  /* Disable Autoreload write complete interrupt */
805  __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
806 
807  /* Disable Compare write complete interrupt */
808  __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
809 
810  /* Disable Autoreload match interrupt */
811  __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
812 
813  /* Disable Compare match interrupt */
814  __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
815 
816  /* If external trigger source is used, then disable external trigger interrupt */
817  if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
818  {
819  /* Disable external trigger interrupt */
820  __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
821  }
822 
823 #if defined(LPTIM_RCR_REP)
824  /* Disable the update event and the repetition register update OK interrupts */
825  if ((hlptim->Init.RepetitionCounter) != 0)
826  {
827  __HAL_LPTIM_DISABLE_IT(hlptim, (LPTIM_IT_UPDATE | LPTIM_IT_REPOK));
828  }
829 #endif
830 
831  /* Change the TIM state*/
832  hlptim->State = HAL_LPTIM_STATE_READY;
833 
834  /* Return function status */
835  return HAL_OK;
836 }
837 
847 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
848 {
849  /* Check the parameters */
850  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
851  assert_param(IS_LPTIM_PERIOD(Period));
852  assert_param(IS_LPTIM_PULSE(Pulse));
853 
854  /* Set the LPTIM state */
855  hlptim->State = HAL_LPTIM_STATE_BUSY;
856 
857  /* Set WAVE bit to enable the set once mode */
858  hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
859 
860  /* Enable the Peripheral */
861  __HAL_LPTIM_ENABLE(hlptim);
862 
863  /* Load the period value in the autoreload register */
864  __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
865 
866  /* Load the pulse value in the compare register */
867  __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
868 
869 #if defined(LPTIM_RCR_REP)
870  /* Load the repetition value in the repetition counter */
871  if (hlptim->Init.RepetitionCounter != 0)
872  {
873  __HAL_LPTIM_REPETITIONCOUNTER_SET(hlptim, hlptim->Init.RepetitionCounter);
874  }
875 #endif
876 
877  /* Start timer in continuous mode */
878  __HAL_LPTIM_START_SINGLE(hlptim);
879 
880  /* Change the TIM state*/
881  hlptim->State = HAL_LPTIM_STATE_READY;
882 
883  /* Return function status */
884  return HAL_OK;
885 }
886 
892 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim)
893 {
894  /* Check the parameters */
895  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
896 
897  /* Set the LPTIM state */
898  hlptim->State = HAL_LPTIM_STATE_BUSY;
899 
900  /* Disable the Peripheral */
901  __HAL_LPTIM_DISABLE(hlptim);
902 
903  /* Change the TIM state*/
904  hlptim->State = HAL_LPTIM_STATE_READY;
905 
906  /* Return function status */
907  return HAL_OK;
908 }
909 
919 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
920 {
921  /* Check the parameters */
922  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
923  assert_param(IS_LPTIM_PERIOD(Period));
924  assert_param(IS_LPTIM_PULSE(Pulse));
925 
926  /* Set the LPTIM state */
927  hlptim->State = HAL_LPTIM_STATE_BUSY;
928 
929  /* Set WAVE bit to enable the set once mode */
930  hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
931 
932  /* Enable Autoreload write complete interrupt */
933  __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
934 
935  /* Enable Compare write complete interrupt */
936  __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
937 
938  /* Enable Autoreload match interrupt */
939  __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
940 
941  /* Enable Compare match interrupt */
942  __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
943 
944  /* If external trigger source is used, then enable external trigger interrupt */
945  if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
946  {
947  /* Enable external trigger interrupt */
948  __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
949  }
950 
951 #if defined(LPTIM_RCR_REP)
952  /* Enable the update event and the repetition register update OK interrupts */
953  if ((hlptim->Init.RepetitionCounter) != 0)
954  {
955  __HAL_LPTIM_ENABLE_IT(hlptim, (LPTIM_IT_UPDATE | LPTIM_IT_REPOK));
956  }
957 #endif
958 
959  /* Enable the Peripheral */
960  __HAL_LPTIM_ENABLE(hlptim);
961 
962  /* Load the period value in the autoreload register */
963  __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
964 
965  /* Load the pulse value in the compare register */
966  __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
967 
968 #if defined(LPTIM_RCR_REP)
969  /* Load the repetition value in the repetition counter */
970  if (hlptim->Init.RepetitionCounter != 0)
971  {
972  __HAL_LPTIM_REPETITIONCOUNTER_SET(hlptim, hlptim->Init.RepetitionCounter);
973  }
974 #endif
975 
976  /* Start timer in continuous mode */
977  __HAL_LPTIM_START_SINGLE(hlptim);
978 
979  /* Change the TIM state*/
980  hlptim->State = HAL_LPTIM_STATE_READY;
981 
982  /* Return function status */
983  return HAL_OK;
984 }
985 
992 {
993  /* Check the parameters */
994  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
995 
996  /* Set the LPTIM state */
997  hlptim->State = HAL_LPTIM_STATE_BUSY;
998 
999  /* Disable the Peripheral */
1000  __HAL_LPTIM_DISABLE(hlptim);
1001 
1002  /* Disable Autoreload write complete interrupt */
1003  __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
1004 
1005  /* Disable Compare write complete interrupt */
1006  __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
1007 
1008  /* Disable Autoreload match interrupt */
1009  __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
1010 
1011  /* Disable Compare match interrupt */
1012  __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
1013 
1014  /* If external trigger source is used, then disable external trigger interrupt */
1015  if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
1016  {
1017  /* Disable external trigger interrupt */
1018  __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
1019  }
1020 
1021 #if defined(LPTIM_RCR_REP)
1022  /* Disable the update event and the repetition register update OK interrupts */
1023  if ((hlptim->Init.RepetitionCounter) != 0)
1024  {
1025  __HAL_LPTIM_DISABLE_IT(hlptim, (LPTIM_IT_UPDATE | LPTIM_IT_REPOK));
1026  }
1027 #endif
1028 
1029  /* Change the TIM state*/
1030  hlptim->State = HAL_LPTIM_STATE_READY;
1031 
1032  /* Return function status */
1033  return HAL_OK;
1034 }
1035 
1043 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1044 {
1045  uint32_t tmpcfgr;
1046 
1047  /* Check the parameters */
1048  assert_param(IS_LPTIM_ENCODER_INTERFACE_INSTANCE(hlptim->Instance));
1049  assert_param(IS_LPTIM_PERIOD(Period));
1050  assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
1051  assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
1052  assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
1053 
1054  /* Set the LPTIM state */
1055  hlptim->State = HAL_LPTIM_STATE_BUSY;
1056 
1057  /* Get the LPTIMx CFGR value */
1058  tmpcfgr = hlptim->Instance->CFGR;
1059 
1060  /* Clear CKPOL bits */
1061  tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
1062 
1063  /* Set Input polarity */
1064  tmpcfgr |= hlptim->Init.UltraLowPowerClock.Polarity;
1065 
1066  /* Write to LPTIMx CFGR */
1067  hlptim->Instance->CFGR = tmpcfgr;
1068 
1069  /* Set ENC bit to enable the encoder interface */
1070  hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
1071 
1072  /* Enable the Peripheral */
1073  __HAL_LPTIM_ENABLE(hlptim);
1074 
1075  /* Load the period value in the autoreload register */
1076  __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1077 
1078  /* Start timer in continuous mode */
1079  __HAL_LPTIM_START_CONTINUOUS(hlptim);
1080 
1081  /* Change the TIM state*/
1082  hlptim->State = HAL_LPTIM_STATE_READY;
1083 
1084  /* Return function status */
1085  return HAL_OK;
1086 }
1087 
1094 {
1095  /* Check the parameters */
1096  assert_param(IS_LPTIM_ENCODER_INTERFACE_INSTANCE(hlptim->Instance));
1097 
1098  /* Set the LPTIM state */
1099  hlptim->State = HAL_LPTIM_STATE_BUSY;
1100 
1101  /* Disable the Peripheral */
1102  __HAL_LPTIM_DISABLE(hlptim);
1103 
1104  /* Reset ENC bit to disable the encoder interface */
1105  hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
1106 
1107  /* Change the TIM state*/
1108  hlptim->State = HAL_LPTIM_STATE_READY;
1109 
1110  /* Return function status */
1111  return HAL_OK;
1112 }
1113 
1121 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1122 {
1123  uint32_t tmpcfgr;
1124 
1125  /* Check the parameters */
1126  assert_param(IS_LPTIM_ENCODER_INTERFACE_INSTANCE(hlptim->Instance));
1127  assert_param(IS_LPTIM_PERIOD(Period));
1128  assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
1129  assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
1130  assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
1131 
1132  /* Set the LPTIM state */
1133  hlptim->State = HAL_LPTIM_STATE_BUSY;
1134 
1135  /* Configure edge sensitivity for encoder mode */
1136  /* Get the LPTIMx CFGR value */
1137  tmpcfgr = hlptim->Instance->CFGR;
1138 
1139  /* Clear CKPOL bits */
1140  tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
1141 
1142  /* Set Input polarity */
1143  tmpcfgr |= hlptim->Init.UltraLowPowerClock.Polarity;
1144 
1145  /* Write to LPTIMx CFGR */
1146  hlptim->Instance->CFGR = tmpcfgr;
1147 
1148  /* Set ENC bit to enable the encoder interface */
1149  hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
1150 
1151  /* Enable "switch to down direction" interrupt */
1152  __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_DOWN);
1153 
1154  /* Enable "switch to up direction" interrupt */
1155  __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_UP);
1156 
1157  /* Enable the Peripheral */
1158  __HAL_LPTIM_ENABLE(hlptim);
1159 
1160  /* Load the period value in the autoreload register */
1161  __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1162 
1163  /* Start timer in continuous mode */
1164  __HAL_LPTIM_START_CONTINUOUS(hlptim);
1165 
1166  /* Change the TIM state*/
1167  hlptim->State = HAL_LPTIM_STATE_READY;
1168 
1169  /* Return function status */
1170  return HAL_OK;
1171 }
1172 
1179 {
1180  /* Check the parameters */
1181  assert_param(IS_LPTIM_ENCODER_INTERFACE_INSTANCE(hlptim->Instance));
1182 
1183  /* Set the LPTIM state */
1184  hlptim->State = HAL_LPTIM_STATE_BUSY;
1185 
1186  /* Disable the Peripheral */
1187  __HAL_LPTIM_DISABLE(hlptim);
1188 
1189  /* Reset ENC bit to disable the encoder interface */
1190  hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
1191 
1192  /* Disable "switch to down direction" interrupt */
1193  __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_DOWN);
1194 
1195  /* Disable "switch to up direction" interrupt */
1196  __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_UP);
1197 
1198  /* Change the TIM state*/
1199  hlptim->State = HAL_LPTIM_STATE_READY;
1200 
1201  /* Return function status */
1202  return HAL_OK;
1203 }
1204 
1216 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
1217 {
1218  /* Check the parameters */
1219  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1220  assert_param(IS_LPTIM_PERIOD(Period));
1221  assert_param(IS_LPTIM_PULSE(Timeout));
1222 
1223  /* Set the LPTIM state */
1224  hlptim->State = HAL_LPTIM_STATE_BUSY;
1225 
1226  /* Set TIMOUT bit to enable the timeout function */
1227  hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;
1228 
1229  /* Enable the Peripheral */
1230  __HAL_LPTIM_ENABLE(hlptim);
1231 
1232  /* Load the period value in the autoreload register */
1233  __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1234 
1235  /* Load the Timeout value in the compare register */
1236  __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
1237 
1238  /* Start timer in continuous mode */
1239  __HAL_LPTIM_START_CONTINUOUS(hlptim);
1240 
1241  /* Change the TIM state*/
1242  hlptim->State = HAL_LPTIM_STATE_READY;
1243 
1244  /* Return function status */
1245  return HAL_OK;
1246 }
1247 
1254 {
1255  /* Check the parameters */
1256  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1257 
1258  /* Set the LPTIM state */
1259  hlptim->State = HAL_LPTIM_STATE_BUSY;
1260 
1261  /* Disable the Peripheral */
1262  __HAL_LPTIM_DISABLE(hlptim);
1263 
1264  /* Reset TIMOUT bit to enable the timeout function */
1265  hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
1266 
1267  /* Change the TIM state*/
1268  hlptim->State = HAL_LPTIM_STATE_READY;
1269 
1270  /* Return function status */
1271  return HAL_OK;
1272 }
1273 
1285 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
1286 {
1287  /* Check the parameters */
1288  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1289  assert_param(IS_LPTIM_PERIOD(Period));
1290  assert_param(IS_LPTIM_PULSE(Timeout));
1291 
1292  /* Set the LPTIM state */
1293  hlptim->State = HAL_LPTIM_STATE_BUSY;
1294 
1295  /* Enable EXTI Line interrupt on the LPTIM Wake-up Timer */
1296  __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT();
1297 
1298  /* Set TIMOUT bit to enable the timeout function */
1299  hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;
1300 
1301  /* Enable Compare match interrupt */
1302  __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
1303 
1304  /* Enable the Peripheral */
1305  __HAL_LPTIM_ENABLE(hlptim);
1306 
1307  /* Load the period value in the autoreload register */
1308  __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1309 
1310  /* Load the Timeout value in the compare register */
1311  __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
1312 
1313  /* Start timer in continuous mode */
1314  __HAL_LPTIM_START_CONTINUOUS(hlptim);
1315 
1316  /* Change the TIM state*/
1317  hlptim->State = HAL_LPTIM_STATE_READY;
1318 
1319  /* Return function status */
1320  return HAL_OK;
1321 }
1322 
1329 {
1330  /* Check the parameters */
1331  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1332 
1333  /* Set the LPTIM state */
1334  hlptim->State = HAL_LPTIM_STATE_BUSY;
1335 
1336  /* Disable EXTI Line interrupt on the LPTIM Wake-up Timer */
1337  __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT();
1338 
1339  /* Disable the Peripheral */
1340  __HAL_LPTIM_DISABLE(hlptim);
1341 
1342  /* Reset TIMOUT bit to enable the timeout function */
1343  hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
1344 
1345  /* Disable Compare match interrupt */
1346  __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
1347 
1348  /* Change the TIM state*/
1349  hlptim->State = HAL_LPTIM_STATE_READY;
1350 
1351  /* Return function status */
1352  return HAL_OK;
1353 }
1354 
1362 HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1363 {
1364  /* Check the parameters */
1365  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1366  assert_param(IS_LPTIM_PERIOD(Period));
1367 
1368  /* Set the LPTIM state */
1369  hlptim->State = HAL_LPTIM_STATE_BUSY;
1370 
1371  /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
1372  if ((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM) && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
1373  {
1374  /* Check if clock is prescaled */
1375  assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
1376  /* Set clock prescaler to 0 */
1377  hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
1378  }
1379 
1380  /* Enable the Peripheral */
1381  __HAL_LPTIM_ENABLE(hlptim);
1382 
1383  /* Load the period value in the autoreload register */
1384  __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1385 
1386 #if defined(LPTIM_RCR_REP)
1387  /* Load the repetition value in the repetition counter */
1388  if (hlptim->Init.RepetitionCounter != 0)
1389  {
1390  __HAL_LPTIM_REPETITIONCOUNTER_SET(hlptim, hlptim->Init.RepetitionCounter);
1391  }
1392 #endif
1393 
1394  /* Start timer in continuous mode */
1395  __HAL_LPTIM_START_CONTINUOUS(hlptim);
1396 
1397  /* Change the TIM state*/
1398  hlptim->State = HAL_LPTIM_STATE_READY;
1399 
1400  /* Return function status */
1401  return HAL_OK;
1402 }
1403 
1410 {
1411  /* Check the parameters */
1412  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1413 
1414  /* Set the LPTIM state */
1415  hlptim->State = HAL_LPTIM_STATE_BUSY;
1416 
1417  /* Disable the Peripheral */
1418  __HAL_LPTIM_DISABLE(hlptim);
1419 
1420  /* Change the TIM state*/
1421  hlptim->State = HAL_LPTIM_STATE_READY;
1422 
1423  /* Return function status */
1424  return HAL_OK;
1425 }
1426 
1434 HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1435 {
1436  /* Check the parameters */
1437  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1438  assert_param(IS_LPTIM_PERIOD(Period));
1439 
1440  /* Set the LPTIM state */
1441  hlptim->State = HAL_LPTIM_STATE_BUSY;
1442 
1443  /* Enable EXTI Line interrupt on the LPTIM Wake-up Timer */
1444  __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT();
1445 
1446  /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
1447  if ((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM) && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
1448  {
1449  /* Check if clock is prescaled */
1450  assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
1451  /* Set clock prescaler to 0 */
1452  hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
1453  }
1454 
1455  /* Enable Autoreload write complete interrupt */
1456  __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
1457 
1458  /* Enable Autoreload match interrupt */
1459  __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
1460 
1461 #if defined(LPTIM_RCR_REP)
1462  /* Enable the update event and the repetition register update OK interrupts */
1463  if ((hlptim->Init.RepetitionCounter) != 0)
1464  {
1465  __HAL_LPTIM_ENABLE_IT(hlptim, (LPTIM_IT_UPDATE | LPTIM_IT_REPOK));
1466  }
1467 #endif
1468 
1469  /* Enable the Peripheral */
1470  __HAL_LPTIM_ENABLE(hlptim);
1471 
1472  /* Load the period value in the autoreload register */
1473  __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1474 
1475  #if defined(LPTIM_RCR_REP)
1476  /* Load the repetition value in the repetition counter */
1477  if (hlptim->Init.RepetitionCounter != 0)
1478  {
1479  __HAL_LPTIM_REPETITIONCOUNTER_SET(hlptim, hlptim->Init.RepetitionCounter);
1480  }
1481 #endif
1482 
1483  /* Start timer in continuous mode */
1484  __HAL_LPTIM_START_CONTINUOUS(hlptim);
1485 
1486  /* Change the TIM state*/
1487  hlptim->State = HAL_LPTIM_STATE_READY;
1488 
1489  /* Return function status */
1490  return HAL_OK;
1491 }
1492 
1499 {
1500  /* Check the parameters */
1501  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1502 
1503  /* Set the LPTIM state */
1504  hlptim->State = HAL_LPTIM_STATE_BUSY;
1505 
1506  /* Disable EXTI Line interrupt on the LPTIM Wake-up Timer */
1507  __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT();
1508 
1509  /* Disable the Peripheral */
1510  __HAL_LPTIM_DISABLE(hlptim);
1511 
1512  /* Disable Autoreload write complete interrupt */
1513  __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
1514 
1515  /* Disable Autoreload match interrupt */
1516  __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
1517 
1518 #if defined(LPTIM_RCR_REP)
1519  /* Disable the update event and the repetition register update OK interrupts */
1520  if ((hlptim->Init.RepetitionCounter) != 0)
1521  {
1522  __HAL_LPTIM_DISABLE_IT(hlptim, (LPTIM_IT_UPDATE | LPTIM_IT_REPOK));
1523  }
1524 #endif
1525 
1526  /* Change the TIM state*/
1527  hlptim->State = HAL_LPTIM_STATE_READY;
1528 
1529  /* Return function status */
1530  return HAL_OK;
1531 }
1532 
1558 {
1559  /* Check the parameters */
1560  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1561 
1562  return (hlptim->Instance->CNT);
1563 }
1564 
1571 {
1572  /* Check the parameters */
1573  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1574 
1575  return (hlptim->Instance->ARR);
1576 }
1577 
1584 {
1585  /* Check the parameters */
1586  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1587 
1588  return (hlptim->Instance->CMP);
1589 }
1590 
1623 {
1624  /* Compare match interrupt */
1625  if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPM) != RESET)
1626  {
1627  if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPM) != RESET)
1628  {
1629  /* Clear Compare match flag */
1630  __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPM);
1631 
1632  /* Compare match Callback */
1633 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1634  hlptim->CompareMatchCallback(hlptim);
1635 #else
1637 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1638  }
1639  }
1640 
1641  /* Autoreload match interrupt */
1642  if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARRM) != RESET)
1643  {
1644  if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARRM) != RESET)
1645  {
1646  /* Clear Autoreload match flag */
1647  __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARRM);
1648 
1649  /* Autoreload match Callback */
1650 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1651  hlptim->AutoReloadMatchCallback(hlptim);
1652 #else
1654 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1655  }
1656  }
1657 
1658  /* Trigger detected interrupt */
1659  if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_EXTTRIG) != RESET)
1660  {
1661  if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_EXTTRIG) != RESET)
1662  {
1663  /* Clear Trigger detected flag */
1664  __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_EXTTRIG);
1665 
1666  /* Trigger detected callback */
1667 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1668  hlptim->TriggerCallback(hlptim);
1669 #else
1670  HAL_LPTIM_TriggerCallback(hlptim);
1671 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1672  }
1673  }
1674 
1675  /* Compare write interrupt */
1676  if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPOK) != RESET)
1677  {
1678  if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPOK) != RESET)
1679  {
1680  /* Clear Compare write flag */
1681  __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1682 
1683  /* Compare write Callback */
1684 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1685  hlptim->CompareWriteCallback(hlptim);
1686 #else
1688 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1689  }
1690  }
1691 
1692  /* Autoreload write interrupt */
1693  if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARROK) != RESET)
1694  {
1695  if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARROK) != RESET)
1696  {
1697  /* Clear Autoreload write flag */
1698  __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1699 
1700  /* Autoreload write Callback */
1701 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1702  hlptim->AutoReloadWriteCallback(hlptim);
1703 #else
1705 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1706  }
1707  }
1708 
1709  /* Direction counter changed from Down to Up interrupt */
1710  if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_UP) != RESET)
1711  {
1712  if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_UP) != RESET)
1713  {
1714  /* Clear Direction counter changed from Down to Up flag */
1715  __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_UP);
1716 
1717  /* Direction counter changed from Down to Up Callback */
1718 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1719  hlptim->DirectionUpCallback(hlptim);
1720 #else
1722 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1723  }
1724  }
1725 
1726  /* Direction counter changed from Up to Down interrupt */
1727  if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_DOWN) != RESET)
1728  {
1729  if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_DOWN) != RESET)
1730  {
1731  /* Clear Direction counter changed from Up to Down flag */
1732  __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_DOWN);
1733 
1734  /* Direction counter changed from Up to Down Callback */
1735 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1736  hlptim->DirectionDownCallback(hlptim);
1737 #else
1739 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1740  }
1741  }
1742 
1743 #if defined(LPTIM_RCR_REP)
1744  /* Repetition counter underflowed (or contains zero) and the LPTIM counter
1745  overflowed */
1746  if(__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_UPDATE) != RESET)
1747  {
1748  if(__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_UPDATE) != RESET)
1749  {
1750  /* Clear update event flag */
1751  __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_UPDATE);
1752 
1753  /* Update event Callback */
1754 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1755  hlptim->UpdateEventCallback(hlptim);
1756 #else
1758 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1759  }
1760  }
1761 
1762  /* Successful APB bus write to repetition counter register */
1763  if(__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_REPOK) != RESET)
1764  {
1765  if(__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_REPOK) != RESET)
1766  {
1767  /* Clear successful APB bus write to repetition counter flag */
1768  __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_REPOK);
1769 
1770  /* Successful APB bus write to repetition counter Callback */
1771 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1772  hlptim->RepCounterWriteCallback(hlptim);
1773 #else
1775 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1776  }
1777  }
1778 #endif
1779 }
1780 
1787 {
1788  /* Prevent unused argument(s) compilation warning */
1789  UNUSED(hlptim);
1790 
1791  /* NOTE : This function should not be modified, when the callback is needed,
1792  the HAL_LPTIM_CompareMatchCallback could be implemented in the user file
1793  */
1794 }
1795 
1802 {
1803  /* Prevent unused argument(s) compilation warning */
1804  UNUSED(hlptim);
1805 
1806  /* NOTE : This function should not be modified, when the callback is needed,
1807  the HAL_LPTIM_AutoReloadMatchCallback could be implemented in the user file
1808  */
1809 }
1810 
1817 {
1818  /* Prevent unused argument(s) compilation warning */
1819  UNUSED(hlptim);
1820 
1821  /* NOTE : This function should not be modified, when the callback is needed,
1822  the HAL_LPTIM_TriggerCallback could be implemented in the user file
1823  */
1824 }
1825 
1832 {
1833  /* Prevent unused argument(s) compilation warning */
1834  UNUSED(hlptim);
1835 
1836  /* NOTE : This function should not be modified, when the callback is needed,
1837  the HAL_LPTIM_CompareWriteCallback could be implemented in the user file
1838  */
1839 }
1840 
1847 {
1848  /* Prevent unused argument(s) compilation warning */
1849  UNUSED(hlptim);
1850 
1851  /* NOTE : This function should not be modified, when the callback is needed,
1852  the HAL_LPTIM_AutoReloadWriteCallback could be implemented in the user file
1853  */
1854 }
1855 
1862 {
1863  /* Prevent unused argument(s) compilation warning */
1864  UNUSED(hlptim);
1865 
1866  /* NOTE : This function should not be modified, when the callback is needed,
1867  the HAL_LPTIM_DirectionUpCallback could be implemented in the user file
1868  */
1869 }
1870 
1877 {
1878  /* Prevent unused argument(s) compilation warning */
1879  UNUSED(hlptim);
1880 
1881  /* NOTE : This function should not be modified, when the callback is needed,
1882  the HAL_LPTIM_DirectionDownCallback could be implemented in the user file
1883  */
1884 }
1885 
1886 #if defined(LPTIM_RCR_REP)
1887 
1893 {
1894  /* Prevent unused argument(s) compilation warning */
1895  UNUSED(hlptim);
1896 
1897  /* NOTE : This function should not be modified, when the callback is needed,
1898  the HAL_LPTIM_UpdateEventCallback could be implemented in the user file
1899  */
1900 }
1901 
1908 {
1909  /* Prevent unused argument(s) compilation warning */
1910  UNUSED(hlptim);
1911 
1912  /* NOTE : This function should not be modified, when the callback is needed,
1913  the HAL_LPTIM_RepCounterWriteCallback could be implemented in the user file
1914  */
1915 }
1916 #endif /* LPTIM_RCR_REP */
1917 
1918 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1919 
1937  HAL_LPTIM_CallbackIDTypeDef CallbackID,
1938  pLPTIM_CallbackTypeDef pCallback)
1939 {
1940  HAL_StatusTypeDef status = HAL_OK;
1941 
1942  if (pCallback == NULL)
1943  {
1944  return HAL_ERROR;
1945  }
1946 
1947  /* Process locked */
1948  __HAL_LOCK(hlptim);
1949 
1950  if (hlptim->State == HAL_LPTIM_STATE_READY)
1951  {
1952  switch (CallbackID)
1953  {
1955  hlptim->MspInitCallback = pCallback;
1956  break;
1957 
1959  hlptim->MspDeInitCallback = pCallback;
1960  break;
1961 
1963  hlptim->CompareMatchCallback = pCallback;
1964  break;
1965 
1967  hlptim->AutoReloadMatchCallback = pCallback;
1968  break;
1969 
1971  hlptim->TriggerCallback = pCallback;
1972  break;
1973 
1975  hlptim->CompareWriteCallback = pCallback;
1976  break;
1977 
1979  hlptim->AutoReloadWriteCallback = pCallback;
1980  break;
1981 
1983  hlptim->DirectionUpCallback = pCallback;
1984  break;
1985 
1987  hlptim->DirectionDownCallback = pCallback;
1988  break;
1989 
1990 #if defined(LPTIM_RCR_REP)
1992  hlptim->UpdateEventCallback = pCallback;
1993  break;
1994 
1996  hlptim->RepCounterWriteCallback = pCallback;
1997  break;
1998 #endif /* LPTIM_RCR_REP */
1999 
2000  default :
2001  /* Return error status */
2002  status = HAL_ERROR;
2003  break;
2004  }
2005  }
2006  else if (hlptim->State == HAL_LPTIM_STATE_RESET)
2007  {
2008  switch (CallbackID)
2009  {
2011  hlptim->MspInitCallback = pCallback;
2012  break;
2013 
2015  hlptim->MspDeInitCallback = pCallback;
2016  break;
2017 
2018  default :
2019  /* Return error status */
2020  status = HAL_ERROR;
2021  break;
2022  }
2023  }
2024  else
2025  {
2026  /* Return error status */
2027  status = HAL_ERROR;
2028  }
2029 
2030  /* Release Lock */
2031  __HAL_UNLOCK(hlptim);
2032 
2033  return status;
2034 }
2035 
2054  HAL_LPTIM_CallbackIDTypeDef CallbackID)
2055 {
2056  HAL_StatusTypeDef status = HAL_OK;
2057 
2058  /* Process locked */
2059  __HAL_LOCK(hlptim);
2060 
2061  if (hlptim->State == HAL_LPTIM_STATE_READY)
2062  {
2063  switch (CallbackID)
2064  {
2066  hlptim->MspInitCallback = HAL_LPTIM_MspInit; /* Legacy weak MspInit Callback */
2067  break;
2068 
2070  hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit; /* Legacy weak Msp DeInit Callback */
2071  break;
2072 
2074  hlptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback; /* Legacy weak Compare match Callback */
2075  break;
2076 
2078  hlptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback; /* Legacy weak Auto-reload match Callback */
2079  break;
2080 
2082  hlptim->TriggerCallback = HAL_LPTIM_TriggerCallback; /* Legacy weak External trigger event detection Callback */
2083  break;
2084 
2086  hlptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback; /* Legacy weak Compare register write complete Callback */
2087  break;
2088 
2090  hlptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback; /* Legacy weak Auto-reload register write complete Callback */
2091  break;
2092 
2094  hlptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback; /* Legacy weak Up-counting direction change Callback */
2095  break;
2096 
2098  hlptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback; /* Legacy weak Down-counting direction change Callback */
2099  break;
2100 
2101 #if defined(LPTIM_RCR_REP)
2103  hlptim->UpdateEventCallback = HAL_LPTIM_UpdateEventCallback; /* Legacy weak Update Event Callback */
2104  break;
2105 
2107  hlptim->RepCounterWriteCallback = HAL_LPTIM_RepCounterWriteCallback; /* Legacy weak Repetition counter successful write Callback */
2108  break;
2109 #endif /* LPTIM_RCR_REP */
2110 
2111  default :
2112  /* Return error status */
2113  status = HAL_ERROR;
2114  break;
2115  }
2116  }
2117  else if (hlptim->State == HAL_LPTIM_STATE_RESET)
2118  {
2119  switch (CallbackID)
2120  {
2122  hlptim->MspInitCallback = HAL_LPTIM_MspInit; /* Legacy weak MspInit Callback */
2123  break;
2124 
2126  hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit; /* Legacy weak Msp DeInit Callback */
2127  break;
2128 
2129  default :
2130  /* Return error status */
2131  status = HAL_ERROR;
2132  break;
2133  }
2134  }
2135  else
2136  {
2137  /* Return error status */
2138  status = HAL_ERROR;
2139  }
2140 
2141  /* Release Lock */
2142  __HAL_UNLOCK(hlptim);
2143 
2144  return status;
2145 }
2146 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2147 
2172 {
2173  /* Return LPTIM handle state */
2174  return hlptim->State;
2175 }
2176 
2186 /* Private functions ---------------------------------------------------------*/
2187 
2191 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2192 
2199 {
2200  /* Reset the LPTIM callback to the legacy weak callbacks */
2201  lptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback; /* Compare match Callback */
2202  lptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback; /* Auto-reload match Callback */
2203  lptim->TriggerCallback = HAL_LPTIM_TriggerCallback; /* External trigger event detection Callback */
2204  lptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback; /* Compare register write complete Callback */
2205  lptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback; /* Auto-reload register write complete Callback */
2206  lptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback; /* Up-counting direction change Callback */
2207  lptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback; /* Down-counting direction change Callback */
2208 #if defined(LPTIM_RCR_REP)
2209  lptim->UpdateEventCallback = HAL_LPTIM_UpdateEventCallback; /* Update Event Callback */
2210  lptim->RepCounterWriteCallback = HAL_LPTIM_RepCounterWriteCallback; /* Repetition counter successful write Callback */
2211 #endif /* LPTIM_RCR_REP */
2212 }
2213 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2214 
2225 {
2226  uint32_t tmpclksource = 0;
2227  uint32_t tmpIER;
2228  uint32_t tmpCFGR;
2229  uint32_t tmpCMP;
2230  uint32_t tmpARR;
2231  uint32_t tmpOR;
2232 
2233  __disable_irq();
2234 
2235  /*********** Save LPTIM Config ***********/
2236  /* Save LPTIM source clock */
2237  switch ((uint32_t)lptim->Instance)
2238  {
2239  case LPTIM1_BASE:
2240  tmpclksource = __HAL_RCC_GET_LPTIM1_SOURCE();
2241  break;
2242 #if defined(LPTIM2)
2243  case LPTIM2_BASE:
2244  tmpclksource = __HAL_RCC_GET_LPTIM2_SOURCE();
2245  break;
2246 #endif /* LPTIM2 */
2247  default:
2248  break;
2249  }
2250 
2251  /* Save LPTIM configuration registers */
2252  tmpIER = lptim->Instance->IER;
2253  tmpCFGR = lptim->Instance->CFGR;
2254  tmpCMP = lptim->Instance->CMP;
2255  tmpARR = lptim->Instance->ARR;
2256  tmpOR = lptim->Instance->OR;
2257 
2258  /*********** Reset LPTIM ***********/
2259  switch ((uint32_t)lptim->Instance)
2260  {
2261  case LPTIM1_BASE:
2262  __HAL_RCC_LPTIM1_FORCE_RESET();
2263  __HAL_RCC_LPTIM1_RELEASE_RESET();
2264  break;
2265 #if defined(LPTIM2)
2266  case LPTIM2_BASE:
2267  __HAL_RCC_LPTIM2_FORCE_RESET();
2268  __HAL_RCC_LPTIM2_RELEASE_RESET();
2269  break;
2270 #endif /* LPTIM2 */
2271  default:
2272  break;
2273  }
2274 
2275  /*********** Restore LPTIM Config ***********/
2276  uint32_t Ref_Time;
2277  uint32_t Time_Elapsed;
2278 
2279  if ((tmpCMP != 0UL) || (tmpARR != 0UL))
2280  {
2281  /* Force LPTIM source kernel clock from APB */
2282  switch ((uint32_t)lptim->Instance)
2283  {
2284  case LPTIM1_BASE:
2285  __HAL_RCC_LPTIM1_CONFIG(RCC_LPTIM1CLKSOURCE_PCLK1);
2286  break;
2287 #if defined(LPTIM2)
2288  case LPTIM2_BASE:
2289  __HAL_RCC_LPTIM2_CONFIG(RCC_LPTIM2CLKSOURCE_PCLK1);
2290  break;
2291 #endif /* LPTIM2 */
2292  default:
2293  break;
2294  }
2295 
2296  if (tmpCMP != 0UL)
2297  {
2298  /* Restore CMP register (LPTIM should be enabled first) */
2299  lptim->Instance->CR |= LPTIM_CR_ENABLE;
2300  lptim->Instance->CMP = tmpCMP;
2301  /* Polling on CMP write ok status after above restore operation */
2302  Ref_Time = HAL_GetTick();
2303  do
2304  {
2305  Time_Elapsed = HAL_GetTick() - Ref_Time;
2306  } while ((!(__HAL_LPTIM_GET_FLAG(lptim, LPTIM_FLAG_CMPOK))) && (Time_Elapsed <= TIMEOUT));
2307 
2308  __HAL_LPTIM_CLEAR_FLAG(lptim, LPTIM_FLAG_CMPOK);
2309  }
2310 
2311  if (tmpARR != 0UL)
2312  {
2313  /* Restore ARR register (LPTIM should be enabled first) */
2314  lptim->Instance->CR |= LPTIM_CR_ENABLE;
2315  lptim->Instance->ARR = tmpARR;
2316  /* Polling on ARR write ok status after above restore operation */
2317  Ref_Time = HAL_GetTick();
2318  do
2319  {
2320  Time_Elapsed = HAL_GetTick() - Ref_Time;
2321  } while ((!(__HAL_LPTIM_GET_FLAG(lptim, LPTIM_FLAG_ARROK))) && (Time_Elapsed <= TIMEOUT));
2322 
2323  __HAL_LPTIM_CLEAR_FLAG(lptim, LPTIM_FLAG_ARROK);
2324  }
2325 
2326  /* Restore LPTIM source kernel clock */
2327  switch ((uint32_t)lptim->Instance)
2328  {
2329  case LPTIM1_BASE:
2330  __HAL_RCC_LPTIM1_CONFIG(tmpclksource);
2331  break;
2332 #if defined(LPTIM2)
2333  case LPTIM2_BASE:
2334  __HAL_RCC_LPTIM2_CONFIG(tmpclksource);
2335  break;
2336 #endif /* LPTIM2 */
2337  default:
2338  break;
2339  }
2340  }
2341 
2342  /* Restore configuration registers (LPTIM should be disabled first) */
2343  lptim->Instance->CR &= ~(LPTIM_CR_ENABLE);
2344  lptim->Instance->IER = tmpIER;
2345  lptim->Instance->CFGR = tmpCFGR;
2346  lptim->Instance->OR = tmpOR;
2347 
2348  __enable_irq();
2349 }
2353 #endif /* LPTIM1 || LPTIM2 */
2354 
2355 #endif /* HAL_LPTIM_MODULE_ENABLED */
2356 
2364 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim)
Stop the Encoder interface in interrupt mode.
HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim)
Stop the LPTIM Set once mode.
HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim)
Stop the Counter mode.
HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
Start the LPTIM Set once mode in interrupt mode.
HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
Start the Timeout function.
HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim)
Stop the Counter mode in interrupt mode.
HAL_StatusTypeDef HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef *hlptim, HAL_LPTIM_CallbackIDTypeDef CallbackID, pLPTIM_CallbackTypeDef pCallback)
Register a User LPTIM callback to be used instead of the weak predefined callback.
HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(LPTIM_HandleTypeDef *hlptim)
Return the LPTIM handle state.
HAL_StatusTypeDef HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef *hlptim, HAL_LPTIM_CallbackIDTypeDef CallbackID)
Unregister a LPTIM callback LLPTIM callback is redirected to the weak predefined callback.
This file contains all the functions prototypes for the HAL module driver.
HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim)
Initialize the LPTIM according to the specified parameters in the LPTIM_InitTypeDef and initialize th...
HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
Start the LPTIM in Set once mode.
__weak void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim)
Compare match callback in non-blocking mode.
HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim)
Stop the LPTIM PWM generation in interrupt mode.
void LPTIM_Disable(LPTIM_HandleTypeDef *lptim)
Disable LPTIM HW instance.
__weak void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim)
Direction counter changed from Up to Down callback in non-blocking mode.
HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
Start the Counter mode.
HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
Start the LPTIM PWM generation.
HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
Start the Encoder interface.
uint32_t HAL_GetTick(void)
Provide a tick value in millisecond.
__weak void HAL_LPTIM_RepCounterWriteCallback(LPTIM_HandleTypeDef *hlptim)
Successful APB bus write to repetition counter register callback in non-blocking mode.
HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
Start the Counter mode in interrupt mode.
__HAL_UNLOCK(hrtc)
HAL_LPTIM_StateTypeDef
HAL LPTIM State structure definition.
__HAL_LOCK(hrtc)
return HAL_OK
HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
Start the Encoder interface in interrupt mode.
struct __LPTIM_HandleTypeDef else typedef struct endif LPTIM_HandleTypeDef
LPTIM handle Structure definition.
HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
Start the Timeout function in interrupt mode.
HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
Start the LPTIM One pulse generation.
__weak void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim)
Direction counter changed from Down to Up callback in non-blocking mode.
__weak void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim)
Initialize the LPTIM MSP.
HAL_LPTIM_CallbackIDTypeDef
HAL LPTIM Callback ID enumeration definition.
__weak void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim)
Autoreload write callback in non-blocking mode.
HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim)
DeInitialize the LPTIM peripheral.
HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
Start the LPTIM One pulse generation in interrupt mode.
__weak void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim)
Autoreload match callback in non-blocking mode.
HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
Start the LPTIM PWM generation in interrupt mode.
void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim)
Handle LPTIM interrupt request.
static void LPTIM_ResetCallback(LPTIM_HandleTypeDef *lptim)
Reset interrupt callbacks to the legacy weak callbacks.
__weak void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim)
Trigger detected callback in non-blocking mode.
HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim)
Stop the LPTIM One pulse generation.
uint32_t HAL_LPTIM_ReadCompare(LPTIM_HandleTypeDef *hlptim)
Return the current Compare (Pulse) value.
uint32_t HAL_LPTIM_ReadCounter(LPTIM_HandleTypeDef *hlptim)
Return the current counter value.
void(* pLPTIM_CallbackTypeDef)(LPTIM_HandleTypeDef *hlptim)
HAL TIM Callback pointer definition.
HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim)
Stop the Encoder interface.
uint32_t HAL_LPTIM_ReadAutoReload(LPTIM_HandleTypeDef *hlptim)
Return the current Autoreload (Period) value.
__weak void HAL_LPTIM_UpdateEventCallback(LPTIM_HandleTypeDef *hlptim)
Repetition counter underflowed (or contains zero) and LPTIM counter overflowed callback in non-blocki...
HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim)
Stop the Timeout function in interrupt mode.
HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim)
Stop the Timeout function.
HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim)
Stop the LPTIM Set once mode in interrupt mode.
__weak void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim)
DeInitialize LPTIM MSP.
HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim)
Stop the LPTIM One pulse generation in interrupt mode.
HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim)
Stop the LPTIM PWM generation.
__weak void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim)
Compare write callback in non-blocking mode.
assert_param(IS_RTC_WAKEUP_CLOCK(WakeUpClock))