STM32L4xx_HAL_Driver  1.14.0
stm32l4xx_hal_pwr_ex.h
Go to the documentation of this file.
1 
20 /* Define to prevent recursive inclusion -------------------------------------*/
21 #ifndef __STM32L4xx_HAL_PWR_EX_H
22 #define __STM32L4xx_HAL_PWR_EX_H
23 
24 #ifdef __cplusplus
25  extern "C" {
26 #endif
27 
28 /* Includes ------------------------------------------------------------------*/
29 #include "stm32l4xx_hal_def.h"
30 
40 /* Exported types ------------------------------------------------------------*/
41 
50 typedef struct
51 {
52  uint32_t PVMType;
61  uint32_t Mode;
63 }PWR_PVMTypeDef;
64 
69 /* Exported constants --------------------------------------------------------*/
70 
78 #define PWR_WUP_POLARITY_SHIFT 0x05
87 #define PWR_WAKEUP_PIN1 PWR_CR3_EWUP1
88 #define PWR_WAKEUP_PIN2 PWR_CR3_EWUP2
89 #define PWR_WAKEUP_PIN3 PWR_CR3_EWUP3
90 #define PWR_WAKEUP_PIN4 PWR_CR3_EWUP4
91 #define PWR_WAKEUP_PIN5 PWR_CR3_EWUP5
92 #define PWR_WAKEUP_PIN1_HIGH PWR_CR3_EWUP1
93 #define PWR_WAKEUP_PIN2_HIGH PWR_CR3_EWUP2
94 #define PWR_WAKEUP_PIN3_HIGH PWR_CR3_EWUP3
95 #define PWR_WAKEUP_PIN4_HIGH PWR_CR3_EWUP4
96 #define PWR_WAKEUP_PIN5_HIGH PWR_CR3_EWUP5
97 #define PWR_WAKEUP_PIN1_LOW (uint32_t)((PWR_CR4_WP1<<PWR_WUP_POLARITY_SHIFT) | PWR_CR3_EWUP1)
98 #define PWR_WAKEUP_PIN2_LOW (uint32_t)((PWR_CR4_WP2<<PWR_WUP_POLARITY_SHIFT) | PWR_CR3_EWUP2)
99 #define PWR_WAKEUP_PIN3_LOW (uint32_t)((PWR_CR4_WP3<<PWR_WUP_POLARITY_SHIFT) | PWR_CR3_EWUP3)
100 #define PWR_WAKEUP_PIN4_LOW (uint32_t)((PWR_CR4_WP4<<PWR_WUP_POLARITY_SHIFT) | PWR_CR3_EWUP4)
101 #define PWR_WAKEUP_PIN5_LOW (uint32_t)((PWR_CR4_WP5<<PWR_WUP_POLARITY_SHIFT) | PWR_CR3_EWUP5)
109 #if defined(PWR_CR2_PVME1)
110 #define PWR_PVM_1 PWR_CR2_PVME1
111 #endif /* PWR_CR2_PVME1 */
112 #if defined(PWR_CR2_PVME2)
113 #define PWR_PVM_2 PWR_CR2_PVME2
114 #endif /* PWR_CR2_PVME2 */
115 #define PWR_PVM_3 PWR_CR2_PVME3
116 #define PWR_PVM_4 PWR_CR2_PVME4
124 #define PWR_PVM_MODE_NORMAL ((uint32_t)0x00000000)
125 #define PWR_PVM_MODE_IT_RISING ((uint32_t)0x00010001)
126 #define PWR_PVM_MODE_IT_FALLING ((uint32_t)0x00010002)
127 #define PWR_PVM_MODE_IT_RISING_FALLING ((uint32_t)0x00010003)
128 #define PWR_PVM_MODE_EVENT_RISING ((uint32_t)0x00020001)
129 #define PWR_PVM_MODE_EVENT_FALLING ((uint32_t)0x00020002)
130 #define PWR_PVM_MODE_EVENT_RISING_FALLING ((uint32_t)0x00020003)
140 #if defined(PWR_CR5_R1MODE)
141 #define PWR_REGULATOR_VOLTAGE_SCALE1_BOOST ((uint32_t)0x00000000)
142 #endif
143 #define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_CR1_VOS_0
144 #define PWR_REGULATOR_VOLTAGE_SCALE2 PWR_CR1_VOS_1
153 #define PWR_BATTERY_CHARGING_RESISTOR_5 ((uint32_t)0x00000000)
154 #define PWR_BATTERY_CHARGING_RESISTOR_1_5 PWR_CR4_VBRS
162 #define PWR_BATTERY_CHARGING_DISABLE ((uint32_t)0x00000000)
163 #define PWR_BATTERY_CHARGING_ENABLE PWR_CR4_VBE
164 
171 #define PWR_GPIO_BIT_0 PWR_PUCRA_PA0
172 #define PWR_GPIO_BIT_1 PWR_PUCRA_PA1
173 #define PWR_GPIO_BIT_2 PWR_PUCRA_PA2
174 #define PWR_GPIO_BIT_3 PWR_PUCRA_PA3
175 #define PWR_GPIO_BIT_4 PWR_PUCRA_PA4
176 #define PWR_GPIO_BIT_5 PWR_PUCRA_PA5
177 #define PWR_GPIO_BIT_6 PWR_PUCRA_PA6
178 #define PWR_GPIO_BIT_7 PWR_PUCRA_PA7
179 #define PWR_GPIO_BIT_8 PWR_PUCRA_PA8
180 #define PWR_GPIO_BIT_9 PWR_PUCRA_PA9
181 #define PWR_GPIO_BIT_10 PWR_PUCRA_PA10
182 #define PWR_GPIO_BIT_11 PWR_PUCRA_PA11
183 #define PWR_GPIO_BIT_12 PWR_PUCRA_PA12
184 #define PWR_GPIO_BIT_13 PWR_PUCRA_PA13
185 #define PWR_GPIO_BIT_14 PWR_PDCRA_PA14
186 #define PWR_GPIO_BIT_15 PWR_PUCRA_PA15
194 #define PWR_GPIO_A 0x00000000U
195 #define PWR_GPIO_B 0x00000001U
196 #define PWR_GPIO_C 0x00000002U
197 #if defined(GPIOD_BASE)
198 #define PWR_GPIO_D 0x00000003U
199 #endif
200 #if defined(GPIOE_BASE)
201 #define PWR_GPIO_E 0x00000004U
202 #endif
203 #if defined(GPIOF_BASE)
204 #define PWR_GPIO_F 0x00000005U
205 #endif
206 #if defined(GPIOG_BASE)
207 #define PWR_GPIO_G 0x00000006U
208 #endif
209 #define PWR_GPIO_H 0x00000007U
210 #if defined(GPIOI_BASE)
211 #define PWR_GPIO_I 0x00000008U
212 #endif
213 
220 #if defined(PWR_CR2_PVME1)
221 #define PWR_EXTI_LINE_PVM1 ((uint32_t)0x00000008)
222 #endif /* PWR_CR2_PVME1 */
223 #if defined(PWR_CR2_PVME2)
224 #define PWR_EXTI_LINE_PVM2 ((uint32_t)0x00000010)
225 #endif /* PWR_CR2_PVME2 */
226 #define PWR_EXTI_LINE_PVM3 ((uint32_t)0x00000020)
227 #define PWR_EXTI_LINE_PVM4 ((uint32_t)0x00000040)
235 #if defined(PWR_CR2_PVME1)
236 #define PWR_EVENT_LINE_PVM1 ((uint32_t)0x00000008)
237 #endif /* PWR_CR2_PVME1 */
238 #if defined(PWR_CR2_PVME2)
239 #define PWR_EVENT_LINE_PVM2 ((uint32_t)0x00000010)
240 #endif /* PWR_CR2_PVME2 */
241 #define PWR_EVENT_LINE_PVM3 ((uint32_t)0x00000020)
242 #define PWR_EVENT_LINE_PVM4 ((uint32_t)0x00000040)
257 #define PWR_FLAG_WUF1 ((uint32_t)0x0020)
258 #define PWR_FLAG_WUF2 ((uint32_t)0x0021)
259 #define PWR_FLAG_WUF3 ((uint32_t)0x0022)
260 #define PWR_FLAG_WUF4 ((uint32_t)0x0023)
261 #define PWR_FLAG_WUF5 ((uint32_t)0x0024)
262 #define PWR_FLAG_WU PWR_SR1_WUF
263 #define PWR_FLAG_SB ((uint32_t)0x0028)
264 #if defined(PWR_SR1_EXT_SMPS_RDY)
265 #define PWR_FLAG_EXT_SMPS ((uint32_t)0x002D)
266 #endif /* PWR_SR1_EXT_SMPS_RDY */
267 #define PWR_FLAG_WUFI ((uint32_t)0x002F)
269 #define PWR_FLAG_REGLPS ((uint32_t)0x0048)
270 #define PWR_FLAG_REGLPF ((uint32_t)0x0049)
271 #define PWR_FLAG_VOSF ((uint32_t)0x004A)
272 #define PWR_FLAG_PVDO ((uint32_t)0x004B)
273 #if defined(PWR_CR2_PVME1)
274 #define PWR_FLAG_PVMO1 ((uint32_t)0x004C)
275 #endif /* PWR_CR2_PVME1 */
276 #if defined(PWR_CR2_PVME2)
277 #define PWR_FLAG_PVMO2 ((uint32_t)0x004D)
278 #endif /* PWR_CR2_PVME2 */
279 #define PWR_FLAG_PVMO3 ((uint32_t)0x004E)
280 #define PWR_FLAG_PVMO4 ((uint32_t)0x004F)
289 /* Exported macros -----------------------------------------------------------*/
290 
294 #if defined(PWR_CR2_PVME1)
295 
299 #define __HAL_PWR_PVM1_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM1)
300 
305 #define __HAL_PWR_PVM1_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM1)
306 
311 #define __HAL_PWR_PVM1_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM1)
312 
317 #define __HAL_PWR_PVM1_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM1)
318 
323 #define __HAL_PWR_PVM1_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM1)
324 
329 #define __HAL_PWR_PVM1_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM1)
330 
335 #define __HAL_PWR_PVM1_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM1)
336 
337 
342 #define __HAL_PWR_PVM1_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM1)
343 
344 
349 #define __HAL_PWR_PVM1_EXTI_ENABLE_RISING_FALLING_EDGE() \
350  do { \
351  __HAL_PWR_PVM1_EXTI_ENABLE_RISING_EDGE(); \
352  __HAL_PWR_PVM1_EXTI_ENABLE_FALLING_EDGE(); \
353  } while(0)
354 
359 #define __HAL_PWR_PVM1_EXTI_DISABLE_RISING_FALLING_EDGE() \
360  do { \
361  __HAL_PWR_PVM1_EXTI_DISABLE_RISING_EDGE(); \
362  __HAL_PWR_PVM1_EXTI_DISABLE_FALLING_EDGE(); \
363  } while(0)
364 
369 #define __HAL_PWR_PVM1_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER2, PWR_EXTI_LINE_PVM1)
370 
375 #define __HAL_PWR_PVM1_EXTI_GET_FLAG() (EXTI->PR2 & PWR_EXTI_LINE_PVM1)
376 
381 #define __HAL_PWR_PVM1_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR2, PWR_EXTI_LINE_PVM1)
382 
383 #endif /* PWR_CR2_PVME1 */
384 
385 
386 #if defined(PWR_CR2_PVME2)
387 
391 #define __HAL_PWR_PVM2_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM2)
392 
397 #define __HAL_PWR_PVM2_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM2)
398 
403 #define __HAL_PWR_PVM2_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM2)
404 
409 #define __HAL_PWR_PVM2_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM2)
410 
415 #define __HAL_PWR_PVM2_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM2)
416 
421 #define __HAL_PWR_PVM2_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM2)
422 
427 #define __HAL_PWR_PVM2_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM2)
428 
429 
434 #define __HAL_PWR_PVM2_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM2)
435 
436 
441 #define __HAL_PWR_PVM2_EXTI_ENABLE_RISING_FALLING_EDGE() \
442  do { \
443  __HAL_PWR_PVM2_EXTI_ENABLE_RISING_EDGE(); \
444  __HAL_PWR_PVM2_EXTI_ENABLE_FALLING_EDGE(); \
445  } while(0)
446 
451 #define __HAL_PWR_PVM2_EXTI_DISABLE_RISING_FALLING_EDGE() \
452  do { \
453  __HAL_PWR_PVM2_EXTI_DISABLE_RISING_EDGE(); \
454  __HAL_PWR_PVM2_EXTI_DISABLE_FALLING_EDGE(); \
455  } while(0)
456 
461 #define __HAL_PWR_PVM2_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER2, PWR_EXTI_LINE_PVM2)
462 
467 #define __HAL_PWR_PVM2_EXTI_GET_FLAG() (EXTI->PR2 & PWR_EXTI_LINE_PVM2)
468 
473 #define __HAL_PWR_PVM2_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR2, PWR_EXTI_LINE_PVM2)
474 
475 #endif /* PWR_CR2_PVME2 */
476 
477 
482 #define __HAL_PWR_PVM3_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM3)
483 
488 #define __HAL_PWR_PVM3_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM3)
489 
494 #define __HAL_PWR_PVM3_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM3)
495 
500 #define __HAL_PWR_PVM3_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM3)
501 
506 #define __HAL_PWR_PVM3_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM3)
507 
512 #define __HAL_PWR_PVM3_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM3)
513 
518 #define __HAL_PWR_PVM3_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM3)
519 
520 
525 #define __HAL_PWR_PVM3_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM3)
526 
527 
532 #define __HAL_PWR_PVM3_EXTI_ENABLE_RISING_FALLING_EDGE() \
533  do { \
534  __HAL_PWR_PVM3_EXTI_ENABLE_RISING_EDGE(); \
535  __HAL_PWR_PVM3_EXTI_ENABLE_FALLING_EDGE(); \
536  } while(0)
537 
542 #define __HAL_PWR_PVM3_EXTI_DISABLE_RISING_FALLING_EDGE() \
543  do { \
544  __HAL_PWR_PVM3_EXTI_DISABLE_RISING_EDGE(); \
545  __HAL_PWR_PVM3_EXTI_DISABLE_FALLING_EDGE(); \
546  } while(0)
547 
552 #define __HAL_PWR_PVM3_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER2, PWR_EXTI_LINE_PVM3)
553 
558 #define __HAL_PWR_PVM3_EXTI_GET_FLAG() (EXTI->PR2 & PWR_EXTI_LINE_PVM3)
559 
564 #define __HAL_PWR_PVM3_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR2, PWR_EXTI_LINE_PVM3)
565 
566 
567 
568 
573 #define __HAL_PWR_PVM4_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM4)
574 
579 #define __HAL_PWR_PVM4_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM4)
580 
585 #define __HAL_PWR_PVM4_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM4)
586 
591 #define __HAL_PWR_PVM4_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM4)
592 
597 #define __HAL_PWR_PVM4_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM4)
598 
603 #define __HAL_PWR_PVM4_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM4)
604 
609 #define __HAL_PWR_PVM4_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM4)
610 
611 
616 #define __HAL_PWR_PVM4_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM4)
617 
618 
623 #define __HAL_PWR_PVM4_EXTI_ENABLE_RISING_FALLING_EDGE() \
624  do { \
625  __HAL_PWR_PVM4_EXTI_ENABLE_RISING_EDGE(); \
626  __HAL_PWR_PVM4_EXTI_ENABLE_FALLING_EDGE(); \
627  } while(0)
628 
633 #define __HAL_PWR_PVM4_EXTI_DISABLE_RISING_FALLING_EDGE() \
634  do { \
635  __HAL_PWR_PVM4_EXTI_DISABLE_RISING_EDGE(); \
636  __HAL_PWR_PVM4_EXTI_DISABLE_FALLING_EDGE(); \
637  } while(0)
638 
643 #define __HAL_PWR_PVM4_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER2, PWR_EXTI_LINE_PVM4)
644 
649 #define __HAL_PWR_PVM4_EXTI_GET_FLAG() (EXTI->PR2 & PWR_EXTI_LINE_PVM4)
650 
655 #define __HAL_PWR_PVM4_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR2, PWR_EXTI_LINE_PVM4)
656 
657 
674 #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) do { \
675  __IO uint32_t tmpreg; \
676  MODIFY_REG(PWR->CR1, PWR_CR1_VOS, (__REGULATOR__)); \
677  /* Delay after an RCC peripheral clock enabling */ \
678  tmpreg = READ_BIT(PWR->CR1, PWR_CR1_VOS); \
679  UNUSED(tmpreg); \
680  } while(0)
681 
686 /* Private macros --------------------------------------------------------*/
691 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \
692  ((PIN) == PWR_WAKEUP_PIN2) || \
693  ((PIN) == PWR_WAKEUP_PIN3) || \
694  ((PIN) == PWR_WAKEUP_PIN4) || \
695  ((PIN) == PWR_WAKEUP_PIN5) || \
696  ((PIN) == PWR_WAKEUP_PIN1_HIGH) || \
697  ((PIN) == PWR_WAKEUP_PIN2_HIGH) || \
698  ((PIN) == PWR_WAKEUP_PIN3_HIGH) || \
699  ((PIN) == PWR_WAKEUP_PIN4_HIGH) || \
700  ((PIN) == PWR_WAKEUP_PIN5_HIGH) || \
701  ((PIN) == PWR_WAKEUP_PIN1_LOW) || \
702  ((PIN) == PWR_WAKEUP_PIN2_LOW) || \
703  ((PIN) == PWR_WAKEUP_PIN3_LOW) || \
704  ((PIN) == PWR_WAKEUP_PIN4_LOW) || \
705  ((PIN) == PWR_WAKEUP_PIN5_LOW))
706 
707 #if defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \
708  defined (STM32L496xx) || defined (STM32L4A6xx) || \
709  defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx)
710 #define IS_PWR_PVM_TYPE(TYPE) (((TYPE) == PWR_PVM_1) ||\
711  ((TYPE) == PWR_PVM_2) ||\
712  ((TYPE) == PWR_PVM_3) ||\
713  ((TYPE) == PWR_PVM_4))
714 #elif defined (STM32L471xx)
715 #define IS_PWR_PVM_TYPE(TYPE) (((TYPE) == PWR_PVM_2) ||\
716  ((TYPE) == PWR_PVM_3) ||\
717  ((TYPE) == PWR_PVM_4))
718 #endif
719 
720 #if defined (STM32L412xx) || defined (STM32L422xx) || defined (STM32L433xx) || defined (STM32L443xx) || defined (STM32L452xx) || defined (STM32L462xx)
721 #define IS_PWR_PVM_TYPE(TYPE) (((TYPE) == PWR_PVM_1) ||\
722  ((TYPE) == PWR_PVM_3) ||\
723  ((TYPE) == PWR_PVM_4))
724 #elif defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L442xx) || defined (STM32L451xx)
725 #define IS_PWR_PVM_TYPE(TYPE) (((TYPE) == PWR_PVM_3) ||\
726  ((TYPE) == PWR_PVM_4))
727 #endif
728 
729 #define IS_PWR_PVM_MODE(MODE) (((MODE) == PWR_PVM_MODE_NORMAL) ||\
730  ((MODE) == PWR_PVM_MODE_IT_RISING) ||\
731  ((MODE) == PWR_PVM_MODE_IT_FALLING) ||\
732  ((MODE) == PWR_PVM_MODE_IT_RISING_FALLING) ||\
733  ((MODE) == PWR_PVM_MODE_EVENT_RISING) ||\
734  ((MODE) == PWR_PVM_MODE_EVENT_FALLING) ||\
735  ((MODE) == PWR_PVM_MODE_EVENT_RISING_FALLING))
736 
737 #if defined(PWR_CR5_R1MODE)
738 #define IS_PWR_VOLTAGE_SCALING_RANGE(RANGE) (((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE1_BOOST) || \
739  ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \
740  ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE2))
741 #else
742 #define IS_PWR_VOLTAGE_SCALING_RANGE(RANGE) (((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \
743  ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE2))
744 #endif
745 
746 
747 #define IS_PWR_BATTERY_RESISTOR_SELECT(RESISTOR) (((RESISTOR) == PWR_BATTERY_CHARGING_RESISTOR_5) ||\
748  ((RESISTOR) == PWR_BATTERY_CHARGING_RESISTOR_1_5))
749 
750 #define IS_PWR_BATTERY_CHARGING(CHARGING) (((CHARGING) == PWR_BATTERY_CHARGING_DISABLE) ||\
751  ((CHARGING) == PWR_BATTERY_CHARGING_ENABLE))
752 
753 #define IS_PWR_GPIO_BIT_NUMBER(BIT_NUMBER) (((BIT_NUMBER) & GPIO_PIN_MASK) != (uint32_t)0x00)
754 
755 
756 #if defined (STM32L412xx) || defined (STM32L422xx)
757 #define IS_PWR_GPIO(GPIO) (((GPIO) == PWR_GPIO_A) ||\
758  ((GPIO) == PWR_GPIO_B) ||\
759  ((GPIO) == PWR_GPIO_C) ||\
760  ((GPIO) == PWR_GPIO_D) ||\
761  ((GPIO) == PWR_GPIO_H))
762 #elif defined (STM32L431xx) || defined (STM32L433xx) || defined (STM32L443xx) || \
763  defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx)
764 #define IS_PWR_GPIO(GPIO) (((GPIO) == PWR_GPIO_A) ||\
765  ((GPIO) == PWR_GPIO_B) ||\
766  ((GPIO) == PWR_GPIO_C) ||\
767  ((GPIO) == PWR_GPIO_D) ||\
768  ((GPIO) == PWR_GPIO_E) ||\
769  ((GPIO) == PWR_GPIO_H))
770 #elif defined (STM32L432xx) || defined (STM32L442xx)
771 #define IS_PWR_GPIO(GPIO) (((GPIO) == PWR_GPIO_A) ||\
772  ((GPIO) == PWR_GPIO_B) ||\
773  ((GPIO) == PWR_GPIO_C) ||\
774  ((GPIO) == PWR_GPIO_H))
775 #elif defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx)
776 #define IS_PWR_GPIO(GPIO) (((GPIO) == PWR_GPIO_A) ||\
777  ((GPIO) == PWR_GPIO_B) ||\
778  ((GPIO) == PWR_GPIO_C) ||\
779  ((GPIO) == PWR_GPIO_D) ||\
780  ((GPIO) == PWR_GPIO_E) ||\
781  ((GPIO) == PWR_GPIO_F) ||\
782  ((GPIO) == PWR_GPIO_G) ||\
783  ((GPIO) == PWR_GPIO_H))
784 #elif defined (STM32L496xx) || defined (STM32L4A6xx) || \
785  defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx)
786 #define IS_PWR_GPIO(GPIO) (((GPIO) == PWR_GPIO_A) ||\
787  ((GPIO) == PWR_GPIO_B) ||\
788  ((GPIO) == PWR_GPIO_C) ||\
789  ((GPIO) == PWR_GPIO_D) ||\
790  ((GPIO) == PWR_GPIO_E) ||\
791  ((GPIO) == PWR_GPIO_F) ||\
792  ((GPIO) == PWR_GPIO_G) ||\
793  ((GPIO) == PWR_GPIO_H) ||\
794  ((GPIO) == PWR_GPIO_I))
795 #endif
796 
797 
812 /* Peripheral Control functions **********************************************/
813 uint32_t HAL_PWREx_GetVoltageRange(void);
814 HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling);
815 void HAL_PWREx_EnableBatteryCharging(uint32_t ResistorSelection);
816 void HAL_PWREx_DisableBatteryCharging(void);
817 #if defined(PWR_CR2_USV)
818 void HAL_PWREx_EnableVddUSB(void);
819 void HAL_PWREx_DisableVddUSB(void);
820 #endif /* PWR_CR2_USV */
821 #if defined(PWR_CR2_IOSV)
822 void HAL_PWREx_EnableVddIO2(void);
823 void HAL_PWREx_DisableVddIO2(void);
824 #endif /* PWR_CR2_IOSV */
825 void HAL_PWREx_EnableInternalWakeUpLine(void);
826 void HAL_PWREx_DisableInternalWakeUpLine(void);
827 HAL_StatusTypeDef HAL_PWREx_EnableGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber);
828 HAL_StatusTypeDef HAL_PWREx_DisableGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber);
829 HAL_StatusTypeDef HAL_PWREx_EnableGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber);
830 HAL_StatusTypeDef HAL_PWREx_DisableGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber);
831 void HAL_PWREx_EnablePullUpPullDownConfig(void);
832 void HAL_PWREx_DisablePullUpPullDownConfig(void);
833 void HAL_PWREx_EnableSRAM2ContentRetention(void);
834 void HAL_PWREx_DisableSRAM2ContentRetention(void);
835 #if defined(PWR_CR1_RRSTP)
836 void HAL_PWREx_EnableSRAM3ContentRetention(void);
837 void HAL_PWREx_DisableSRAM3ContentRetention(void);
838 #endif /* PWR_CR1_RRSTP */
839 #if defined(PWR_CR3_DSIPDEN)
840 void HAL_PWREx_EnableDSIPinsPDActivation(void);
841 void HAL_PWREx_DisableDSIPinsPDActivation(void);
842 #endif /* PWR_CR3_DSIPDEN */
843 #if defined(PWR_CR2_PVME1)
844 void HAL_PWREx_EnablePVM1(void);
845 void HAL_PWREx_DisablePVM1(void);
846 #endif /* PWR_CR2_PVME1 */
847 #if defined(PWR_CR2_PVME2)
848 void HAL_PWREx_EnablePVM2(void);
849 void HAL_PWREx_DisablePVM2(void);
850 #endif /* PWR_CR2_PVME2 */
851 void HAL_PWREx_EnablePVM3(void);
852 void HAL_PWREx_DisablePVM3(void);
853 void HAL_PWREx_EnablePVM4(void);
854 void HAL_PWREx_DisablePVM4(void);
855 HAL_StatusTypeDef HAL_PWREx_ConfigPVM(PWR_PVMTypeDef *sConfigPVM);
856 #if defined(PWR_CR3_ENULP)
857 void HAL_PWREx_EnableBORPVD_ULP(void);
858 void HAL_PWREx_DisableBORPVD_ULP(void);
859 #endif /* PWR_CR3_ENULP */
860 #if defined(PWR_CR4_EXT_SMPS_ON)
861 void HAL_PWREx_EnableExtSMPS_0V95(void);
862 void HAL_PWREx_DisableExtSMPS_0V95(void);
863 #endif /* PWR_CR4_EXT_SMPS_ON */
864 
865 
866 /* Low Power modes configuration functions ************************************/
867 void HAL_PWREx_EnableLowPowerRunMode(void);
868 HAL_StatusTypeDef HAL_PWREx_DisableLowPowerRunMode(void);
869 void HAL_PWREx_EnterSTOP0Mode(uint8_t STOPEntry);
870 void HAL_PWREx_EnterSTOP1Mode(uint8_t STOPEntry);
871 void HAL_PWREx_EnterSTOP2Mode(uint8_t STOPEntry);
872 void HAL_PWREx_EnterSHUTDOWNMode(void);
873 
874 void HAL_PWREx_PVD_PVM_IRQHandler(void);
875 #if defined(PWR_CR2_PVME1)
876 void HAL_PWREx_PVM1Callback(void);
877 #endif /* PWR_CR2_PVME1 */
878 #if defined(PWR_CR2_PVME2)
879 void HAL_PWREx_PVM2Callback(void);
880 #endif /* PWR_CR2_PVME2 */
881 void HAL_PWREx_PVM3Callback(void);
882 void HAL_PWREx_PVM4Callback(void);
883 
900 #ifdef __cplusplus
901 }
902 #endif
903 
904 
905 #endif /* __STM32L4xx_HAL_PWR_EX_H */
906 
907 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
HAL_PWREx_DisableLowPowerRunMode
HAL_StatusTypeDef HAL_PWREx_DisableLowPowerRunMode(void)
Exit Low-power Run mode.
Definition: stm32l4xx_hal_pwr_ex.c:1115
HAL_PWREx_EnterSHUTDOWNMode
void HAL_PWREx_EnterSHUTDOWNMode(void)
Enter Shutdown mode.
Definition: stm32l4xx_hal_pwr_ex.c:1304
HAL_PWREx_EnableExtSMPS_0V95
void HAL_PWREx_EnableExtSMPS_0V95(void)
Enable the CFLDO working @ 0.95V.
Definition: stm32l4xx_hal_pwr_ex.c:779
HAL_PWREx_EnablePVM2
void HAL_PWREx_EnablePVM2(void)
Enable the Power Voltage Monitoring 2: VDDIO2 versus 0.9V.
Definition: stm32l4xx_hal_pwr_ex.c:870
HAL_PWREx_EnableDSIPinsPDActivation
void HAL_PWREx_EnableDSIPinsPDActivation(void)
Enable pull-down activation on DSI pins.
Definition: stm32l4xx_hal_pwr_ex.c:828
HAL_PWREx_DisableGPIOPullDown
HAL_StatusTypeDef HAL_PWREx_DisableGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber)
Disable GPIO pull-down state in Standby and Shutdown modes.
Definition: stm32l4xx_hal_pwr_ex.c:635
HAL_PWREx_DisableGPIOPullUp
HAL_StatusTypeDef HAL_PWREx_DisableGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber)
Disable GPIO pull-up state in Standby mode and Shutdown modes.
Definition: stm32l4xx_hal_pwr_ex.c:475
HAL_PWREx_EnterSTOP1Mode
void HAL_PWREx_EnterSTOP1Mode(uint8_t STOPEntry)
Enter Stop 1 mode.
Definition: stm32l4xx_hal_pwr_ex.c:1210
HAL_PWREx_DisablePVM2
void HAL_PWREx_DisablePVM2(void)
Disable the Power Voltage Monitoring 2: VDDIO2 versus 0.9V.
Definition: stm32l4xx_hal_pwr_ex.c:879
HAL_PWREx_EnableVddUSB
void HAL_PWREx_EnableVddUSB(void)
Enable VDDUSB supply.
Definition: stm32l4xx_hal_pwr_ex.c:311
HAL_PWREx_PVD_PVM_IRQHandler
void HAL_PWREx_PVD_PVM_IRQHandler(void)
This function handles the PWR PVD/PVMx interrupt request.
Definition: stm32l4xx_hal_pwr_ex.c:1329
stm32l4xx_hal_def.h
This file contains HAL common defines, enumeration, macros and structures definitions.
HAL_PWREx_DisableExtSMPS_0V95
void HAL_PWREx_DisableExtSMPS_0V95(void)
Disable the CFLDO working @ 0.95V.
Definition: stm32l4xx_hal_pwr_ex.c:791
HAL_PWREx_DisableSRAM3ContentRetention
void HAL_PWREx_DisableSRAM3ContentRetention(void)
Disable SRAM3 content retention in Stop 2 mode.
Definition: stm32l4xx_hal_pwr_ex.c:817
HAL_PWREx_DisableVddIO2
void HAL_PWREx_DisableVddIO2(void)
Disable VDDIO2 supply.
Definition: stm32l4xx_hal_pwr_ex.c:343
HAL_PWREx_EnablePullUpPullDownConfig
void HAL_PWREx_EnablePullUpPullDownConfig(void)
Enable pull-up and pull-down configuration.
Definition: stm32l4xx_hal_pwr_ex.c:705
HAL_PWREx_DisablePullUpPullDownConfig
void HAL_PWREx_DisablePullUpPullDownConfig(void)
Disable pull-up and pull-down configuration.
Definition: stm32l4xx_hal_pwr_ex.c:717
HAL_PWREx_EnablePVM3
void HAL_PWREx_EnablePVM3(void)
Enable the Power Voltage Monitoring 3: VDDA versus 1.62V.
Definition: stm32l4xx_hal_pwr_ex.c:890
HAL_PWREx_PVM1Callback
void HAL_PWREx_PVM1Callback(void)
PWR PVM1 interrupt callback.
Definition: stm32l4xx_hal_pwr_ex.c:1385
HAL_PWREx_DisableBORPVD_ULP
void HAL_PWREx_DisableBORPVD_ULP(void)
Disable Ultra Low Power BORL, BORH and PVD for STOP2 and Standby modes.
Definition: stm32l4xx_hal_pwr_ex.c:765
HAL_PWREx_EnablePVM1
void HAL_PWREx_EnablePVM1(void)
Enable the Power Voltage Monitoring 1: VDDUSB versus 1.2V.
Definition: stm32l4xx_hal_pwr_ex.c:849
HAL_PWREx_EnablePVM4
void HAL_PWREx_EnablePVM4(void)
Enable the Power Voltage Monitoring 4: VDDA versus 2.2V.
Definition: stm32l4xx_hal_pwr_ex.c:909
HAL_PWREx_DisableInternalWakeUpLine
void HAL_PWREx_DisableInternalWakeUpLine(void)
Disable Internal Wake-up Line.
Definition: stm32l4xx_hal_pwr_ex.c:364
HAL_PWREx_DisablePVM4
void HAL_PWREx_DisablePVM4(void)
Disable the Power Voltage Monitoring 4: VDDA versus 2.2V.
Definition: stm32l4xx_hal_pwr_ex.c:918
HAL_PWREx_EnterSTOP0Mode
void HAL_PWREx_EnterSTOP0Mode(uint8_t STOPEntry)
Enter Stop 0 mode.
Definition: stm32l4xx_hal_pwr_ex.c:1159
HAL_PWREx_DisableDSIPinsPDActivation
void HAL_PWREx_DisableDSIPinsPDActivation(void)
Disable pull-down activation on DSI pins.
Definition: stm32l4xx_hal_pwr_ex.c:838
HAL_PWREx_DisableSRAM2ContentRetention
void HAL_PWREx_DisableSRAM2ContentRetention(void)
Disable SRAM2 content retention in Standby mode.
Definition: stm32l4xx_hal_pwr_ex.c:742
HAL_PWREx_ConfigPVM
HAL_StatusTypeDef HAL_PWREx_ConfigPVM(PWR_PVMTypeDef *sConfigPVM)
Configure the Peripheral Voltage Monitoring (PVM).
Definition: stm32l4xx_hal_pwr_ex.c:938
HAL_PWREx_DisablePVM3
void HAL_PWREx_DisablePVM3(void)
Disable the Power Voltage Monitoring 3: VDDA versus 1.62V.
Definition: stm32l4xx_hal_pwr_ex.c:899
HAL_PWREx_GetVoltageRange
uint32_t HAL_PWREx_GetVoltageRange(void)
Return Voltage Scaling Range.
Definition: stm32l4xx_hal_pwr_ex.c:115
HAL_PWREx_DisableVddUSB
void HAL_PWREx_DisableVddUSB(void)
Disable VDDUSB supply.
Definition: stm32l4xx_hal_pwr_ex.c:321
HAL_PWREx_EnableSRAM2ContentRetention
void HAL_PWREx_EnableSRAM2ContentRetention(void)
Enable SRAM2 content retention in Standby mode.
Definition: stm32l4xx_hal_pwr_ex.c:730
HAL_PWREx_EnterSTOP2Mode
void HAL_PWREx_EnterSTOP2Mode(uint8_t STOPEntry)
Enter Stop 2 mode.
Definition: stm32l4xx_hal_pwr_ex.c:1262
HAL_PWREx_EnableGPIOPullUp
HAL_StatusTypeDef HAL_PWREx_EnableGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber)
Enable GPIO pull-up state in Standby and Shutdown modes.
Definition: stm32l4xx_hal_pwr_ex.c:392
HAL_PWREx_PVM4Callback
void HAL_PWREx_PVM4Callback(void)
PWR PVM4 interrupt callback.
Definition: stm32l4xx_hal_pwr_ex.c:1421
HAL_PWREx_PVM2Callback
void HAL_PWREx_PVM2Callback(void)
PWR PVM2 interrupt callback.
Definition: stm32l4xx_hal_pwr_ex.c:1398
HAL_PWREx_DisableBatteryCharging
void HAL_PWREx_DisableBatteryCharging(void)
Disable battery charging.
Definition: stm32l4xx_hal_pwr_ex.c:299
HAL_PWREx_PVM3Callback
void HAL_PWREx_PVM3Callback(void)
PWR PVM3 interrupt callback.
Definition: stm32l4xx_hal_pwr_ex.c:1410
HAL_PWREx_EnableBatteryCharging
void HAL_PWREx_EnableBatteryCharging(uint32_t ResistorSelection)
Enable battery charging. When VDD is present, charge the external battery on VBAT thru an internal re...
Definition: stm32l4xx_hal_pwr_ex.c:283
HAL_PWREx_EnableInternalWakeUpLine
void HAL_PWREx_EnableInternalWakeUpLine(void)
Enable Internal Wake-up Line.
Definition: stm32l4xx_hal_pwr_ex.c:354
HAL_PWREx_EnableGPIOPullDown
HAL_StatusTypeDef HAL_PWREx_EnableGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber)
Enable GPIO pull-down state in Standby and Shutdown modes.
Definition: stm32l4xx_hal_pwr_ex.c:552
HAL_PWREx_ControlVoltageScaling
HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling)
Configure the main internal regulator output voltage.
Definition: stm32l4xx_hal_pwr_ex.c:164
HAL_PWREx_EnableVddIO2
void HAL_PWREx_EnableVddIO2(void)
Enable VDDIO2 supply.
Definition: stm32l4xx_hal_pwr_ex.c:333
HAL_PWREx_EnableSRAM3ContentRetention
void HAL_PWREx_EnableSRAM3ContentRetention(void)
Enable SRAM3 content retention in Stop 2 mode.
Definition: stm32l4xx_hal_pwr_ex.c:805
HAL_PWREx_DisablePVM1
void HAL_PWREx_DisablePVM1(void)
Disable the Power Voltage Monitoring 1: VDDUSB versus 1.2V.
Definition: stm32l4xx_hal_pwr_ex.c:858
HAL_PWREx_EnableBORPVD_ULP
void HAL_PWREx_EnableBORPVD_ULP(void)
Enable Ultra Low Power BORL, BORH and PVD for STOP2 and Standby modes.
Definition: stm32l4xx_hal_pwr_ex.c:754
HAL_PWREx_EnableLowPowerRunMode
void HAL_PWREx_EnableLowPowerRunMode(void)
Enter Low-power Run mode.
Definition: stm32l4xx_hal_pwr_ex.c:1100