21 #ifndef STM32L4xx_LL_DMA2D_H 22 #define STM32L4xx_LL_DMA2D_H 29 #include "stm32l4xx.h" 45 #if defined(USE_FULL_LL_DRIVER) 56 #if defined(USE_FULL_LL_DRIVER) 120 #if defined(DMA2D_OUTPUT_TWO_BY_TWO_SWAP_SUPPORT) 127 #if defined(DMA2D_LINE_OFFSET_MODE_SUPPORT) 327 #define LL_DMA2D_FLAG_CEIF DMA2D_ISR_CEIF 328 #define LL_DMA2D_FLAG_CTCIF DMA2D_ISR_CTCIF 329 #define LL_DMA2D_FLAG_CAEIF DMA2D_ISR_CAEIF 330 #define LL_DMA2D_FLAG_TWIF DMA2D_ISR_TWIF 331 #define LL_DMA2D_FLAG_TCIF DMA2D_ISR_TCIF 332 #define LL_DMA2D_FLAG_TEIF DMA2D_ISR_TEIF 341 #define LL_DMA2D_IT_CEIE DMA2D_CR_CEIE 342 #define LL_DMA2D_IT_CTCIE DMA2D_CR_CTCIE 343 #define LL_DMA2D_IT_CAEIE DMA2D_CR_CAEIE 344 #define LL_DMA2D_IT_TWIE DMA2D_CR_TWIE 345 #define LL_DMA2D_IT_TCIE DMA2D_CR_TCIE 346 #define LL_DMA2D_IT_TEIE DMA2D_CR_TEIE 354 #define LL_DMA2D_MODE_M2M 0x00000000U 355 #define LL_DMA2D_MODE_M2M_PFC DMA2D_CR_MODE_0 356 #define LL_DMA2D_MODE_M2M_BLEND DMA2D_CR_MODE_1 357 #define LL_DMA2D_MODE_R2M (DMA2D_CR_MODE_0|DMA2D_CR_MODE_1) 358 #if defined(DMA2D_M2M_BLEND_FIXED_COLOR_FG_BG_SUPPORT) 359 #define LL_DMA2D_MODE_M2M_BLEND_FIXED_COLOR_FG DMA2D_CR_MODE_2 360 #define LL_DMA2D_MODE_M2M_BLEND_FIXED_COLOR_BG (DMA2D_CR_MODE_0|DMA2D_CR_MODE_2) 369 #define LL_DMA2D_OUTPUT_MODE_ARGB8888 0x00000000U 370 #define LL_DMA2D_OUTPUT_MODE_RGB888 DMA2D_OPFCCR_CM_0 371 #define LL_DMA2D_OUTPUT_MODE_RGB565 DMA2D_OPFCCR_CM_1 372 #define LL_DMA2D_OUTPUT_MODE_ARGB1555 (DMA2D_OPFCCR_CM_0|DMA2D_OPFCCR_CM_1) 373 #define LL_DMA2D_OUTPUT_MODE_ARGB4444 DMA2D_OPFCCR_CM_2 381 #define LL_DMA2D_INPUT_MODE_ARGB8888 0x00000000U 382 #define LL_DMA2D_INPUT_MODE_RGB888 DMA2D_FGPFCCR_CM_0 383 #define LL_DMA2D_INPUT_MODE_RGB565 DMA2D_FGPFCCR_CM_1 384 #define LL_DMA2D_INPUT_MODE_ARGB1555 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1) 385 #define LL_DMA2D_INPUT_MODE_ARGB4444 DMA2D_FGPFCCR_CM_2 386 #define LL_DMA2D_INPUT_MODE_L8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_2) 387 #define LL_DMA2D_INPUT_MODE_AL44 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) 388 #define LL_DMA2D_INPUT_MODE_AL88 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) 389 #define LL_DMA2D_INPUT_MODE_L4 DMA2D_FGPFCCR_CM_3 390 #define LL_DMA2D_INPUT_MODE_A8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_3) 391 #define LL_DMA2D_INPUT_MODE_A4 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_3) 399 #define LL_DMA2D_ALPHA_MODE_NO_MODIF 0x00000000U 400 #define LL_DMA2D_ALPHA_MODE_REPLACE DMA2D_FGPFCCR_AM_0 401 #define LL_DMA2D_ALPHA_MODE_COMBINE DMA2D_FGPFCCR_AM_1 407 #if defined(DMA2D_OUTPUT_TWO_BY_TWO_SWAP_SUPPORT) 411 #define LL_DMA2D_SWAP_MODE_REGULAR 0x00000000U 412 #define LL_DMA2D_SWAP_MODE_TWO_BY_TWO DMA2D_OPFCCR_SB 421 #define LL_DMA2D_RB_MODE_REGULAR 0x00000000U 422 #define LL_DMA2D_RB_MODE_SWAP DMA2D_FGPFCCR_RBS 430 #define LL_DMA2D_ALPHA_REGULAR 0x00000000U 431 #define LL_DMA2D_ALPHA_INVERTED DMA2D_FGPFCCR_AI 437 #if defined(DMA2D_LINE_OFFSET_MODE_SUPPORT) 441 #define LL_DMA2D_LINE_OFFSET_PIXELS 0x00000000U 442 #define LL_DMA2D_LINE_OFFSET_BYTES DMA2D_CR_LOM 451 #define LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 0x00000000U 452 #define LL_DMA2D_CLUT_COLOR_MODE_RGB888 DMA2D_FGPFCCR_CCM 478 #define LL_DMA2D_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG((__INSTANCE__)->__REG__, (__VALUE__)) 486 #define LL_DMA2D_ReadReg(__INSTANCE__, __REG__) READ_REG((__INSTANCE__)->__REG__) 512 SET_BIT(DMA2Dx->CR, DMA2D_CR_START);
523 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_START) == (DMA2D_CR_START)) ? 1UL : 0UL);
535 MODIFY_REG(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START, DMA2D_CR_SUSP);
547 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START);
560 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_SUSP) == (DMA2D_CR_SUSP)) ? 1UL : 0UL);
572 MODIFY_REG(DMA2Dx->CR, DMA2D_CR_ABORT | DMA2D_CR_START, DMA2D_CR_ABORT);
585 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_ABORT) == (DMA2D_CR_ABORT)) ? 1UL : 0UL);
624 return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_MODE));
641 MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM, ColorMode);
657 return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM));
671 MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_RBS, RBSwapMode);
684 return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_RBS));
698 MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_AI, AlphaInversionMode);
711 return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_AI));
715 #if defined(DMA2D_OUTPUT_TWO_BY_TWO_SWAP_SUPPORT) 727 MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_SB, OutputSwapMode);
740 return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_SB));
744 #if defined(DMA2D_LINE_OFFSET_MODE_SUPPORT) 756 MODIFY_REG(DMA2Dx->CR, DMA2D_CR_LOM, LineOffsetMode);
769 return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_LOM));
786 MODIFY_REG(DMA2Dx->OOR, DMA2D_OOR_LO, LineOffset);
801 return (uint32_t)(READ_BIT(DMA2Dx->OOR, DMA2D_OOR_LO));
813 MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_PL, (NbrOfPixelsPerLines << DMA2D_NLR_PL_Pos));
824 return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_PL) >> DMA2D_NLR_PL_Pos);
836 MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_NL, NbrOfLines);
847 return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_NL));
859 LL_DMA2D_WriteReg(DMA2Dx, OMAR, OutputMemoryAddress);
870 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, OMAR));
889 MODIFY_REG(DMA2Dx->OCOLR, (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1), \
907 return (uint32_t)(READ_BIT(DMA2Dx->OCOLR, \
908 (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1)));
920 MODIFY_REG(DMA2Dx->LWR, DMA2D_LWR_LW, LineWatermark);
931 return (uint32_t)(READ_BIT(DMA2Dx->LWR, DMA2D_LWR_LW));
943 MODIFY_REG(DMA2Dx->AMTCR, DMA2D_AMTCR_DT, (DeadTime << DMA2D_AMTCR_DT_Pos));
954 return (uint32_t)(READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_DT) >> DMA2D_AMTCR_DT_Pos);
965 SET_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN);
976 CLEAR_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN);
987 return ((READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN) == (DMA2D_AMTCR_EN)) ? 1UL : 0UL);
1003 LL_DMA2D_WriteReg(DMA2Dx, FGMAR, MemoryAddress);
1014 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGMAR));
1025 SET_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START);
1036 return ((READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START) == (DMA2D_FGPFCCR_START)) ? 1UL : 0UL);
1059 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM, ColorMode);
1081 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM));
1096 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM, AphaMode);
1110 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM));
1122 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA, (Alpha << DMA2D_FGPFCCR_ALPHA_Pos));
1133 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA) >> DMA2D_FGPFCCR_ALPHA_Pos);
1147 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_RBS, RBSwapMode);
1160 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_RBS));
1174 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AI, AlphaInversionMode);
1187 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AI));
1199 MODIFY_REG(DMA2Dx->FGOR, DMA2D_FGOR_LO, LineOffset);
1210 return (uint32_t)(READ_BIT(DMA2Dx->FGOR, DMA2D_FGOR_LO));
1226 MODIFY_REG(DMA2Dx->FGCOLR, (DMA2D_FGCOLR_RED | DMA2D_FGCOLR_GREEN | DMA2D_FGCOLR_BLUE), \
1227 ((Red << DMA2D_FGCOLR_RED_Pos) | (Green << DMA2D_FGCOLR_GREEN_Pos) | Blue));
1239 MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED, (Red << DMA2D_FGCOLR_RED_Pos));
1250 return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED) >> DMA2D_FGCOLR_RED_Pos);
1262 MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN, (Green << DMA2D_FGCOLR_GREEN_Pos));
1273 return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN) >> DMA2D_FGCOLR_GREEN_Pos);
1285 MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE, Blue);
1296 return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE));
1308 LL_DMA2D_WriteReg(DMA2Dx, FGCMAR, CLUTMemoryAddress);
1319 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGCMAR));
1331 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS, (CLUTSize << DMA2D_FGPFCCR_CS_Pos));
1342 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS) >> DMA2D_FGPFCCR_CS_Pos);
1356 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM, CLUTColorMode);
1369 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM));
1389 LL_DMA2D_WriteReg(DMA2Dx, BGMAR, MemoryAddress);
1400 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGMAR));
1411 SET_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START);
1422 return ((READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START) == (DMA2D_BGPFCCR_START)) ? 1UL : 0UL);
1445 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM, ColorMode);
1467 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM));
1482 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM, AphaMode);
1496 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM));
1508 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA, (Alpha << DMA2D_BGPFCCR_ALPHA_Pos));
1519 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA) >> DMA2D_BGPFCCR_ALPHA_Pos);
1533 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_RBS, RBSwapMode);
1546 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_RBS));
1560 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AI, AlphaInversionMode);
1573 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AI));
1585 MODIFY_REG(DMA2Dx->BGOR, DMA2D_BGOR_LO, LineOffset);
1596 return (uint32_t)(READ_BIT(DMA2Dx->BGOR, DMA2D_BGOR_LO));
1612 MODIFY_REG(DMA2Dx->BGCOLR, (DMA2D_BGCOLR_RED | DMA2D_BGCOLR_GREEN | DMA2D_BGCOLR_BLUE), \
1613 ((Red << DMA2D_BGCOLR_RED_Pos) | (Green << DMA2D_BGCOLR_GREEN_Pos) | Blue));
1625 MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED, (Red << DMA2D_BGCOLR_RED_Pos));
1636 return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED) >> DMA2D_BGCOLR_RED_Pos);
1648 MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN, (Green << DMA2D_BGCOLR_GREEN_Pos));
1659 return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN) >> DMA2D_BGCOLR_GREEN_Pos);
1671 MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE, Blue);
1682 return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE));
1694 LL_DMA2D_WriteReg(DMA2Dx, BGCMAR, CLUTMemoryAddress);
1705 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGCMAR));
1717 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS, (CLUTSize << DMA2D_BGPFCCR_CS_Pos));
1728 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS) >> DMA2D_BGPFCCR_CS_Pos);
1742 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM, CLUTColorMode);
1755 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM));
1779 return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CEIF) == (DMA2D_ISR_CEIF)) ? 1UL : 0UL);
1790 return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CTCIF) == (DMA2D_ISR_CTCIF)) ? 1UL : 0UL);
1801 return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CAEIF) == (DMA2D_ISR_CAEIF)) ? 1UL : 0UL);
1812 return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TWIF) == (DMA2D_ISR_TWIF)) ? 1UL : 0UL);
1823 return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TCIF) == (DMA2D_ISR_TCIF)) ? 1UL : 0UL);
1834 return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TEIF) == (DMA2D_ISR_TEIF)) ? 1UL : 0UL);
1845 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCEIF);
1856 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCTCIF);
1867 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CAECIF);
1878 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTWIF);
1889 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTCIF);
1900 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTEIF);
1919 SET_BIT(DMA2Dx->CR, DMA2D_CR_CEIE);
1930 SET_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE);
1941 SET_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE);
1952 SET_BIT(DMA2Dx->CR, DMA2D_CR_TWIE);
1963 SET_BIT(DMA2Dx->CR, DMA2D_CR_TCIE);
1974 SET_BIT(DMA2Dx->CR, DMA2D_CR_TEIE);
2051 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CEIE) == (DMA2D_CR_CEIE)) ? 1UL : 0UL);
2062 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE) == (DMA2D_CR_CTCIE)) ? 1UL : 0UL);
2073 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE) == (DMA2D_CR_CAEIE)) ? 1UL : 0UL);
2084 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TWIE) == (DMA2D_CR_TWIE)) ? 1UL : 0UL);
2095 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TCIE) == (DMA2D_CR_TCIE)) ? 1UL : 0UL);
2106 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TEIE) == (DMA2D_CR_TEIE)) ? 1UL : 0UL);
2115 #if defined(USE_FULL_LL_DRIVER) 2130 void LL_DMA2D_ConfigSize(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines, uint32_t NbrOfPixelsPerLines);
__STATIC_INLINE void LL_DMA2D_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
Set DMA2D line offset, expressed on 14 bits ([13:0] bits). OOR LO LL_DMA2D_SetLineOffset.
__STATIC_INLINE void LL_DMA2D_BGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha)
Set DMA2D background alpha value, expressed on 8 bits ([7:0] bits). BGPFCCR ALPHA LL_DMA2D_BGND_SetA...
__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetColorMode(DMA2D_TypeDef *DMA2Dx)
Return DMA2D background color mode. BGPFCCR CM LL_DMA2D_BGND_GetColorMode.
void LL_DMA2D_ConfigLayer(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg, uint32_t LayerIdx)
Configure the foreground or background according to the specified parameters in the LL_DMA2D_LayerCfg...
ErrorStatus LL_DMA2D_DeInit(DMA2D_TypeDef *DMA2Dx)
De-initialize DMA2D registers (registers restored to their default values).
__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
Return DMA2D background line offset, expressed on 14 bits ([13:0] bits). BGOR LO LL_DMA2D_BGND_GetLi...
__STATIC_INLINE void LL_DMA2D_FGND_SetAlphaInvMode(DMA2D_TypeDef *DMA2Dx, uint32_t AlphaInversionMode)
Set DMA2D foreground alpha inversion mode. FGPFCCR AI LL_DMA2D_FGND_SetAlphaInvMode.
__STATIC_INLINE uint32_t LL_DMA2D_GetLineOffsetMode(DMA2D_TypeDef *DMA2Dx)
Return DMA2D line offset mode. CR LOM LL_DMA2D_GetLineOffsetMode.
__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledDeadTime(DMA2D_TypeDef *DMA2Dx)
Indicate if DMA2D dead time functionality is enabled. AMTCR EN LL_DMA2D_IsEnabledDeadTime.
__STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx)
Return DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits) NLR PL LL_DMA2D_GetNbrOf...
__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CAE(DMA2D_TypeDef *DMA2Dx)
Check if the DMA2D CLUT Access Error Interrupt Flag is set or not ISR CAEIF LL_DMA2D_IsActiveFlag_CA...
__STATIC_INLINE void LL_DMA2D_FGND_SetRBSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t RBSwapMode)
Set DMA2D foreground Red Blue swap mode. FGPFCCR RBS LL_DMA2D_FGND_SetRBSwapMode.
__STATIC_INLINE void LL_DMA2D_ClearFlag_TE(DMA2D_TypeDef *DMA2Dx)
Clear DMA2D Transfer Error Interrupt Flag IFCR CTEIF LL_DMA2D_ClearFlag_TE.
__STATIC_INLINE void LL_DMA2D_EnableIT_CTC(DMA2D_TypeDef *DMA2Dx)
Enable CLUT Transfer Complete Interrupt CR CTCIE LL_DMA2D_EnableIT_CTC.
__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx)
Return DMA2D foreground green color value, expressed on 8 bits ([7:0] bits). FGCOLR GREEN LL_DMA2D_F...
uint32_t LL_DMA2D_GetOutputAlphaColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
Return DMA2D output Alpha color.
__STATIC_INLINE void LL_DMA2D_FGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode)
Set DMA2D foreground alpha mode. FGPFCCR AM LL_DMA2D_FGND_SetAlphaMode.
LL DMA2D Layer Configuration Structure Definition.
__STATIC_INLINE void LL_DMA2D_SetOutputMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t OutputMemoryAddress)
Set DMA2D output memory address, expressed on 32 bits ([31:0] bits). OMAR MA LL_DMA2D_SetOutputMemAd...
__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CTC(DMA2D_TypeDef *DMA2Dx)
Check if the DMA2D CLUT Transfer Complete interrupt source is enabled or disabled. CR CTCIE LL_DMA2D_IsEnabledIT_CTC.
__STATIC_INLINE void LL_DMA2D_SetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfPixelsPerLines)
Set DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits). NLR PL LL_DMA2D_SetNbrOfPi...
__STATIC_INLINE void LL_DMA2D_DisableIT_TC(DMA2D_TypeDef *DMA2Dx)
Disable Transfer Complete Interrupt CR TCIE LL_DMA2D_DisableIT_TC.
__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TE(DMA2D_TypeDef *DMA2Dx)
Check if the DMA2D Transfer Error interrupt source is enabled or disabled. CR TEIE LL_DMA2D_IsEnable...
void LL_DMA2D_StructInit(LL_DMA2D_InitTypeDef *DMA2D_InitStruct)
Set each LL_DMA2D_InitTypeDef field to default value.
__STATIC_INLINE void LL_DMA2D_FGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
Set DMA2D foreground line offset, expressed on 14 bits ([13:0] bits). FGOR LO LL_DMA2D_FGND_SetLineO...
__STATIC_INLINE void LL_DMA2D_BGND_SetRBSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t RBSwapMode)
Set DMA2D background Red Blue swap mode. BGPFCCR RBS LL_DMA2D_BGND_SetRBSwapMode.
__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetColorMode(DMA2D_TypeDef *DMA2Dx)
Return DMA2D foreground color mode. FGPFCCR CM LL_DMA2D_FGND_GetColorMode.
__STATIC_INLINE void LL_DMA2D_BGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue)
Set DMA2D background color values, expressed on 24 bits ([23:0] bits). BGCOLR RED LL_DMA2D_BGND_SetC...
__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx)
Return DMA2D background CLUT color mode. BGPFCCR CCM LL_DMA2D_BGND_GetCLUTColorMode.
__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TC(DMA2D_TypeDef *DMA2Dx)
Check if the DMA2D Transfer Complete Interrupt Flag is set or not ISR TCIF LL_DMA2D_IsActiveFlag_TC...
__STATIC_INLINE void LL_DMA2D_FGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green)
Set DMA2D foreground green color value, expressed on 8 bits ([7:0] bits). FGCOLR GREEN LL_DMA2D_FGND...
__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CTC(DMA2D_TypeDef *DMA2Dx)
Check if the DMA2D CLUT Transfer Complete Interrupt Flag is set or not ISR CTCIF LL_DMA2D_IsActiveFl...
__STATIC_INLINE void LL_DMA2D_DisableIT_TE(DMA2D_TypeDef *DMA2Dx)
Disable Transfer Error Interrupt CR TEIE LL_DMA2D_DisableIT_TE.
__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaInvMode(DMA2D_TypeDef *DMA2Dx)
Return DMA2D foreground alpha inversion mode. FGPFCCR AI LL_DMA2D_FGND_GetAlphaInvMode.
__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx)
Get DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits). FGCMAR MA LL_DMA2D_FGN...
__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx)
Get DMA2D background CLUT size, expressed on 8 bits ([7:0] bits). BGPFCCR CS LL_DMA2D_BGND_GetCLUTSi...
__STATIC_INLINE void LL_DMA2D_BGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress)
Set DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits). BGCMAR MA LL_DMA2D_BGN...
__STATIC_INLINE void LL_DMA2D_FGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx)
Enable DMA2D foreground CLUT loading. FGPFCCR START LL_DMA2D_FGND_EnableCLUTLoad.
__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlpha(DMA2D_TypeDef *DMA2Dx)
Return DMA2D background alpha value, expressed on 8 bits ([7:0] bits). BGPFCCR ALPHA LL_DMA2D_BGND_G...
__STATIC_INLINE void LL_DMA2D_Abort(DMA2D_TypeDef *DMA2Dx)
Abort DMA2D transfer.
__STATIC_INLINE uint32_t LL_DMA2D_GetOutputRBSwapMode(DMA2D_TypeDef *DMA2Dx)
Return DMA2D output Red Blue swap mode. OPFCCR RBS LL_DMA2D_GetOutputRBSwapMode. ...
__STATIC_INLINE void LL_DMA2D_FGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha)
Set DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits). FGPFCCR ALPHA LL_DMA2D_FGND_SetA...
__STATIC_INLINE void LL_DMA2D_SetOutputSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t OutputSwapMode)
Set DMA2D output swap mode. OPFCCR SB LL_DMA2D_SetOutputSwapMode.
__STATIC_INLINE void LL_DMA2D_FGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue)
Set DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits). FGCOLR BLUE LL_DMA2D_FGND_S...
__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CAE(DMA2D_TypeDef *DMA2Dx)
Check if the DMA2D CLUT Access Error interrupt source is enabled or disabled. CR CAEIE LL_DMA2D_IsEn...
__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx)
Return DMA2D background green color value, expressed on 8 bits ([7:0] bits). BGCOLR GREEN LL_DMA2D_B...
__STATIC_INLINE void LL_DMA2D_EnableIT_CE(DMA2D_TypeDef *DMA2Dx)
Enable Configuration Error Interrupt CR CEIE LL_DMA2D_EnableIT_CE.
__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlpha(DMA2D_TypeDef *DMA2Dx)
Return DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits). FGPFCCR ALPHA LL_DMA2D_FGND_G...
__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRedColor(DMA2D_TypeDef *DMA2Dx)
Return DMA2D background red color value, expressed on 8 bits ([7:0] bits). BGCOLR RED LL_DMA2D_BGND_...
__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRBSwapMode(DMA2D_TypeDef *DMA2Dx)
Return DMA2D background Red Blue swap mode. BGPFCCR RBS LL_DMA2D_BGND_GetRBSwapMode.
__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx)
Get DMA2D background memory address, expressed on 32 bits ([31:0] bits). BGMAR MA LL_DMA2D_BGND_GetM...
__STATIC_INLINE uint32_t LL_DMA2D_BGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx)
Indicate if DMA2D background CLUT loading is enabled. BGPFCCR START LL_DMA2D_BGND_IsEnabledCLUTLoad...
__STATIC_INLINE uint32_t LL_DMA2D_GetMode(DMA2D_TypeDef *DMA2Dx)
Return DMA2D mode CR MODE LL_DMA2D_GetMode.
__STATIC_INLINE void LL_DMA2D_Start(DMA2D_TypeDef *DMA2Dx)
Start a DMA2D transfer. CR START LL_DMA2D_Start.
__STATIC_INLINE void LL_DMA2D_DisableIT_CTC(DMA2D_TypeDef *DMA2Dx)
Disable CLUT Transfer Complete Interrupt CR CTCIE LL_DMA2D_DisableIT_CTC.
__STATIC_INLINE uint32_t LL_DMA2D_GetOutputAlphaInvMode(DMA2D_TypeDef *DMA2Dx)
Return DMA2D output alpha inversion mode. OPFCCR AI LL_DMA2D_GetOutputAlphaInvMode.
__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx)
Return DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits). FGCOLR BLUE LL_DMA2D_FGN...
__STATIC_INLINE void LL_DMA2D_EnableIT_CAE(DMA2D_TypeDef *DMA2Dx)
Enable CLUT Access Error Interrupt CR CAEIE LL_DMA2D_EnableIT_CAE.
__STATIC_INLINE uint32_t LL_DMA2D_GetOutputSwapMode(DMA2D_TypeDef *DMA2Dx)
Return DMA2D output swap mode. OPFCCR SB LL_DMA2D_GetOutputSwapMode.
__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx)
Return DMA2D foreground alpha mode. FGPFCCR AM LL_DMA2D_FGND_GetAlphaMode.
__STATIC_INLINE void LL_DMA2D_SetLineWatermark(DMA2D_TypeDef *DMA2Dx, uint32_t LineWatermark)
Set DMA2D line watermark, expressed on 16 bits ([15:0] bits). LWR LW LL_DMA2D_SetLineWatermark.
CLEAR_BIT(hrtc->Instance->CR, RTC_CR_WUTE)
__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx)
Return DMA2D foreground CLUT color mode. FGPFCCR CCM LL_DMA2D_FGND_GetCLUTColorMode.
__STATIC_INLINE void LL_DMA2D_BGND_SetAlphaInvMode(DMA2D_TypeDef *DMA2Dx, uint32_t AlphaInversionMode)
Set DMA2D background alpha inversion mode. BGPFCCR AI LL_DMA2D_BGND_SetAlphaInvMode.
uint32_t CLUTMemoryAddress
__STATIC_INLINE uint32_t LL_DMA2D_IsTransferOngoing(DMA2D_TypeDef *DMA2Dx)
Indicate if a DMA2D transfer is ongoing. CR START LL_DMA2D_IsTransferOngoing.
__STATIC_INLINE void LL_DMA2D_EnableDeadTime(DMA2D_TypeDef *DMA2Dx)
Enable DMA2D dead time functionality. AMTCR EN LL_DMA2D_EnableDeadTime.
__STATIC_INLINE void LL_DMA2D_SetOutputRBSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t RBSwapMode)
Set DMA2D output Red Blue swap mode. OPFCCR RBS LL_DMA2D_SetOutputRBSwapMode.
ErrorStatus LL_DMA2D_Init(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_InitTypeDef *DMA2D_InitStruct)
Initialize DMA2D registers according to the specified parameters in DMA2D_InitStruct.
__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TW(DMA2D_TypeDef *DMA2Dx)
Check if the DMA2D Transfer Watermark Interrupt Flag is set or not ISR TWIF LL_DMA2D_IsActiveFlag_TW...
__STATIC_INLINE uint32_t LL_DMA2D_GetLineWatermark(DMA2D_TypeDef *DMA2Dx)
Return DMA2D line watermark, expressed on 16 bits ([15:0] bits). LWR LW LL_DMA2D_GetLineWatermark.
void LL_DMA2D_ConfigOutputColor(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_ColorTypeDef *DMA2D_ColorStruct)
Initialize DMA2D output color register according to the specified parameters in DMA2D_ColorStruct.
__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TW(DMA2D_TypeDef *DMA2Dx)
Check if the DMA2D Transfer Watermark interrupt source is enabled or disabled. CR TWIE LL_DMA2D_IsEn...
uint32_t OutputMemoryAddress
__STATIC_INLINE void LL_DMA2D_DisableIT_CAE(DMA2D_TypeDef *DMA2Dx)
Disable CLUT Access Error Interrupt CR CAEIE LL_DMA2D_DisableIT_CAE.
uint32_t AlphaInversionMode
__STATIC_INLINE void LL_DMA2D_ClearFlag_TC(DMA2D_TypeDef *DMA2Dx)
Clear DMA2D Transfer Complete Interrupt Flag IFCR CTCIF LL_DMA2D_ClearFlag_TC.
__STATIC_INLINE void LL_DMA2D_ClearFlag_TW(DMA2D_TypeDef *DMA2Dx)
Clear DMA2D Transfer Watermark Interrupt Flag IFCR CTWIF LL_DMA2D_ClearFlag_TW.
__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx)
Return DMA2D background alpha mode. BGPFCCR AM LL_DMA2D_BGND_GetAlphaMode.
__STATIC_INLINE void LL_DMA2D_EnableIT_TE(DMA2D_TypeDef *DMA2Dx)
Enable Transfer Error Interrupt CR TEIE LL_DMA2D_EnableIT_TE.
__STATIC_INLINE void LL_DMA2D_DisableIT_CE(DMA2D_TypeDef *DMA2Dx)
Disable Configuration Error Interrupt CR CEIE LL_DMA2D_DisableIT_CE.
__STATIC_INLINE void LL_DMA2D_ClearFlag_CAE(DMA2D_TypeDef *DMA2Dx)
Clear DMA2D CLUT Access Error Interrupt Flag IFCR CAECIF LL_DMA2D_ClearFlag_CAE. ...
__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CE(DMA2D_TypeDef *DMA2Dx)
Check if the DMA2D Configuration Error interrupt source is enabled or disabled. CR CEIE LL_DMA2D_IsE...
__STATIC_INLINE void LL_DMA2D_FGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress)
Set DMA2D foreground memory address, expressed on 32 bits ([31:0] bits). FGMAR MA LL_DMA2D_FGND_SetM...
LL DMA2D Init Structure Definition.
__STATIC_INLINE void LL_DMA2D_EnableIT_TC(DMA2D_TypeDef *DMA2Dx)
Enable Transfer Complete Interrupt CR TCIE LL_DMA2D_EnableIT_TC.
__STATIC_INLINE void LL_DMA2D_BGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode)
Set DMA2D background alpha mode. BGPFCCR AM LL_DMA2D_BGND_SetAlphaMode.
__STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfLines(DMA2D_TypeDef *DMA2Dx)
Return DMA2D number of lines, expressed on 16 bits ([15:0] bits). NLR NL LL_DMA2D_GetNbrOfLines.
__STATIC_INLINE void LL_DMA2D_SetDeadTime(DMA2D_TypeDef *DMA2Dx, uint32_t DeadTime)
Set DMA2D dead time, expressed on 8 bits ([7:0] bits). AMTCR DT LL_DMA2D_SetDeadTime.
__STATIC_INLINE uint32_t LL_DMA2D_IsAborted(DMA2D_TypeDef *DMA2Dx)
Indicate if DMA2D transfer is aborted.
__STATIC_INLINE void LL_DMA2D_BGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green)
Set DMA2D background green color value, expressed on 8 bits ([7:0] bits). BGCOLR GREEN LL_DMA2D_BGND...
__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaInvMode(DMA2D_TypeDef *DMA2Dx)
Return DMA2D background alpha inversion mode. BGPFCCR AI LL_DMA2D_BGND_GetAlphaInvMode.
uint32_t LL_DMA2D_GetOutputRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
Return DMA2D output Red color.
__STATIC_INLINE uint32_t LL_DMA2D_IsSuspended(DMA2D_TypeDef *DMA2Dx)
Indicate if DMA2D transfer is suspended.
__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx)
Get DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits). BGCMAR MA LL_DMA2D_BGN...
__STATIC_INLINE void LL_DMA2D_SetOutputColor(DMA2D_TypeDef *DMA2Dx, uint32_t OutputColor)
Set DMA2D output color, expressed on 32 bits ([31:0] bits).
__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
Return DMA2D foreground line offset, expressed on 14 bits ([13:0] bits). FGOR LO LL_DMA2D_FGND_GetLi...
__STATIC_INLINE uint32_t LL_DMA2D_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
Return DMA2D line offset, expressed on 14 bits ([13:0] bits). OOR LO LL_DMA2D_GetLineOffset.
__STATIC_INLINE void LL_DMA2D_BGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red)
Set DMA2D background red color value, expressed on 8 bits ([7:0] bits). BGCOLR RED LL_DMA2D_BGND_Set...
__STATIC_INLINE uint32_t LL_DMA2D_FGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx)
Indicate if DMA2D foreground CLUT loading is enabled. FGPFCCR START LL_DMA2D_FGND_IsEnabledCLUTLoad...
__STATIC_INLINE void LL_DMA2D_FGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red)
Set DMA2D foreground red color value, expressed on 8 bits ([7:0] bits). FGCOLR RED LL_DMA2D_FGND_Set...
__STATIC_INLINE uint32_t LL_DMA2D_GetOutputMemAddr(DMA2D_TypeDef *DMA2Dx)
Get DMA2D output memory address, expressed on 32 bits ([31:0] bits). OMAR MA LL_DMA2D_GetOutputMemAd...
__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TC(DMA2D_TypeDef *DMA2Dx)
Check if the DMA2D Transfer Complete interrupt source is enabled or disabled. CR TCIE LL_DMA2D_IsEna...
__STATIC_INLINE void LL_DMA2D_DisableDeadTime(DMA2D_TypeDef *DMA2Dx)
Disable DMA2D dead time functionality. AMTCR EN LL_DMA2D_DisableDeadTime.
void LL_DMA2D_ConfigSize(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines, uint32_t NbrOfPixelsPerLines)
Configure DMA2D transfer size.
__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx)
Return DMA2D background blue color value, expressed on 8 bits ([7:0] bits). BGCOLR BLUE LL_DMA2D_BGN...
__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TE(DMA2D_TypeDef *DMA2Dx)
Check if the DMA2D Transfer Error Interrupt Flag is set or not ISR TEIF LL_DMA2D_IsActiveFlag_TE.
__STATIC_INLINE void LL_DMA2D_SetOutputColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
Set DMA2D output color mode. OPFCCR CM LL_DMA2D_SetOutputColorMode.
__STATIC_INLINE uint32_t LL_DMA2D_GetOutputColor(DMA2D_TypeDef *DMA2Dx)
Get DMA2D output color, expressed on 32 bits ([31:0] bits).
__STATIC_INLINE void LL_DMA2D_Suspend(DMA2D_TypeDef *DMA2Dx)
Suspend DMA2D transfer.
__STATIC_INLINE void LL_DMA2D_BGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx)
Enable DMA2D background CLUT loading. BGPFCCR START LL_DMA2D_BGND_EnableCLUTLoad.
__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRedColor(DMA2D_TypeDef *DMA2Dx)
Return DMA2D foreground red color value, expressed on 8 bits ([7:0] bits). FGCOLR RED LL_DMA2D_FGND_...
__STATIC_INLINE void LL_DMA2D_BGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
Set DMA2D background color mode. BGPFCCR CM LL_DMA2D_BGND_SetColorMode.
__STATIC_INLINE void LL_DMA2D_FGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue)
Set DMA2D foreground color values, expressed on 24 bits ([23:0] bits). FGCOLR RED LL_DMA2D_FGND_SetC...
MODIFY_REG(hrtc->Instance->CR, RTC_CR_WUCKSEL,(uint32_t) WakeUpClock)
__STATIC_INLINE void LL_DMA2D_BGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize)
Set DMA2D background CLUT size, expressed on 8 bits ([7:0] bits). BGPFCCR CS LL_DMA2D_BGND_SetCLUTSi...
__STATIC_INLINE void LL_DMA2D_EnableIT_TW(DMA2D_TypeDef *DMA2Dx)
Enable Transfer Watermark Interrupt CR TWIE LL_DMA2D_EnableIT_TW.
__STATIC_INLINE void LL_DMA2D_BGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
Set DMA2D background line offset, expressed on 14 bits ([13:0] bits). BGOR LO LL_DMA2D_BGND_SetLineO...
LL DMA2D Output Color Structure Definition.
void LL_DMA2D_LayerCfgStructInit(LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg)
Set each LL_DMA2D_LayerCfgTypeDef field to default value.
__STATIC_INLINE void LL_DMA2D_SetLineOffsetMode(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffsetMode)
Set DMA2D line offset mode. CR LOM LL_DMA2D_SetLineOffsetMode.
__STATIC_INLINE void LL_DMA2D_BGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode)
Set DMA2D background CLUT color mode. BGPFCCR CCM LL_DMA2D_BGND_SetCLUTColorMode.
__STATIC_INLINE uint32_t LL_DMA2D_GetDeadTime(DMA2D_TypeDef *DMA2Dx)
Return DMA2D dead time, expressed on 8 bits ([7:0] bits). AMTCR DT LL_DMA2D_GetDeadTime.
__STATIC_INLINE void LL_DMA2D_ClearFlag_CE(DMA2D_TypeDef *DMA2Dx)
Clear DMA2D Configuration Error Interrupt Flag IFCR CCEIF LL_DMA2D_ClearFlag_CE. ...
uint32_t NbrOfPixelsPerLines
uint32_t AlphaInversionMode
__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CE(DMA2D_TypeDef *DMA2Dx)
Check if the DMA2D Configuration Error Interrupt Flag is set or not ISR CEIF LL_DMA2D_IsActiveFlag_C...
__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx)
Get DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits). FGPFCCR CS LL_DMA2D_FGND_GetCLUTSi...
__STATIC_INLINE void LL_DMA2D_Resume(DMA2D_TypeDef *DMA2Dx)
Resume DMA2D transfer.
__STATIC_INLINE void LL_DMA2D_FGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress)
Set DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits). FGCMAR MA LL_DMA2D_FGN...
__STATIC_INLINE uint32_t LL_DMA2D_GetOutputColorMode(DMA2D_TypeDef *DMA2Dx)
Return DMA2D output color mode. OPFCCR CM LL_DMA2D_GetOutputColorMode.
__STATIC_INLINE void LL_DMA2D_SetMode(DMA2D_TypeDef *DMA2Dx, uint32_t Mode)
Set DMA2D mode. CR MODE LL_DMA2D_SetMode.
uint32_t LL_DMA2D_GetOutputBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
Return DMA2D output Blue color.
__STATIC_INLINE void LL_DMA2D_FGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize)
Set DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits). FGPFCCR CS LL_DMA2D_FGND_SetCLUTSi...
__STATIC_INLINE void LL_DMA2D_FGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
Set DMA2D foreground color mode. FGPFCCR CM LL_DMA2D_FGND_SetColorMode.
__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRBSwapMode(DMA2D_TypeDef *DMA2Dx)
Return DMA2D foreground Red Blue swap mode. FGPFCCR RBS LL_DMA2D_FGND_GetRBSwapMode.
__STATIC_INLINE void LL_DMA2D_FGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode)
Set DMA2D foreground CLUT color mode. FGPFCCR CCM LL_DMA2D_FGND_SetCLUTColorMode.
__STATIC_INLINE void LL_DMA2D_BGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress)
Set DMA2D background memory address, expressed on 32 bits ([31:0] bits). BGMAR MA LL_DMA2D_BGND_SetM...
__STATIC_INLINE void LL_DMA2D_SetOutputAlphaInvMode(DMA2D_TypeDef *DMA2Dx, uint32_t AlphaInversionMode)
Set DMA2D output alpha inversion mode. OPFCCR AI LL_DMA2D_SetOutputAlphaInvMode. ...
__STATIC_INLINE void LL_DMA2D_ClearFlag_CTC(DMA2D_TypeDef *DMA2Dx)
Clear DMA2D CLUT Transfer Complete Interrupt Flag IFCR CCTCIF LL_DMA2D_ClearFlag_CTC.
__STATIC_INLINE void LL_DMA2D_DisableIT_TW(DMA2D_TypeDef *DMA2Dx)
Disable Transfer Watermark Interrupt CR TWIE LL_DMA2D_DisableIT_TW.
__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx)
Get DMA2D foreground memory address, expressed on 32 bits ([31:0] bits). FGMAR MA LL_DMA2D_FGND_GetM...
__STATIC_INLINE void LL_DMA2D_BGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue)
Set DMA2D background blue color value, expressed on 8 bits ([7:0] bits). BGCOLR BLUE LL_DMA2D_BGND_S...
uint32_t LL_DMA2D_GetOutputGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
Return DMA2D output Green color.
__STATIC_INLINE void LL_DMA2D_SetNbrOfLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines)
Set DMA2D number of lines, expressed on 16 bits ([15:0] bits). NLR NL LL_DMA2D_SetNbrOfLines.