21 #ifndef __STM32L4xx_LL_GPIO_H 22 #define __STM32L4xx_LL_GPIO_H 29 #include "stm32l4xx.h" 35 #if defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) || defined (GPIOG) || defined (GPIOH) || defined (GPIOI) 53 #if defined(USE_FULL_LL_DRIVER) 64 #if defined(USE_FULL_LL_DRIVER) 116 #define LL_GPIO_PIN_0 GPIO_BSRR_BS0 117 #define LL_GPIO_PIN_1 GPIO_BSRR_BS1 118 #define LL_GPIO_PIN_2 GPIO_BSRR_BS2 119 #define LL_GPIO_PIN_3 GPIO_BSRR_BS3 120 #define LL_GPIO_PIN_4 GPIO_BSRR_BS4 121 #define LL_GPIO_PIN_5 GPIO_BSRR_BS5 122 #define LL_GPIO_PIN_6 GPIO_BSRR_BS6 123 #define LL_GPIO_PIN_7 GPIO_BSRR_BS7 124 #define LL_GPIO_PIN_8 GPIO_BSRR_BS8 125 #define LL_GPIO_PIN_9 GPIO_BSRR_BS9 126 #define LL_GPIO_PIN_10 GPIO_BSRR_BS10 127 #define LL_GPIO_PIN_11 GPIO_BSRR_BS11 128 #define LL_GPIO_PIN_12 GPIO_BSRR_BS12 129 #define LL_GPIO_PIN_13 GPIO_BSRR_BS13 130 #define LL_GPIO_PIN_14 GPIO_BSRR_BS14 131 #define LL_GPIO_PIN_15 GPIO_BSRR_BS15 132 #define LL_GPIO_PIN_ALL (GPIO_BSRR_BS0 | GPIO_BSRR_BS1 | GPIO_BSRR_BS2 | \ 133 GPIO_BSRR_BS3 | GPIO_BSRR_BS4 | GPIO_BSRR_BS5 | \ 134 GPIO_BSRR_BS6 | GPIO_BSRR_BS7 | GPIO_BSRR_BS8 | \ 135 GPIO_BSRR_BS9 | GPIO_BSRR_BS10 | GPIO_BSRR_BS11 | \ 136 GPIO_BSRR_BS12 | GPIO_BSRR_BS13 | GPIO_BSRR_BS14 | \ 145 #define LL_GPIO_MODE_INPUT (0x00000000U) 146 #define LL_GPIO_MODE_OUTPUT GPIO_MODER_MODE0_0 147 #define LL_GPIO_MODE_ALTERNATE GPIO_MODER_MODE0_1 148 #define LL_GPIO_MODE_ANALOG GPIO_MODER_MODE0 156 #define LL_GPIO_OUTPUT_PUSHPULL (0x00000000U) 157 #define LL_GPIO_OUTPUT_OPENDRAIN GPIO_OTYPER_OT0 165 #define LL_GPIO_SPEED_FREQ_LOW (0x00000000U) 166 #define LL_GPIO_SPEED_FREQ_MEDIUM GPIO_OSPEEDR_OSPEED0_0 167 #define LL_GPIO_SPEED_FREQ_HIGH GPIO_OSPEEDR_OSPEED0_1 168 #define LL_GPIO_SPEED_FREQ_VERY_HIGH GPIO_OSPEEDR_OSPEED0 172 #define LL_GPIO_SPEED_LOW LL_GPIO_SPEED_FREQ_LOW 173 #define LL_GPIO_SPEED_MEDIUM LL_GPIO_SPEED_FREQ_MEDIUM 174 #define LL_GPIO_SPEED_FAST LL_GPIO_SPEED_FREQ_HIGH 175 #define LL_GPIO_SPEED_HIGH LL_GPIO_SPEED_FREQ_VERY_HIGH 180 #define LL_GPIO_PULL_NO (0x00000000U) 181 #define LL_GPIO_PULL_UP GPIO_PUPDR_PUPD0_0 182 #define LL_GPIO_PULL_DOWN GPIO_PUPDR_PUPD0_1 190 #define LL_GPIO_AF_0 (0x0000000U) 191 #define LL_GPIO_AF_1 (0x0000001U) 192 #define LL_GPIO_AF_2 (0x0000002U) 193 #define LL_GPIO_AF_3 (0x0000003U) 194 #define LL_GPIO_AF_4 (0x0000004U) 195 #define LL_GPIO_AF_5 (0x0000005U) 196 #define LL_GPIO_AF_6 (0x0000006U) 197 #define LL_GPIO_AF_7 (0x0000007U) 198 #define LL_GPIO_AF_8 (0x0000008U) 199 #define LL_GPIO_AF_9 (0x0000009U) 200 #define LL_GPIO_AF_10 (0x000000AU) 201 #define LL_GPIO_AF_11 (0x000000BU) 202 #define LL_GPIO_AF_12 (0x000000CU) 203 #define LL_GPIO_AF_13 (0x000000DU) 204 #define LL_GPIO_AF_14 (0x000000EU) 205 #define LL_GPIO_AF_15 (0x000000FU) 230 #define LL_GPIO_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) 238 #define LL_GPIO_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) 288 MODIFY_REG(GPIOx->MODER, (GPIO_MODER_MODE0 << (POSITION_VAL(Pin) * 2U)), (Mode << (POSITION_VAL(Pin) * 2U)));
322 return (uint32_t)(READ_BIT(GPIOx->MODER,
323 (GPIO_MODER_MODE0 << (POSITION_VAL(Pin) * 2U))) >> (POSITION_VAL(Pin) * 2U));
357 MODIFY_REG(GPIOx->OTYPER, PinMask, (PinMask * OutputType));
391 return (uint32_t)(READ_BIT(GPIOx->OTYPER, Pin) >> POSITION_VAL(Pin));
428 MODIFY_REG(GPIOx->OSPEEDR, (GPIO_OSPEEDR_OSPEED0 << (POSITION_VAL(Pin) * 2U)),
429 (Speed << (POSITION_VAL(Pin) * 2U)));
465 return (uint32_t)(READ_BIT(GPIOx->OSPEEDR,
466 (GPIO_OSPEEDR_OSPEED0 << (POSITION_VAL(Pin) * 2U))) >> (POSITION_VAL(Pin) * 2U));
499 MODIFY_REG(GPIOx->PUPDR, (GPIO_PUPDR_PUPD0 << (POSITION_VAL(Pin) * 2U)), (Pull << (POSITION_VAL(Pin) * 2U)));
531 return (uint32_t)(READ_BIT(GPIOx->PUPDR,
532 (GPIO_PUPDR_PUPD0 << (POSITION_VAL(Pin) * 2U))) >> (POSITION_VAL(Pin) * 2U));
571 MODIFY_REG(GPIOx->AFR[0], (GPIO_AFRL_AFSEL0 << (POSITION_VAL(Pin) * 4U)),
572 (Alternate << (POSITION_VAL(Pin) * 4U)));
608 return (uint32_t)(READ_BIT(GPIOx->AFR[0],
609 (GPIO_AFRL_AFSEL0 << (POSITION_VAL(Pin) * 4U))) >> (POSITION_VAL(Pin) * 4U));
648 MODIFY_REG(GPIOx->AFR[1], (GPIO_AFRH_AFSEL8 << (POSITION_VAL(Pin >> 8U) * 4U)),
649 (Alternate << (POSITION_VAL(Pin >> 8U) * 4U)));
686 return (uint32_t)(READ_BIT(GPIOx->AFR[1],
687 (GPIO_AFRH_AFSEL8 << (POSITION_VAL(Pin >> 8U) * 4U))) >> (POSITION_VAL(Pin >> 8U) * 4U));
690 #if defined(GPIO_ASCR_ASC0) 720 SET_BIT(GPIOx->ASCR, PinMask);
785 WRITE_REG(GPIOx->LCKR, GPIO_LCKR_LCKK | PinMask);
786 WRITE_REG(GPIOx->LCKR, PinMask);
787 WRITE_REG(GPIOx->LCKR, GPIO_LCKR_LCKK | PinMask);
789 temp = READ_REG(GPIOx->LCKR);
819 return ((READ_BIT(GPIOx->LCKR, PinMask) == (PinMask)) ? 1UL : 0UL);
830 return ((READ_BIT(GPIOx->LCKR, GPIO_LCKR_LCKK) == (GPIO_LCKR_LCKK)) ? 1UL : 0UL);
849 return (uint32_t)(READ_REG(GPIOx->IDR));
878 return ((READ_BIT(GPIOx->IDR, PinMask) == (PinMask)) ? 1UL : 0UL);
890 WRITE_REG(GPIOx->ODR, PortValue);
901 return (uint32_t)(READ_REG(GPIOx->ODR));
930 return ((READ_BIT(GPIOx->ODR, PinMask) == (PinMask)) ? 1UL : 0UL);
959 WRITE_REG(GPIOx->BSRR, PinMask);
988 WRITE_REG(GPIOx->BRR, PinMask);
1017 WRITE_REG(GPIOx->ODR, READ_REG(GPIOx->ODR) ^ PinMask);
1024 #if defined(USE_FULL_LL_DRIVER) ErrorStatus LL_GPIO_DeInit(GPIO_TypeDef *GPIOx)
De-initialize GPIO registers (Registers restored to their default values).
__STATIC_INLINE void LL_GPIO_LockPin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
Lock configuration of several pins for a dedicated port.
LL GPIO Init Structure definition.
__STATIC_INLINE uint32_t LL_GPIO_IsInputPinSet(GPIO_TypeDef *GPIOx, uint32_t PinMask)
Return if input data level for several pins of dedicated port is high or low. IDR IDy LL_GPIO_IsInpu...
__STATIC_INLINE uint32_t LL_GPIO_GetPinPull(GPIO_TypeDef *GPIOx, uint32_t Pin)
Return gpio pull-up or pull-down for a dedicated pin on a dedicated port.
__STATIC_INLINE void LL_GPIO_SetPinOutputType(GPIO_TypeDef *GPIOx, uint32_t PinMask, uint32_t OutputType)
Configure gpio output type for several pins on dedicated port.
__STATIC_INLINE void LL_GPIO_SetAFPin_0_7(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Alternate)
Configure gpio alternate function of a dedicated pin from 0 to 7 for a dedicated port.
__STATIC_INLINE void LL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
Toggle data value for several pin of dedicated port. ODR ODy LL_GPIO_TogglePin.
__STATIC_INLINE uint32_t LL_GPIO_GetPinSpeed(GPIO_TypeDef *GPIOx, uint32_t Pin)
Return gpio speed for a dedicated pin on dedicated port.
__STATIC_INLINE uint32_t LL_GPIO_IsOutputPinSet(GPIO_TypeDef *GPIOx, uint32_t PinMask)
Return if input data level for several pins of dedicated port is high or low. ODR ODy LL_GPIO_IsOutp...
__STATIC_INLINE uint32_t LL_GPIO_ReadInputPort(GPIO_TypeDef *GPIOx)
Return full input data register value for a dedicated port. IDR IDy LL_GPIO_ReadInputPort.
__STATIC_INLINE uint32_t LL_GPIO_GetPinOutputType(GPIO_TypeDef *GPIOx, uint32_t Pin)
Return gpio output type for several pins on dedicated port.
CLEAR_BIT(hrtc->Instance->CR, RTC_CR_WUTE)
__STATIC_INLINE uint32_t LL_GPIO_GetAFPin_8_15(GPIO_TypeDef *GPIOx, uint32_t Pin)
Return gpio alternate function of a dedicated pin from 8 to 15 for a dedicated port.
__STATIC_INLINE void LL_GPIO_SetPinSpeed(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Speed)
Configure gpio speed for a dedicated pin on dedicated port.
__STATIC_INLINE void LL_GPIO_SetPinPull(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Pull)
Configure gpio pull-up or pull-down for a dedicated pin on a dedicated port.
__STATIC_INLINE void LL_GPIO_SetAFPin_8_15(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Alternate)
Configure gpio alternate function of a dedicated pin from 8 to 15 for a dedicated port...
__STATIC_INLINE uint32_t LL_GPIO_GetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin)
Return gpio mode for a dedicated pin on dedicated port.
__STATIC_INLINE void LL_GPIO_SetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Mode)
Configure gpio mode for a dedicated pin on dedicated port.
__STATIC_INLINE void LL_GPIO_EnablePinAnalogControl(GPIO_TypeDef *GPIOx, uint32_t PinMask)
Connect analog switch to ADC input of several pins for a dedicated port.
__STATIC_INLINE void LL_GPIO_DisablePinAnalogControl(GPIO_TypeDef *GPIOx, uint32_t PinMask)
Disconnect analog switch to ADC input of several pins for a dedicated port. ASCR ASCy LL_GPIO_Disabl...
__STATIC_INLINE void LL_GPIO_SetOutputPin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
Set several pins to high level on dedicated gpio port. BSRR BSy LL_GPIO_SetOutputPin.
__STATIC_INLINE void LL_GPIO_ResetOutputPin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
Set several pins to low level on dedicated gpio port. BRR BRy LL_GPIO_ResetOutputPin.
__STATIC_INLINE uint32_t LL_GPIO_GetAFPin_0_7(GPIO_TypeDef *GPIOx, uint32_t Pin)
Return gpio alternate function of a dedicated pin from 0 to 7 for a dedicated port. AFRL AFSELy LL_GPIO_GetAFPin_0_7.
ErrorStatus LL_GPIO_Init(GPIO_TypeDef *GPIOx, LL_GPIO_InitTypeDef *GPIO_InitStruct)
Initialize GPIO registers according to the specified parameters in GPIO_InitStruct.
__STATIC_INLINE void LL_GPIO_WriteOutputPort(GPIO_TypeDef *GPIOx, uint32_t PortValue)
Write output data register for the port. ODR ODy LL_GPIO_WriteOutputPort.
MODIFY_REG(hrtc->Instance->CR, RTC_CR_WUCKSEL,(uint32_t) WakeUpClock)
__STATIC_INLINE uint32_t LL_GPIO_IsAnyPinLocked(GPIO_TypeDef *GPIOx)
Return 1 if one of the pin of a dedicated port is locked. else return 0. LCKR LCKK LL_GPIO_IsAnyPinL...
__STATIC_INLINE uint32_t LL_GPIO_ReadOutputPort(GPIO_TypeDef *GPIOx)
Return full output data register value for a dedicated port. ODR ODy LL_GPIO_ReadOutputPort.
void LL_GPIO_StructInit(LL_GPIO_InitTypeDef *GPIO_InitStruct)
Set each LL_GPIO_InitTypeDef field to default value.
__STATIC_INLINE uint32_t LL_GPIO_IsPinLocked(GPIO_TypeDef *GPIOx, uint32_t PinMask)
Return 1 if all pins passed as parameter, of a dedicated port, are locked. else Return 0...