21 #ifndef STM32L4xx_LL_LPUART_H 22 #define STM32L4xx_LL_LPUART_H 29 #include "stm32l4xx.h" 43 #if defined(USART_PRESC_PRESCALER) 73 #define LPUART_LPUARTDIV_FREQ_MUL 256U 74 #define LPUART_BRR_MASK 0x000FFFFFU 75 #define LPUART_BRR_MIN_VALUE 0x00000300U 82 #if defined(USE_FULL_LL_DRIVER) 92 #if defined(USE_FULL_LL_DRIVER) 102 #if defined(USART_PRESC_PRESCALER) 154 #define LL_LPUART_ICR_PECF USART_ICR_PECF 155 #define LL_LPUART_ICR_FECF USART_ICR_FECF 156 #define LL_LPUART_ICR_NCF USART_ICR_NECF 157 #define LL_LPUART_ICR_ORECF USART_ICR_ORECF 158 #define LL_LPUART_ICR_IDLECF USART_ICR_IDLECF 159 #if defined(USART_CR1_FIFOEN) 160 #define LL_LPUART_ICR_TXFECF USART_ICR_TXFECF 162 #define LL_LPUART_ICR_TCCF USART_ICR_TCCF 163 #define LL_LPUART_ICR_CTSCF USART_ICR_CTSCF 164 #define LL_LPUART_ICR_CMCF USART_ICR_CMCF 165 #define LL_LPUART_ICR_WUCF USART_ICR_WUCF 174 #define LL_LPUART_ISR_PE USART_ISR_PE 175 #define LL_LPUART_ISR_FE USART_ISR_FE 176 #define LL_LPUART_ISR_NE USART_ISR_NE 177 #define LL_LPUART_ISR_ORE USART_ISR_ORE 178 #define LL_LPUART_ISR_IDLE USART_ISR_IDLE 179 #if defined(USART_CR1_FIFOEN) 180 #define LL_LPUART_ISR_RXNE_RXFNE USART_ISR_RXNE_RXFNE 182 #define LL_LPUART_ISR_RXNE USART_ISR_RXNE 184 #define LL_LPUART_ISR_TC USART_ISR_TC 185 #if defined(USART_CR1_FIFOEN) 186 #define LL_LPUART_ISR_TXE_TXFNF USART_ISR_TXE_TXFNF 188 #define LL_LPUART_ISR_TXE USART_ISR_TXE 190 #define LL_LPUART_ISR_CTSIF USART_ISR_CTSIF 191 #define LL_LPUART_ISR_CTS USART_ISR_CTS 192 #define LL_LPUART_ISR_BUSY USART_ISR_BUSY 193 #define LL_LPUART_ISR_CMF USART_ISR_CMF 194 #define LL_LPUART_ISR_SBKF USART_ISR_SBKF 195 #define LL_LPUART_ISR_RWU USART_ISR_RWU 196 #define LL_LPUART_ISR_WUF USART_ISR_WUF 197 #define LL_LPUART_ISR_TEACK USART_ISR_TEACK 198 #define LL_LPUART_ISR_REACK USART_ISR_REACK 199 #if defined(USART_CR1_FIFOEN) 200 #define LL_LPUART_ISR_TXFE USART_ISR_TXFE 201 #define LL_LPUART_ISR_RXFF USART_ISR_RXFF 202 #define LL_LPUART_ISR_RXFT USART_ISR_RXFT 203 #define LL_LPUART_ISR_TXFT USART_ISR_TXFT 213 #define LL_LPUART_CR1_IDLEIE USART_CR1_IDLEIE 214 #if defined(USART_CR1_FIFOEN) 215 #define LL_LPUART_CR1_RXNEIE_RXFNEIE USART_CR1_RXNEIE_RXFNEIE 217 #define LL_LPUART_CR1_RXNEIE USART_CR1_RXNEIE 219 #define LL_LPUART_CR1_TCIE USART_CR1_TCIE 220 #if defined(USART_CR1_FIFOEN) 221 #define LL_LPUART_CR1_TXEIE_TXFNFIE USART_CR1_TXEIE_TXFNFIE 223 #define LL_LPUART_CR1_TXEIE USART_CR1_TXEIE 225 #define LL_LPUART_CR1_PEIE USART_CR1_PEIE 226 #define LL_LPUART_CR1_CMIE USART_CR1_CMIE 227 #if defined(USART_CR1_FIFOEN) 228 #define LL_LPUART_CR1_TXFEIE USART_CR1_TXFEIE 229 #define LL_LPUART_CR1_RXFFIE USART_CR1_RXFFIE 231 #define LL_LPUART_CR3_EIE USART_CR3_EIE 232 #define LL_LPUART_CR3_CTSIE USART_CR3_CTSIE 233 #define LL_LPUART_CR3_WUFIE USART_CR3_WUFIE 234 #if defined(USART_CR1_FIFOEN) 235 #define LL_LPUART_CR3_TXFTIE USART_CR3_TXFTIE 236 #define LL_LPUART_CR3_RXFTIE USART_CR3_RXFTIE 241 #if defined(USART_CR1_FIFOEN) 246 #define LL_LPUART_FIFOTHRESHOLD_1_8 0x00000000U 247 #define LL_LPUART_FIFOTHRESHOLD_1_4 0x00000001U 248 #define LL_LPUART_FIFOTHRESHOLD_1_2 0x00000002U 249 #define LL_LPUART_FIFOTHRESHOLD_3_4 0x00000003U 250 #define LL_LPUART_FIFOTHRESHOLD_7_8 0x00000004U 251 #define LL_LPUART_FIFOTHRESHOLD_8_8 0x00000005U 260 #define LL_LPUART_DIRECTION_NONE 0x00000000U 261 #define LL_LPUART_DIRECTION_RX USART_CR1_RE 262 #define LL_LPUART_DIRECTION_TX USART_CR1_TE 263 #define LL_LPUART_DIRECTION_TX_RX (USART_CR1_TE |USART_CR1_RE) 271 #define LL_LPUART_PARITY_NONE 0x00000000U 272 #define LL_LPUART_PARITY_EVEN USART_CR1_PCE 273 #define LL_LPUART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) 281 #define LL_LPUART_WAKEUP_IDLELINE 0x00000000U 282 #define LL_LPUART_WAKEUP_ADDRESSMARK USART_CR1_WAKE 290 #define LL_LPUART_DATAWIDTH_7B USART_CR1_M1 291 #define LL_LPUART_DATAWIDTH_8B 0x00000000U 292 #define LL_LPUART_DATAWIDTH_9B USART_CR1_M0 296 #if defined(USART_PRESC_PRESCALER) 301 #define LL_LPUART_PRESCALER_DIV1 0x00000000U 302 #define LL_LPUART_PRESCALER_DIV2 (USART_PRESC_PRESCALER_0) 303 #define LL_LPUART_PRESCALER_DIV4 (USART_PRESC_PRESCALER_1) 304 #define LL_LPUART_PRESCALER_DIV6 (USART_PRESC_PRESCALER_1 | USART_PRESC_PRESCALER_0) 305 #define LL_LPUART_PRESCALER_DIV8 (USART_PRESC_PRESCALER_2) 306 #define LL_LPUART_PRESCALER_DIV10 (USART_PRESC_PRESCALER_2 | USART_PRESC_PRESCALER_0) 307 #define LL_LPUART_PRESCALER_DIV12 (USART_PRESC_PRESCALER_2 | USART_PRESC_PRESCALER_1) 308 #define LL_LPUART_PRESCALER_DIV16 (USART_PRESC_PRESCALER_2 | USART_PRESC_PRESCALER_1 | USART_PRESC_PRESCALER_0) 309 #define LL_LPUART_PRESCALER_DIV32 (USART_PRESC_PRESCALER_3) 310 #define LL_LPUART_PRESCALER_DIV64 (USART_PRESC_PRESCALER_3 | USART_PRESC_PRESCALER_0) 311 #define LL_LPUART_PRESCALER_DIV128 (USART_PRESC_PRESCALER_3 | USART_PRESC_PRESCALER_1) 312 #define LL_LPUART_PRESCALER_DIV256 (USART_PRESC_PRESCALER_3 | USART_PRESC_PRESCALER_1 | USART_PRESC_PRESCALER_0) 321 #define LL_LPUART_STOPBITS_1 0x00000000U 322 #define LL_LPUART_STOPBITS_2 USART_CR2_STOP_1 330 #define LL_LPUART_TXRX_STANDARD 0x00000000U 331 #define LL_LPUART_TXRX_SWAPPED (USART_CR2_SWAP) 339 #define LL_LPUART_RXPIN_LEVEL_STANDARD 0x00000000U 340 #define LL_LPUART_RXPIN_LEVEL_INVERTED (USART_CR2_RXINV) 348 #define LL_LPUART_TXPIN_LEVEL_STANDARD 0x00000000U 349 #define LL_LPUART_TXPIN_LEVEL_INVERTED (USART_CR2_TXINV) 357 #define LL_LPUART_BINARY_LOGIC_POSITIVE 0x00000000U 358 #define LL_LPUART_BINARY_LOGIC_NEGATIVE USART_CR2_DATAINV 366 #define LL_LPUART_BITORDER_LSBFIRST 0x00000000U 367 #define LL_LPUART_BITORDER_MSBFIRST USART_CR2_MSBFIRST 375 #define LL_LPUART_ADDRESS_DETECT_4B 0x00000000U 376 #define LL_LPUART_ADDRESS_DETECT_7B USART_CR2_ADDM7 384 #define LL_LPUART_HWCONTROL_NONE 0x00000000U 385 #define LL_LPUART_HWCONTROL_RTS USART_CR3_RTSE 386 #define LL_LPUART_HWCONTROL_CTS USART_CR3_CTSE 387 #define LL_LPUART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) 395 #define LL_LPUART_WAKEUP_ON_ADDRESS 0x00000000U 396 #define LL_LPUART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 397 #define LL_LPUART_WAKEUP_ON_RXNE (USART_CR3_WUS_0 | USART_CR3_WUS_1) 405 #define LL_LPUART_DE_POLARITY_HIGH 0x00000000U 406 #define LL_LPUART_DE_POLARITY_LOW USART_CR3_DEP 414 #define LL_LPUART_DMA_REG_DATA_TRANSMIT 0x00000000U 415 #define LL_LPUART_DMA_REG_DATA_RECEIVE 0x00000001U 440 #define LL_LPUART_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) 448 #define LL_LPUART_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) 479 #if defined(USART_PRESC_PRESCALER) 480 #define __LL_LPUART_DIV(__PERIPHCLK__, __PRESCALER__, __BAUDRATE__) (uint32_t)((((((uint64_t)(__PERIPHCLK__)/(uint64_t)(LPUART_PRESCALER_TAB[(uint16_t)(__PRESCALER__)])) * LPUART_LPUARTDIV_FREQ_MUL)\ 481 + (uint32_t)((__BAUDRATE__)/2U))/(__BAUDRATE__)) & LPUART_BRR_MASK) 483 #define __LL_LPUART_DIV(__PERIPHCLK__, __BAUDRATE__) (uint32_t)(((((uint64_t)(__PERIPHCLK__)*LPUART_LPUARTDIV_FREQ_MUL) + (uint32_t)((__BAUDRATE__)/2U))/(__BAUDRATE__))\ 512 SET_BIT(LPUARTx->CR1, USART_CR1_UE);
542 return ((READ_BIT(LPUARTx->CR1, USART_CR1_UE) == (USART_CR1_UE)) ? 1UL : 0UL);
545 #if defined(USART_CR1_FIFOEN) 554 SET_BIT(LPUARTx->CR1, USART_CR1_FIFOEN);
565 CLEAR_BIT(LPUARTx->CR1, USART_CR1_FIFOEN);
576 return ((READ_BIT(LPUARTx->CR1, USART_CR1_FIFOEN) == (USART_CR1_FIFOEN)) ? 1UL : 0UL);
594 MODIFY_REG(LPUARTx->CR3, USART_CR3_TXFTCFG, Threshold << USART_CR3_TXFTCFG_Pos);
611 return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos);
629 MODIFY_REG(LPUARTx->CR3, USART_CR3_RXFTCFG, Threshold << USART_CR3_RXFTCFG_Pos);
646 return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos);
672 MODIFY_REG(LPUARTx->CR3, USART_CR3_TXFTCFG | USART_CR3_RXFTCFG, (TXThreshold << USART_CR3_TXFTCFG_Pos) | (RXThreshold << USART_CR3_RXFTCFG_Pos));
686 SET_BIT(LPUARTx->CR1, USART_CR1_UESM);
710 return ((READ_BIT(LPUARTx->CR1, USART_CR1_UESM) == (USART_CR1_UESM)) ? 1UL : 0UL);
713 #if defined(USART_CR3_UCESM) 723 SET_BIT(LPUARTx->CR3, USART_CR3_UCESM);
735 CLEAR_BIT(LPUARTx->CR3, USART_CR3_UCESM);
746 return ((READ_BIT(LPUARTx->CR3, USART_CR3_UCESM) == (USART_CR3_UCESM)) ? 1UL : 0UL);
758 SET_BIT(LPUARTx->CR1, USART_CR1_RE);
780 SET_BIT(LPUARTx->CR1, USART_CR1_TE);
809 MODIFY_REG(LPUARTx->CR1, USART_CR1_RE | USART_CR1_TE, TransferDirection);
825 return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_RE | USART_CR1_TE));
844 MODIFY_REG(LPUARTx->CR1, USART_CR1_PS | USART_CR1_PCE, Parity);
859 return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_PS | USART_CR1_PCE));
873 MODIFY_REG(LPUARTx->CR1, USART_CR1_WAKE, Method);
886 return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_WAKE));
901 MODIFY_REG(LPUARTx->CR1, USART_CR1_M, DataWidth);
915 return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_M));
926 SET_BIT(LPUARTx->CR1, USART_CR1_MME);
948 return ((READ_BIT(LPUARTx->CR1, USART_CR1_MME) == (USART_CR1_MME)) ? 1UL : 0UL);
951 #if defined(USART_PRESC_PRESCALER) 973 MODIFY_REG(LPUARTx->PRESC, USART_PRESC_PRESCALER, (uint16_t)PrescalerValue);
996 return (uint32_t)(READ_BIT(LPUARTx->PRESC, USART_PRESC_PRESCALER));
1011 MODIFY_REG(LPUARTx->CR2, USART_CR2_STOP, StopBits);
1024 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_STOP));
1054 MODIFY_REG(LPUARTx->CR1, USART_CR1_PS | USART_CR1_PCE | USART_CR1_M, Parity | DataWidth);
1055 MODIFY_REG(LPUARTx->CR2, USART_CR2_STOP, StopBits);
1069 MODIFY_REG(LPUARTx->CR2, USART_CR2_SWAP, SwapConfig);
1082 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_SWAP));
1096 MODIFY_REG(LPUARTx->CR2, USART_CR2_RXINV, PinInvMethod);
1109 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_RXINV));
1123 MODIFY_REG(LPUARTx->CR2, USART_CR2_TXINV, PinInvMethod);
1136 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_TXINV));
1153 MODIFY_REG(LPUARTx->CR2, USART_CR2_DATAINV, DataLogic);
1166 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_DATAINV));
1182 MODIFY_REG(LPUARTx->CR2, USART_CR2_MSBFIRST, BitOrder);
1197 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_MSBFIRST));
1225 MODIFY_REG(LPUARTx->CR2, USART_CR2_ADD | USART_CR2_ADDM7,
1226 (uint32_t)(AddressLen | (NodeAddress << USART_CR2_ADD_Pos)));
1241 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_ADD) >> USART_CR2_ADD_Pos);
1254 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_ADDM7));
1265 SET_BIT(LPUARTx->CR3, USART_CR3_RTSE);
1276 CLEAR_BIT(LPUARTx->CR3, USART_CR3_RTSE);
1287 SET_BIT(LPUARTx->CR3, USART_CR3_CTSE);
1298 CLEAR_BIT(LPUARTx->CR3, USART_CR3_CTSE);
1315 MODIFY_REG(LPUARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl);
1331 return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE));
1342 CLEAR_BIT(LPUARTx->CR3, USART_CR3_OVRDIS);
1353 SET_BIT(LPUARTx->CR3, USART_CR3_OVRDIS);
1364 return ((READ_BIT(LPUARTx->CR3, USART_CR3_OVRDIS) != USART_CR3_OVRDIS) ? 1UL : 0UL);
1379 MODIFY_REG(LPUARTx->CR3, USART_CR3_WUS, Type);
1393 return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_WUS));
1427 #if defined(USART_PRESC_PRESCALER) 1434 #if defined(USART_PRESC_PRESCALER) 1435 LPUARTx->BRR = __LL_LPUART_DIV(PeriphClk, PrescalerValue, BaudRate);
1437 LPUARTx->BRR = __LL_LPUART_DIV(PeriphClk, BaudRate);
1465 #if defined(USART_PRESC_PRESCALER) 1466 __STATIC_INLINE uint32_t
LL_LPUART_GetBaudRate(USART_TypeDef *LPUARTx, uint32_t PeriphClk, uint32_t PrescalerValue)
1473 #if defined(USART_PRESC_PRESCALER) 1474 register uint32_t
periphclkpresc = (uint32_t)(PeriphClk / (LPUART_PRESCALER_TAB[(uint16_t)PrescalerValue]));
1477 lpuartdiv = LPUARTx->BRR & LPUART_BRR_MASK;
1479 if (lpuartdiv >= LPUART_BRR_MIN_VALUE)
1481 #if defined(USART_PRESC_PRESCALER) 1484 brrresult = (uint32_t)(((uint64_t)(
PeriphClk) * LPUART_LPUARTDIV_FREQ_MUL) /
lpuartdiv);
1511 SET_BIT(LPUARTx->CR3, USART_CR3_HDSEL);
1522 CLEAR_BIT(LPUARTx->CR3, USART_CR3_HDSEL);
1533 return ((READ_BIT(LPUARTx->CR3, USART_CR3_HDSEL) == (USART_CR3_HDSEL)) ? 1UL : 0UL);
1553 MODIFY_REG(LPUARTx->CR1, USART_CR1_DEDT, Time << USART_CR1_DEDT_Pos);
1564 return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_DEDT) >> USART_CR1_DEDT_Pos);
1576 MODIFY_REG(LPUARTx->CR1, USART_CR1_DEAT, Time << USART_CR1_DEAT_Pos);
1587 return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_DEAT) >> USART_CR1_DEAT_Pos);
1598 SET_BIT(LPUARTx->CR3, USART_CR3_DEM);
1620 return ((READ_BIT(LPUARTx->CR3, USART_CR3_DEM) == (USART_CR3_DEM)) ? 1UL : 0UL);
1634 MODIFY_REG(LPUARTx->CR3, USART_CR3_DEP, Polarity);
1647 return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_DEP));
1666 return ((READ_BIT(LPUARTx->ISR, USART_ISR_PE) == (USART_ISR_PE)) ? 1UL : 0UL);
1677 return ((READ_BIT(LPUARTx->ISR, USART_ISR_FE) == (USART_ISR_FE)) ? 1UL : 0UL);
1688 return ((READ_BIT(LPUARTx->ISR, USART_ISR_NE) == (USART_ISR_NE)) ? 1UL : 0UL);
1699 return ((READ_BIT(LPUARTx->ISR, USART_ISR_ORE) == (USART_ISR_ORE)) ? 1UL : 0UL);
1710 return ((READ_BIT(LPUARTx->ISR, USART_ISR_IDLE) == (USART_ISR_IDLE)) ? 1UL : 0UL);
1713 #if defined(USART_CR1_FIFOEN) 1715 #define LL_LPUART_IsActiveFlag_RXNE LL_LPUART_IsActiveFlag_RXNE_RXFNE 1725 return ((READ_BIT(LPUARTx->ISR, USART_ISR_RXNE_RXFNE) == (USART_ISR_RXNE_RXFNE)) ? 1UL : 0UL);
1736 return ((READ_BIT(LPUARTx->ISR, USART_ISR_RXNE) == (USART_ISR_RXNE)) ? 1UL : 0UL);
1748 return ((READ_BIT(LPUARTx->ISR, USART_ISR_TC) == (USART_ISR_TC)) ? 1UL : 0UL);
1751 #if defined(USART_CR1_FIFOEN) 1753 #define LL_LPUART_IsActiveFlag_TXE LL_LPUART_IsActiveFlag_TXE_TXFNF 1763 return ((READ_BIT(LPUARTx->ISR, USART_ISR_TXE_TXFNF) == (USART_ISR_TXE_TXFNF)) ? 1UL : 0UL);
1774 return ((READ_BIT(LPUARTx->ISR, USART_ISR_TXE) == (USART_ISR_TXE)) ? 1UL : 0UL);
1786 return ((READ_BIT(LPUARTx->ISR, USART_ISR_CTSIF) == (USART_ISR_CTSIF)) ? 1UL : 0UL);
1797 return ((READ_BIT(LPUARTx->ISR, USART_ISR_CTS) == (USART_ISR_CTS)) ? 1UL : 0UL);
1808 return ((READ_BIT(LPUARTx->ISR, USART_ISR_BUSY) == (USART_ISR_BUSY)) ? 1UL : 0UL);
1819 return ((READ_BIT(LPUARTx->ISR, USART_ISR_CMF) == (USART_ISR_CMF)) ? 1UL : 0UL);
1830 return ((READ_BIT(LPUARTx->ISR, USART_ISR_SBKF) == (USART_ISR_SBKF)) ? 1UL : 0UL);
1841 return ((READ_BIT(LPUARTx->ISR, USART_ISR_RWU) == (USART_ISR_RWU)) ? 1UL : 0UL);
1852 return ((READ_BIT(LPUARTx->ISR, USART_ISR_WUF) == (USART_ISR_WUF)) ? 1UL : 0UL);
1863 return ((READ_BIT(LPUARTx->ISR, USART_ISR_TEACK) == (USART_ISR_TEACK)) ? 1UL : 0UL);
1874 return ((READ_BIT(LPUARTx->ISR, USART_ISR_REACK) == (USART_ISR_REACK)) ? 1UL : 0UL);
1877 #if defined(USART_CR1_FIFOEN) 1886 return ((READ_BIT(LPUARTx->ISR, USART_ISR_TXFE) == (USART_ISR_TXFE)) ? 1UL : 0UL);
1897 return ((READ_BIT(LPUARTx->ISR, USART_ISR_RXFF) == (USART_ISR_RXFF)) ? 1UL : 0UL);
1908 return ((READ_BIT(LPUARTx->ISR, USART_ISR_TXFT) == (USART_ISR_TXFT)) ? 1UL : 0UL);
1919 return ((READ_BIT(LPUARTx->ISR, USART_ISR_RXFT) == (USART_ISR_RXFT)) ? 1UL : 0UL);
1931 WRITE_REG(LPUARTx->ICR, USART_ICR_PECF);
1942 WRITE_REG(LPUARTx->ICR, USART_ICR_FECF);
1953 WRITE_REG(LPUARTx->ICR, USART_ICR_NECF);
1964 WRITE_REG(LPUARTx->ICR, USART_ICR_ORECF);
1975 WRITE_REG(LPUARTx->ICR, USART_ICR_IDLECF);
1978 #if defined(USART_CR1_FIFOEN) 1987 WRITE_REG(LPUARTx->ICR, USART_ICR_TXFECF);
1999 WRITE_REG(LPUARTx->ICR, USART_ICR_TCCF);
2010 WRITE_REG(LPUARTx->ICR, USART_ICR_CTSCF);
2021 WRITE_REG(LPUARTx->ICR, USART_ICR_CMCF);
2032 WRITE_REG(LPUARTx->ICR, USART_ICR_WUCF);
2051 SET_BIT(LPUARTx->CR1, USART_CR1_IDLEIE);
2054 #if defined(USART_CR1_FIFOEN) 2056 #define LL_LPUART_EnableIT_RXNE LL_LPUART_EnableIT_RXNE_RXFNE 2066 SET_BIT(LPUARTx->CR1, USART_CR1_RXNEIE_RXFNEIE);
2078 SET_BIT(LPUARTx->CR1, USART_CR1_RXNEIE);
2090 SET_BIT(LPUARTx->CR1, USART_CR1_TCIE);
2093 #if defined(USART_CR1_FIFOEN) 2095 #define LL_LPUART_EnableIT_TXE LL_LPUART_EnableIT_TXE_TXFNF 2105 SET_BIT(LPUARTx->CR1, USART_CR1_TXEIE_TXFNFIE);
2117 SET_BIT(LPUARTx->CR1, USART_CR1_TXEIE);
2129 SET_BIT(LPUARTx->CR1, USART_CR1_PEIE);
2140 SET_BIT(LPUARTx->CR1, USART_CR1_CMIE);
2143 #if defined(USART_CR1_FIFOEN) 2152 SET_BIT(LPUARTx->CR1, USART_CR1_TXFEIE);
2163 SET_BIT(LPUARTx->CR1, USART_CR1_RXFFIE);
2179 SET_BIT(LPUARTx->CR3, USART_CR3_EIE);
2190 SET_BIT(LPUARTx->CR3, USART_CR3_CTSIE);
2201 SET_BIT(LPUARTx->CR3, USART_CR3_WUFIE);
2204 #if defined(USART_CR1_FIFOEN) 2213 SET_BIT(LPUARTx->CR3, USART_CR3_TXFTIE);
2224 SET_BIT(LPUARTx->CR3, USART_CR3_RXFTIE);
2236 CLEAR_BIT(LPUARTx->CR1, USART_CR1_IDLEIE);
2239 #if defined(USART_CR1_FIFOEN) 2241 #define LL_LPUART_DisableIT_RXNE LL_LPUART_DisableIT_RXNE_RXFNE 2251 CLEAR_BIT(LPUARTx->CR1, USART_CR1_RXNEIE_RXFNEIE);
2263 CLEAR_BIT(LPUARTx->CR1, USART_CR1_RXNEIE);
2275 CLEAR_BIT(LPUARTx->CR1, USART_CR1_TCIE);
2278 #if defined(USART_CR1_FIFOEN) 2280 #define LL_LPUART_DisableIT_TXE LL_LPUART_DisableIT_TXE_TXFNF 2290 CLEAR_BIT(LPUARTx->CR1, USART_CR1_TXEIE_TXFNFIE);
2302 CLEAR_BIT(LPUARTx->CR1, USART_CR1_TXEIE);
2314 CLEAR_BIT(LPUARTx->CR1, USART_CR1_PEIE);
2325 CLEAR_BIT(LPUARTx->CR1, USART_CR1_CMIE);
2328 #if defined(USART_CR1_FIFOEN) 2337 CLEAR_BIT(LPUARTx->CR1, USART_CR1_TXFEIE);
2348 CLEAR_BIT(LPUARTx->CR1, USART_CR1_RXFFIE);
2375 CLEAR_BIT(LPUARTx->CR3, USART_CR3_CTSIE);
2386 CLEAR_BIT(LPUARTx->CR3, USART_CR3_WUFIE);
2389 #if defined(USART_CR1_FIFOEN) 2398 CLEAR_BIT(LPUARTx->CR3, USART_CR3_TXFTIE);
2409 CLEAR_BIT(LPUARTx->CR3, USART_CR3_RXFTIE);
2421 return ((READ_BIT(LPUARTx->CR1, USART_CR1_IDLEIE) == (USART_CR1_IDLEIE)) ? 1UL : 0UL);
2424 #if defined(USART_CR1_FIFOEN) 2426 #define LL_LPUART_IsEnabledIT_RXNE LL_LPUART_IsEnabledIT_RXNE_RXFNE 2436 return ((READ_BIT(LPUARTx->CR1, USART_CR1_RXNEIE_RXFNEIE) == (USART_CR1_RXNEIE_RXFNEIE)) ? 1UL : 0UL);
2448 return ((READ_BIT(LPUARTx->CR1, USART_CR1_RXNEIE) == (USART_CR1_RXNEIE)) ? 1UL : 0UL);
2460 return ((READ_BIT(LPUARTx->CR1, USART_CR1_TCIE) == (USART_CR1_TCIE)) ? 1UL : 0UL);
2463 #if defined(USART_CR1_FIFOEN) 2465 #define LL_LPUART_IsEnabledIT_TXE LL_LPUART_IsEnabledIT_TXE_TXFNF 2475 return ((READ_BIT(LPUARTx->CR1, USART_CR1_TXEIE_TXFNFIE) == (USART_CR1_TXEIE_TXFNFIE)) ? 1UL : 0UL);
2487 return ((READ_BIT(LPUARTx->CR1, USART_CR1_TXEIE) == (USART_CR1_TXEIE)) ? 1UL : 0UL);
2499 return ((READ_BIT(LPUARTx->CR1, USART_CR1_PEIE) == (USART_CR1_PEIE)) ? 1UL : 0UL);
2510 return ((READ_BIT(LPUARTx->CR1, USART_CR1_CMIE) == (USART_CR1_CMIE)) ? 1UL : 0UL);
2513 #if defined(USART_CR1_FIFOEN) 2522 return ((READ_BIT(LPUARTx->CR1, USART_CR1_TXFEIE) == (USART_CR1_TXFEIE)) ? 1UL : 0UL);
2533 return ((READ_BIT(LPUARTx->CR1, USART_CR1_RXFFIE) == (USART_CR1_RXFFIE)) ? 1UL : 0UL);
2545 return ((READ_BIT(LPUARTx->CR3, USART_CR3_EIE) == (USART_CR3_EIE)) ? 1UL : 0UL);
2556 return ((READ_BIT(LPUARTx->CR3, USART_CR3_CTSIE) == (USART_CR3_CTSIE)) ? 1UL : 0UL);
2567 return ((READ_BIT(LPUARTx->CR3, USART_CR3_WUFIE) == (USART_CR3_WUFIE)) ? 1UL : 0UL);
2570 #if defined(USART_CR1_FIFOEN) 2579 return ((READ_BIT(LPUARTx->CR3, USART_CR3_TXFTIE) == (USART_CR3_TXFTIE)) ? 1UL : 0UL);
2590 return ((READ_BIT(LPUARTx->CR3, USART_CR3_RXFTIE) == (USART_CR3_RXFTIE)) ? 1UL : 0UL);
2610 SET_BIT(LPUARTx->CR3, USART_CR3_DMAR);
2621 CLEAR_BIT(LPUARTx->CR3, USART_CR3_DMAR);
2632 return ((READ_BIT(LPUARTx->CR3, USART_CR3_DMAR) == (USART_CR3_DMAR)) ? 1UL : 0UL);
2643 SET_BIT(LPUARTx->CR3, USART_CR3_DMAT);
2654 CLEAR_BIT(LPUARTx->CR3, USART_CR3_DMAT);
2665 return ((READ_BIT(LPUARTx->CR3, USART_CR3_DMAT) == (USART_CR3_DMAT)) ? 1UL : 0UL);
2676 SET_BIT(LPUARTx->CR3, USART_CR3_DDRE);
2687 CLEAR_BIT(LPUARTx->CR3, USART_CR3_DDRE);
2698 return ((READ_BIT(LPUARTx->CR3, USART_CR3_DDRE) == (USART_CR3_DDRE)) ? 1UL : 0UL);
2713 register uint32_t data_reg_addr;
2715 if (Direction == LL_LPUART_DMA_REG_DATA_TRANSMIT)
2718 data_reg_addr = (uint32_t) &(LPUARTx->TDR);
2723 data_reg_addr = (uint32_t) &(LPUARTx->RDR);
2726 return data_reg_addr;
2745 return (uint8_t)(READ_BIT(LPUARTx->RDR, USART_RDR_RDR) & 0xFFU);
2756 return (uint16_t)(READ_BIT(LPUARTx->RDR, USART_RDR_RDR));
2768 LPUARTx->TDR = Value;
2780 LPUARTx->TDR = Value & 0x1FFUL;
2799 SET_BIT(LPUARTx->RQR, (uint16_t)USART_RQR_SBKRQ);
2810 SET_BIT(LPUARTx->RQR, (uint16_t)USART_RQR_MMRQ);
2827 SET_BIT(LPUARTx->RQR, (uint16_t)USART_RQR_RXFRQ);
2834 #if defined(USE_FULL_LL_DRIVER) __STATIC_INLINE uint32_t LL_LPUART_IsEnabledHalfDuplex(USART_TypeDef *LPUARTx)
Indicate if Single Wire Half-Duplex mode is enabled CR3 HDSEL LL_LPUART_IsEnabledHalfDuplex.
uint32_t TransferDirection
__STATIC_INLINE void LL_LPUART_EnableIT_TC(USART_TypeDef *LPUARTx)
Enable Transmission Complete Interrupt CR1 TCIE LL_LPUART_EnableIT_TC.
__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_PE(USART_TypeDef *LPUARTx)
Check if the LPUART Parity Error Flag is set or not ISR PE LL_LPUART_IsActiveFlag_PE.
__STATIC_INLINE void LL_LPUART_SetDataWidth(USART_TypeDef *LPUARTx, uint32_t DataWidth)
Set Word length (nb of data bits, excluding start and stop bits) CR1 M LL_LPUART_SetDataWidth.
__STATIC_INLINE void LL_LPUART_DisableIT_TC(USART_TypeDef *LPUARTx)
Disable Transmission Complete Interrupt CR1 TCIE LL_LPUART_DisableIT_TC.
__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_IDLE(USART_TypeDef *LPUARTx)
Check if the LPUART IDLE line detected Flag is set or not ISR IDLE LL_LPUART_IsActiveFlag_IDLE.
__STATIC_INLINE void LL_LPUART_DisableDMAReq_RX(USART_TypeDef *LPUARTx)
Disable DMA Mode for reception CR3 DMAR LL_LPUART_DisableDMAReq_RX.
__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_NE(USART_TypeDef *LPUARTx)
Check if the LPUART Noise error detected Flag is set or not ISR NE LL_LPUART_IsActiveFlag_NE.
__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TXFT(USART_TypeDef *LPUARTx)
Check if LPUART TX FIFO Threshold Interrupt is enabled or disabled CR3 TXFTIE LL_LPUART_IsEnabledIT_...
__STATIC_INLINE void LL_LPUART_DisableDirectionRx(USART_TypeDef *LPUARTx)
Receiver Disable CR1 RE LL_LPUART_DisableDirectionRx.
__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_BUSY(USART_TypeDef *LPUARTx)
Check if the LPUART Busy Flag is set or not ISR BUSY LL_LPUART_IsActiveFlag_BUSY.
__STATIC_INLINE void LL_LPUART_DisableIT_RXNE(USART_TypeDef *LPUARTx)
Disable RX Not Empty Interrupt CR1 RXNEIE LL_LPUART_DisableIT_RXNE.
__STATIC_INLINE void LL_LPUART_DisableIT_IDLE(USART_TypeDef *LPUARTx)
Disable IDLE Interrupt CR1 IDLEIE LL_LPUART_DisableIT_IDLE.
__STATIC_INLINE void LL_LPUART_ClearFlag_NE(USART_TypeDef *LPUARTx)
Clear Noise detected Flag ICR NECF LL_LPUART_ClearFlag_NE.
__STATIC_INLINE uint32_t LL_LPUART_GetHWFlowCtrl(USART_TypeDef *LPUARTx)
Return HW Flow Control configuration (both CTS and RTS) CR3 RTSE LL_LPUART_GetHWFlowCtrl CR3 CTSE L...
__STATIC_INLINE void LL_LPUART_SetHWFlowCtrl(USART_TypeDef *LPUARTx, uint32_t HardwareFlowControl)
Configure HW Flow Control mode (both CTS and RTS) CR3 RTSE LL_LPUART_SetHWFlowCtrl CR3 CTSE LL_LPUA...
__STATIC_INLINE void LL_LPUART_EnableHalfDuplex(USART_TypeDef *LPUARTx)
Enable Single Wire Half-Duplex mode CR3 HDSEL LL_LPUART_EnableHalfDuplex.
__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_RXFT(USART_TypeDef *LPUARTx)
Check if LPUART RX FIFO Threshold Interrupt is enabled or disabled CR3 RXFTIE LL_LPUART_IsEnabledIT_...
__STATIC_INLINE void LL_LPUART_DisableDirectionTx(USART_TypeDef *LPUARTx)
Transmitter Disable CR1 TE LL_LPUART_DisableDirectionTx.
__STATIC_INLINE void LL_LPUART_DisableDMADeactOnRxErr(USART_TypeDef *LPUARTx)
Disable DMA Disabling on Reception Error CR3 DDRE LL_LPUART_DisableDMADeactOnRxErr.
__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_CM(USART_TypeDef *LPUARTx)
Check if the LPUART Character Match Flag is set or not ISR CMF LL_LPUART_IsActiveFlag_CM.
__STATIC_INLINE void LL_LPUART_DisableIT_PE(USART_TypeDef *LPUARTx)
Disable Parity Error Interrupt CR1 PEIE LL_LPUART_DisableIT_PE.
__STATIC_INLINE void LL_LPUART_DisableIT_WKUP(USART_TypeDef *LPUARTx)
Disable Wake Up from Stop Mode Interrupt CR3 WUFIE LL_LPUART_DisableIT_WKUP.
__STATIC_INLINE void LL_LPUART_SetBaudRate(USART_TypeDef *LPUARTx, uint32_t PeriphClk, uint32_t PrescalerValue, uint32_t BaudRate) __STATIC_INLINE void LL_LPUART_SetBaudRate(USART_TypeDef *LPUARTx
Configure LPUART BRR register for achieving expected Baud Rate value.
__STATIC_INLINE void LL_LPUART_EnableIT_RXNE_RXFNE(USART_TypeDef *LPUARTx)
Enable RX Not Empty and RX FIFO Not Empty Interrupt CR1 RXNEIE_RXFNEIE LL_LPUART_EnableIT_RXNE_RXFNE...
__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TXE_TXFNF(USART_TypeDef *LPUARTx)
Check if the LPUART Transmit Data Register Empty or LPUART TX FIFO Not Full Flag is set or not ISR T...
__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RXFF(USART_TypeDef *LPUARTx)
Check if the LPUART RX FIFO Full Flag is set or not ISR RXFF LL_LPUART_IsActiveFlag_RXFF.
__STATIC_INLINE void LL_LPUART_ClearFlag_IDLE(USART_TypeDef *LPUARTx)
Clear IDLE line detected Flag ICR IDLECF LL_LPUART_ClearFlag_IDLE.
__STATIC_INLINE void LL_LPUART_DisableOverrunDetect(USART_TypeDef *LPUARTx)
Disable Overrun detection CR3 OVRDIS LL_LPUART_DisableOverrunDetect.
__STATIC_INLINE void LL_LPUART_SetWKUPType(USART_TypeDef *LPUARTx, uint32_t Type)
Select event type for Wake UP Interrupt Flag (WUS[1:0] bits) CR3 WUS LL_LPUART_SetWKUPType.
__STATIC_INLINE void LL_LPUART_ClearFlag_FE(USART_TypeDef *LPUARTx)
Clear Framing Error Flag ICR FECF LL_LPUART_ClearFlag_FE.
__STATIC_INLINE void LL_LPUART_ClearFlag_TXFE(USART_TypeDef *LPUARTx)
Clear TX FIFO Empty Flag ICR TXFECF LL_LPUART_ClearFlag_TXFE.
__STATIC_INLINE void LL_LPUART_SetBinaryDataLogic(USART_TypeDef *LPUARTx, uint32_t DataLogic)
Configure Binary data logic.
__STATIC_INLINE void LL_LPUART_SetDEAssertionTime(USART_TypeDef *LPUARTx, uint32_t Time)
Set DEAT (Driver Enable Assertion Time), Time value expressed on 5 bits ([4:0] bits). CR1 DEAT LL_LPUART_SetDEAssertionTime.
__STATIC_INLINE uint32_t LL_LPUART_GetWKUPType(USART_TypeDef *LPUARTx)
Return event type for Wake UP Interrupt Flag (WUS[1:0] bits) CR3 WUS LL_LPUART_GetWKUPType.
__STATIC_INLINE uint32_t LL_LPUART_GetTransferDirection(USART_TypeDef *LPUARTx)
Return enabled/disabled states of Transmitter and Receiver CR1 RE LL_LPUART_GetTransferDirection CR...
__STATIC_INLINE void LL_LPUART_EnableDirectionTx(USART_TypeDef *LPUARTx)
Transmitter Enable CR1 TE LL_LPUART_EnableDirectionTx.
__STATIC_INLINE uint32_t LL_LPUART_GetRXPinLevel(USART_TypeDef *LPUARTx)
Retrieve RX pin active level logic configuration CR2 RXINV LL_LPUART_GetRXPinLevel.
__STATIC_INLINE void uint32_t PeriphClk
__STATIC_INLINE uint32_t LL_LPUART_IsEnabledFIFO(USART_TypeDef *LPUARTx)
Indicate if FIFO Mode is enabled CR1 FIFOEN LL_LPUART_IsEnabledFIFO.
__STATIC_INLINE uint32_t LL_LPUART_IsEnabledDMAReq_RX(USART_TypeDef *LPUARTx)
Check if DMA Mode is enabled for reception CR3 DMAR LL_LPUART_IsEnabledDMAReq_RX.
__STATIC_INLINE void LL_LPUART_DisableIT_ERROR(USART_TypeDef *LPUARTx)
Disable Error Interrupt.
__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_RXNE(USART_TypeDef *LPUARTx)
Check if the LPUART RX Not Empty Interrupt is enabled or disabled. CR1 RXNEIE LL_LPUART_IsEnabledIT_...
__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TXE_TXFNF(USART_TypeDef *LPUARTx)
Check if the LPUART TX Empty and LPUART TX FIFO Not Full Interrupt is enabled or disabled CR1 TXEIE_...
__STATIC_INLINE void LL_LPUART_DisableRTSHWFlowCtrl(USART_TypeDef *LPUARTx)
Disable RTS HW Flow Control CR3 RTSE LL_LPUART_DisableRTSHWFlowCtrl.
__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_IDLE(USART_TypeDef *LPUARTx)
Check if the LPUART IDLE Interrupt source is enabled or disabled. CR1 IDLEIE LL_LPUART_IsEnabledIT_I...
__STATIC_INLINE void LL_LPUART_EnableClockInStopMode(USART_TypeDef *LPUARTx)
LPUART Clock enabled in STOP Mode.
__STATIC_INLINE void LL_LPUART_DisableIT_CM(USART_TypeDef *LPUARTx)
Disable Character Match Interrupt CR1 CMIE LL_LPUART_DisableIT_CM.
__STATIC_INLINE void LL_LPUART_EnableIT_TXFT(USART_TypeDef *LPUARTx)
Enable TX FIFO Threshold Interrupt CR3 TXFTIE LL_LPUART_EnableIT_TXFT.
__STATIC_INLINE void LL_LPUART_EnableIT_RXFF(USART_TypeDef *LPUARTx)
Enable RX FIFO Full Interrupt CR1 RXFFIE LL_LPUART_EnableIT_RXFF.
__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_PE(USART_TypeDef *LPUARTx)
Check if the LPUART Parity Error Interrupt is enabled or disabled. CR1 PEIE LL_LPUART_IsEnabledIT_PE...
static const uint16_t LPUART_PRESCALER_TAB[]
__STATIC_INLINE void LL_LPUART_SetRXFIFOThreshold(USART_TypeDef *LPUARTx, uint32_t Threshold)
Configure RX FIFO Threshold CR3 RXFTCFG LL_LPUART_SetRXFIFOThreshold.
__STATIC_INLINE void LL_LPUART_SetDESignalPolarity(USART_TypeDef *LPUARTx, uint32_t Polarity)
Select Driver Enable Polarity CR3 DEP LL_LPUART_SetDESignalPolarity.
__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RXNE(USART_TypeDef *LPUARTx)
Check if the LPUART Read Data Register Not Empty Flag is set or not ISR RXNE LL_LPUART_IsActiveFlag_...
__STATIC_INLINE void LL_LPUART_SetTXFIFOThreshold(USART_TypeDef *LPUARTx, uint32_t Threshold)
Configure TX FIFO Threshold CR3 TXFTCFG LL_LPUART_SetTXFIFOThreshold.
__STATIC_INLINE void LL_LPUART_DisableIT_RXNE_RXFNE(USART_TypeDef *LPUARTx)
Disable RX Not Empty and RX FIFO Not Empty Interrupt CR1 RXNEIE_RXFNEIE LL_LPUART_DisableIT_RXNE_RXF...
__STATIC_INLINE void LL_LPUART_DisableIT_RXFT(USART_TypeDef *LPUARTx)
Disable RX FIFO Threshold Interrupt CR3 RXFTIE LL_LPUART_DisableIT_RXFT.
__STATIC_INLINE uint32_t LL_LPUART_GetBaudRate(USART_TypeDef *LPUARTx, uint32_t PeriphClk, uint32_t PrescalerValue) __STATIC_INLINE uint32_t LL_LPUART_GetBaudRate(USART_TypeDef *LPUARTx
Return current Baud Rate value, according to LPUARTDIV present in BRR register (full BRR content)...
__STATIC_INLINE void LL_LPUART_EnableIT_IDLE(USART_TypeDef *LPUARTx)
Enable IDLE Interrupt CR1 IDLEIE LL_LPUART_EnableIT_IDLE.
__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_ORE(USART_TypeDef *LPUARTx)
Check if the LPUART OverRun Error Flag is set or not ISR ORE LL_LPUART_IsActiveFlag_ORE.
__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_nCTS(USART_TypeDef *LPUARTx)
Check if the LPUART CTS interrupt Flag is set or not ISR CTSIF LL_LPUART_IsActiveFlag_nCTS.
__STATIC_INLINE void LL_LPUART_SetTransferDirection(USART_TypeDef *LPUARTx, uint32_t TransferDirection)
Configure simultaneously enabled/disabled states of Transmitter and Receiver CR1 RE LL_LPUART_SetTra...
register uint32_t periphclkpresc
__STATIC_INLINE uint32_t LL_LPUART_GetDEAssertionTime(USART_TypeDef *LPUARTx)
Return DEAT (Driver Enable Assertion Time) CR1 DEAT LL_LPUART_GetDEAssertionTime.
__STATIC_INLINE void LL_LPUART_ClearFlag_TC(USART_TypeDef *LPUARTx)
Clear Transmission Complete Flag ICR TCCF LL_LPUART_ClearFlag_TC.
__STATIC_INLINE void LL_LPUART_EnableMuteMode(USART_TypeDef *LPUARTx)
Allow switch between Mute Mode and Active mode CR1 MME LL_LPUART_EnableMuteMode. ...
__STATIC_INLINE void LL_LPUART_EnableDEMode(USART_TypeDef *LPUARTx)
Enable Driver Enable (DE) Mode CR3 DEM LL_LPUART_EnableDEMode.
__STATIC_INLINE uint32_t LL_LPUART_GetWakeUpMethod(USART_TypeDef *LPUARTx)
Return Receiver Wake Up method from Mute mode CR1 WAKE LL_LPUART_GetWakeUpMethod.
__STATIC_INLINE void LL_LPUART_EnableOverrunDetect(USART_TypeDef *LPUARTx)
Enable Overrun detection CR3 OVRDIS LL_LPUART_EnableOverrunDetect.
CLEAR_BIT(hrtc->Instance->CR, RTC_CR_WUTE)
__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TXFE(USART_TypeDef *LPUARTx)
Check if the LPUART TX FIFO Empty Flag is set or not ISR TXFE LL_LPUART_IsActiveFlag_TXFE.
__STATIC_INLINE void LL_LPUART_EnableIT_ERROR(USART_TypeDef *LPUARTx)
Enable Error Interrupt.
__STATIC_INLINE void LL_LPUART_DisableInStopMode(USART_TypeDef *LPUARTx)
LPUART disabled in STOP Mode.
__STATIC_INLINE uint32_t LL_LPUART_GetNodeAddressLen(USART_TypeDef *LPUARTx)
Return Length of Node Address used in Address Detection mode (7-bit or 4-bit) CR2 ADDM7 LL_LPUART_Ge...
register uint32_t brrresult
__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RWU(USART_TypeDef *LPUARTx)
Check if the LPUART Receive Wake Up from mute mode Flag is set or not ISR RWU LL_LPUART_IsActiveFlag...
__STATIC_INLINE void LL_LPUART_EnableIT_TXE(USART_TypeDef *LPUARTx)
Enable TX Empty Interrupt CR1 TXEIE LL_LPUART_EnableIT_TXE.
__STATIC_INLINE uint32_t LL_LPUART_GetPrescaler(USART_TypeDef *LPUARTx)
Retrieve the Clock source prescaler for baudrate generator and oversampling PRESC PRESCALER LL_LPUAR...
__STATIC_INLINE void LL_LPUART_EnableRTSHWFlowCtrl(USART_TypeDef *LPUARTx)
Enable RTS HW Flow Control CR3 RTSE LL_LPUART_EnableRTSHWFlowCtrl.
__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TXE(USART_TypeDef *LPUARTx)
Check if the LPUART Transmit Data Register Empty Flag is set or not ISR TXE LL_LPUART_IsActiveFlag_T...
__STATIC_INLINE void LL_LPUART_Disable(USART_TypeDef *LPUARTx)
LPUART Disable.
__STATIC_INLINE void LL_LPUART_DisableDEMode(USART_TypeDef *LPUARTx)
Disable Driver Enable (DE) Mode CR3 DEM LL_LPUART_DisableDEMode.
__STATIC_INLINE uint32_t LL_LPUART_GetTXPinLevel(USART_TypeDef *LPUARTx)
Retrieve TX pin active level logic configuration CR2 TXINV LL_LPUART_GetTXPinLevel.
__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_FE(USART_TypeDef *LPUARTx)
Check if the LPUART Framing Error Flag is set or not ISR FE LL_LPUART_IsActiveFlag_FE.
__STATIC_INLINE void LL_LPUART_DisableDMAReq_TX(USART_TypeDef *LPUARTx)
Disable DMA Mode for transmission CR3 DMAT LL_LPUART_DisableDMAReq_TX.
__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TXFE(USART_TypeDef *LPUARTx)
Check if the LPUART TX FIFO Empty Interrupt is enabled or disabled CR1 TXFEIE LL_LPUART_IsEnabledIT_...
__STATIC_INLINE uint32_t LL_LPUART_GetStopBitsLength(USART_TypeDef *LPUARTx)
Retrieve the length of the stop bits CR2 STOP LL_LPUART_GetStopBitsLength.
__STATIC_INLINE void LL_LPUART_DisableIT_TXE_TXFNF(USART_TypeDef *LPUARTx)
Disable TX Empty and TX FIFO Not Full Interrupt CR1 TXEIE_TXFNFIE LL_LPUART_DisableIT_TXE_TXFNF.
__STATIC_INLINE void LL_LPUART_EnableIT_PE(USART_TypeDef *LPUARTx)
Enable Parity Error Interrupt CR1 PEIE LL_LPUART_EnableIT_PE.
__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TC(USART_TypeDef *LPUARTx)
Check if the LPUART Transmission Complete Interrupt is enabled or disabled. CR1 TCIE LL_LPUART_IsEna...
__STATIC_INLINE void LL_LPUART_DisableIT_RXFF(USART_TypeDef *LPUARTx)
Disable RX FIFO Full Interrupt CR1 RXFFIE LL_LPUART_DisableIT_RXFF.
__STATIC_INLINE void LL_LPUART_EnableInStopMode(USART_TypeDef *LPUARTx)
LPUART enabled in STOP Mode.
__STATIC_INLINE void LL_LPUART_TransmitData8(USART_TypeDef *LPUARTx, uint8_t Value)
Write in Transmitter Data Register (Transmit Data value, 8 bits) TDR TDR LL_LPUART_TransmitData8.
__STATIC_INLINE void LL_LPUART_ClearFlag_PE(USART_TypeDef *LPUARTx)
Clear Parity Error Flag ICR PECF LL_LPUART_ClearFlag_PE.
LL LPUART Init Structure definition.
__STATIC_INLINE uint32_t LL_LPUART_GetRXFIFOThreshold(USART_TypeDef *LPUARTx)
Return RX FIFO Threshold Configuration CR3 RXFTCFG LL_LPUART_GetRXFIFOThreshold. ...
uint32_t HardwareFlowControl
__STATIC_INLINE uint32_t LL_LPUART_GetNodeAddress(USART_TypeDef *LPUARTx)
Return 8 bit Address of the LPUART node as set in ADD field of CR2.
__STATIC_INLINE uint32_t LL_LPUART_GetTXFIFOThreshold(USART_TypeDef *LPUARTx)
Return TX FIFO Threshold Configuration CR3 TXFTCFG LL_LPUART_GetTXFIFOThreshold. ...
__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_WKUP(USART_TypeDef *LPUARTx)
Check if the LPUART Wake Up from stop mode Flag is set or not ISR WUF LL_LPUART_IsActiveFlag_WKUP.
__STATIC_INLINE uint32_t LL_LPUART_GetDESignalPolarity(USART_TypeDef *LPUARTx)
Return Driver Enable Polarity CR3 DEP LL_LPUART_GetDESignalPolarity.
__STATIC_INLINE void LL_LPUART_Enable(USART_TypeDef *LPUARTx)
LPUART Enable CR1 UE LL_LPUART_Enable.
__STATIC_INLINE void LL_LPUART_DisableClockInStopMode(USART_TypeDef *LPUARTx)
LPUART clock disabled in STOP Mode.
__STATIC_INLINE uint32_t LL_LPUART_IsEnabledDMADeactOnRxErr(USART_TypeDef *LPUARTx)
Indicate if DMA Disabling on Reception Error is disabled CR3 DDRE LL_LPUART_IsEnabledDMADeactOnRxErr...
__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_REACK(USART_TypeDef *LPUARTx)
Check if the LPUART Receive Enable Acknowledge Flag is set or not ISR REACK LL_LPUART_IsActiveFlag_R...
__STATIC_INLINE void LL_LPUART_DisableFIFO(USART_TypeDef *LPUARTx)
FIFO Mode Disable CR1 FIFOEN LL_LPUART_DisableFIFO.
__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_SBK(USART_TypeDef *LPUARTx)
Check if the LPUART Send Break Flag is set or not ISR SBKF LL_LPUART_IsActiveFlag_SBK.
__STATIC_INLINE uint32_t LL_LPUART_IsEnabledDMAReq_TX(USART_TypeDef *LPUARTx)
Check if DMA Mode is enabled for transmission CR3 DMAT LL_LPUART_IsEnabledDMAReq_TX.
__STATIC_INLINE void LL_LPUART_SetTXPinLevel(USART_TypeDef *LPUARTx, uint32_t PinInvMethod)
Configure TX pin active level logic CR2 TXINV LL_LPUART_SetTXPinLevel.
__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TXFT(USART_TypeDef *LPUARTx)
Check if the LPUART TX FIFO Threshold Flag is set or not ISR TXFT LL_LPUART_IsActiveFlag_TXFT.
__STATIC_INLINE void LL_LPUART_DisableIT_TXFT(USART_TypeDef *LPUARTx)
Disable TX FIFO Threshold Interrupt CR3 TXFTIE LL_LPUART_DisableIT_TXFT.
__STATIC_INLINE void LL_LPUART_SetStopBitsLength(USART_TypeDef *LPUARTx, uint32_t StopBits)
Set the length of the stop bits CR2 STOP LL_LPUART_SetStopBitsLength.
__STATIC_INLINE uint32_t LL_LPUART_IsEnabledDEMode(USART_TypeDef *LPUARTx)
Indicate if Driver Enable (DE) Mode is enabled CR3 DEM LL_LPUART_IsEnabledDEMode.
__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TEACK(USART_TypeDef *LPUARTx)
Check if the LPUART Transmit Enable Acknowledge Flag is set or not ISR TEACK LL_LPUART_IsActiveFlag_...
__STATIC_INLINE void LL_LPUART_DisableHalfDuplex(USART_TypeDef *LPUARTx)
Disable Single Wire Half-Duplex mode CR3 HDSEL LL_LPUART_DisableHalfDuplex.
__STATIC_INLINE void LL_LPUART_EnableIT_RXFT(USART_TypeDef *LPUARTx)
Enable RX FIFO Threshold Interrupt CR3 RXFTIE LL_LPUART_EnableIT_RXFT.
__STATIC_INLINE void LL_LPUART_DisableMuteMode(USART_TypeDef *LPUARTx)
Prevent Mute Mode use. Set Receiver in active mode permanently. CR1 MME LL_LPUART_DisableMuteMode.
__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RXNE_RXFNE(USART_TypeDef *LPUARTx)
Check if the LPUART Read Data Register or LPUART RX FIFO Not Empty Flag is set or not ISR RXNE_RXFNE...
__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_RXNE_RXFNE(USART_TypeDef *LPUARTx)
Check if the LPUART RX Not Empty and LPUART RX FIFO Not Empty Interrupt is enabled or disabled...
__STATIC_INLINE void LL_LPUART_ConfigFIFOsThreshold(USART_TypeDef *LPUARTx, uint32_t TXThreshold, uint32_t RXThreshold)
Configure TX and RX FIFOs Threshold CR3 TXFTCFG LL_LPUART_ConfigFIFOsThreshold CR3 RXFTCFG LL_LPUAR...
__STATIC_INLINE void LL_LPUART_SetTransferBitOrder(USART_TypeDef *LPUARTx, uint32_t BitOrder)
Configure transfer bit order (either Less or Most Significant Bit First)
__STATIC_INLINE uint32_t LL_LPUART_DMA_GetRegAddr(USART_TypeDef *LPUARTx, uint32_t Direction)
Get the LPUART data register address used for DMA transfer RDR RDR LL_LPUART_DMA_GetRegAddr TDR TDR...
__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_WKUP(USART_TypeDef *LPUARTx)
Check if the LPUART Wake Up from Stop Mode Interrupt is enabled or disabled. CR3 WUFIE LL_LPUART_IsE...
__STATIC_INLINE uint32_t LL_LPUART_GetTXRXSwap(USART_TypeDef *LPUARTx)
Retrieve TX/RX pins swapping configuration. CR2 SWAP LL_LPUART_GetTXRXSwap.
__STATIC_INLINE uint32_t LL_LPUART_IsEnabled(USART_TypeDef *LPUARTx)
Indicate if LPUART is enabled CR1 UE LL_LPUART_IsEnabled.
__STATIC_INLINE void LL_LPUART_EnableDMADeactOnRxErr(USART_TypeDef *LPUARTx)
Enable DMA Disabling on Reception Error CR3 DDRE LL_LPUART_EnableDMADeactOnRxErr.
__STATIC_INLINE void LL_LPUART_EnableDMAReq_TX(USART_TypeDef *LPUARTx)
Enable DMA Mode for transmission CR3 DMAT LL_LPUART_EnableDMAReq_TX.
__STATIC_INLINE uint32_t LL_LPUART_GetDataWidth(USART_TypeDef *LPUARTx)
Return Word length (i.e. nb of data bits, excluding start and stop bits) CR1 M LL_LPUART_GetDataWidt...
__STATIC_INLINE void LL_LPUART_EnableFIFO(USART_TypeDef *LPUARTx)
FIFO Mode Enable CR1 FIFOEN LL_LPUART_EnableFIFO.
__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TXE(USART_TypeDef *LPUARTx)
Check if the LPUART TX Empty Interrupt is enabled or disabled. CR1 TXEIE LL_LPUART_IsEnabledIT_TXE.
__STATIC_INLINE void LL_LPUART_DisableIT_CTS(USART_TypeDef *LPUARTx)
Disable CTS Interrupt CR3 CTSIE LL_LPUART_DisableIT_CTS.
__STATIC_INLINE void LL_LPUART_RequestBreakSending(USART_TypeDef *LPUARTx)
Request Break sending RQR SBKRQ LL_LPUART_RequestBreakSending.
__STATIC_INLINE void LL_LPUART_SetParity(USART_TypeDef *LPUARTx, uint32_t Parity)
Configure Parity (enabled/disabled and parity mode if enabled)
__STATIC_INLINE uint32_t LL_LPUART_IsEnabledMuteMode(USART_TypeDef *LPUARTx)
Indicate if switch between Mute Mode and Active mode is allowed CR1 MME LL_LPUART_IsEnabledMuteMode...
__STATIC_INLINE void LL_LPUART_EnableCTSHWFlowCtrl(USART_TypeDef *LPUARTx)
Enable CTS HW Flow Control CR3 CTSE LL_LPUART_EnableCTSHWFlowCtrl.
__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TC(USART_TypeDef *LPUARTx)
Check if the LPUART Transmission Complete Flag is set or not ISR TC LL_LPUART_IsActiveFlag_TC.
__STATIC_INLINE void LL_LPUART_DisableIT_TXFE(USART_TypeDef *LPUARTx)
Disable TX FIFO Empty Interrupt CR1 TXFEIE LL_LPUART_DisableIT_TXFE.
__STATIC_INLINE uint32_t LL_LPUART_GetParity(USART_TypeDef *LPUARTx)
Return Parity configuration (enabled/disabled and parity mode if enabled) CR1 PS LL_LPUART_GetParity...
__STATIC_INLINE void LL_LPUART_RequestRxDataFlush(USART_TypeDef *LPUARTx)
Request a Receive Data flush RQR RXFRQ LL_LPUART_RequestRxDataFlush.
__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_ERROR(USART_TypeDef *LPUARTx)
Check if the LPUART Error Interrupt is enabled or disabled. CR3 EIE LL_LPUART_IsEnabledIT_ERROR.
__STATIC_INLINE uint32_t LL_LPUART_IsEnabledOverrunDetect(USART_TypeDef *LPUARTx)
Indicate if Overrun detection is enabled CR3 OVRDIS LL_LPUART_IsEnabledOverrunDetect.
__STATIC_INLINE void LL_LPUART_EnableDMAReq_RX(USART_TypeDef *LPUARTx)
Enable DMA Mode for reception CR3 DMAR LL_LPUART_EnableDMAReq_RX.
__STATIC_INLINE void LL_LPUART_DisableIT_TXE(USART_TypeDef *LPUARTx)
Disable TX Empty Interrupt CR1 TXEIE LL_LPUART_DisableIT_TXE.
__STATIC_INLINE void LL_LPUART_SetPrescaler(USART_TypeDef *LPUARTx, uint32_t PrescalerValue)
Configure Clock source prescaler for baudrate generator and oversampling PRESC PRESCALER LL_LPUART_S...
__STATIC_INLINE uint32_t LL_LPUART_GetDEDeassertionTime(USART_TypeDef *LPUARTx)
Return DEDT (Driver Enable De-Assertion Time) CR1 DEDT LL_LPUART_GetDEDeassertionTime.
__STATIC_INLINE uint32_t LL_LPUART_GetTransferBitOrder(USART_TypeDef *LPUARTx)
Return transfer bit order (either Less or Most Significant Bit First)
__STATIC_INLINE void LL_LPUART_EnableIT_CM(USART_TypeDef *LPUARTx)
Enable Character Match Interrupt CR1 CMIE LL_LPUART_EnableIT_CM.
__STATIC_INLINE void LL_LPUART_ClearFlag_nCTS(USART_TypeDef *LPUARTx)
Clear CTS Interrupt Flag ICR CTSCF LL_LPUART_ClearFlag_nCTS.
__STATIC_INLINE void LL_LPUART_EnableIT_RXNE(USART_TypeDef *LPUARTx)
Enable RX Not Empty Interrupt CR1 RXNEIE LL_LPUART_EnableIT_RXNE.
__STATIC_INLINE void LL_LPUART_ClearFlag_CM(USART_TypeDef *LPUARTx)
Clear Character Match Flag ICR CMCF LL_LPUART_ClearFlag_CM.
__STATIC_INLINE void LL_LPUART_TransmitData9(USART_TypeDef *LPUARTx, uint16_t Value)
Write in Transmitter Data Register (Transmit Data value, 9 bits) TDR TDR LL_LPUART_TransmitData9.
__STATIC_INLINE void LL_LPUART_EnableIT_WKUP(USART_TypeDef *LPUARTx)
Enable Wake Up from Stop Mode Interrupt CR3 WUFIE LL_LPUART_EnableIT_WKUP.
__STATIC_INLINE void LL_LPUART_SetDEDeassertionTime(USART_TypeDef *LPUARTx, uint32_t Time)
Set DEDT (Driver Enable De-Assertion Time), Time value expressed on 5 bits ([4:0] bits)...
ErrorStatus LL_LPUART_Init(USART_TypeDef *LPUARTx, LL_LPUART_InitTypeDef *LPUART_InitStruct)
Initialize LPUART registers according to the specified parameters in LPUART_InitStruct.
__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_CTS(USART_TypeDef *LPUARTx)
Check if the LPUART CTS Flag is set or not ISR CTS LL_LPUART_IsActiveFlag_CTS.
__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RXFT(USART_TypeDef *LPUARTx)
Check if the LPUART RX FIFO Threshold Flag is set or not ISR RXFT LL_LPUART_IsActiveFlag_RXFT.
MODIFY_REG(hrtc->Instance->CR, RTC_CR_WUCKSEL,(uint32_t) WakeUpClock)
__STATIC_INLINE uint32_t LL_LPUART_GetBinaryDataLogic(USART_TypeDef *LPUARTx)
Retrieve Binary data configuration CR2 DATAINV LL_LPUART_GetBinaryDataLogic.
__STATIC_INLINE void uint32_t uint32_t BaudRate
__STATIC_INLINE void LL_LPUART_ClearFlag_WKUP(USART_TypeDef *LPUARTx)
Clear Wake Up from stop mode Flag ICR WUCF LL_LPUART_ClearFlag_WKUP.
__STATIC_INLINE uint32_t LL_LPUART_IsEnabledInStopMode(USART_TypeDef *LPUARTx)
Indicate if LPUART is enabled in STOP Mode (able to wake up MCU from Stop mode or not) CR1 UESM LL_L...
ErrorStatus LL_LPUART_DeInit(USART_TypeDef *LPUARTx)
De-initialize LPUART registers (Registers restored to their default values).
__STATIC_INLINE void LL_LPUART_RequestEnterMuteMode(USART_TypeDef *LPUARTx)
Put LPUART in mute mode and set the RWU flag RQR MMRQ LL_LPUART_RequestEnterMuteMode.
__STATIC_INLINE void LL_LPUART_EnableIT_TXFE(USART_TypeDef *LPUARTx)
Enable TX FIFO Empty Interrupt CR1 TXFEIE LL_LPUART_EnableIT_TXFE.
__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_RXFF(USART_TypeDef *LPUARTx)
Check if the LPUART RX FIFO Full Interrupt is enabled or disabled CR1 RXFFIE LL_LPUART_IsEnabledIT_R...
__STATIC_INLINE void LL_LPUART_SetTXRXSwap(USART_TypeDef *LPUARTx, uint32_t SwapConfig)
Configure TX/RX pins swapping setting. CR2 SWAP LL_LPUART_SetTXRXSwap.
void LL_LPUART_StructInit(LL_LPUART_InitTypeDef *LPUART_InitStruct)
Set each LL_LPUART_InitTypeDef field to default value.
__STATIC_INLINE uint32_t LL_LPUART_IsClockEnabledInStopMode(USART_TypeDef *LPUARTx)
Indicate if LPUART clock is enabled in STOP Mode CR3 UCESM LL_LPUART_IsClockEnabledInStopMode.
__STATIC_INLINE void LL_LPUART_ConfigNodeAddress(USART_TypeDef *LPUARTx, uint32_t AddressLen, uint32_t NodeAddress)
Set Address of the LPUART node.
__STATIC_INLINE uint8_t LL_LPUART_ReceiveData8(USART_TypeDef *LPUARTx)
Read Receiver Data register (Receive Data value, 8 bits) RDR RDR LL_LPUART_ReceiveData8.
__STATIC_INLINE uint16_t LL_LPUART_ReceiveData9(USART_TypeDef *LPUARTx)
Read Receiver Data register (Receive Data value, 9 bits) RDR RDR LL_LPUART_ReceiveData9.
__STATIC_INLINE void LL_LPUART_ClearFlag_ORE(USART_TypeDef *LPUARTx)
Clear OverRun Error Flag ICR ORECF LL_LPUART_ClearFlag_ORE.
__STATIC_INLINE void LL_LPUART_EnableIT_CTS(USART_TypeDef *LPUARTx)
Enable CTS Interrupt CR3 CTSIE LL_LPUART_EnableIT_CTS.
__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_CTS(USART_TypeDef *LPUARTx)
Check if the LPUART CTS Interrupt is enabled or disabled. CR3 CTSIE LL_LPUART_IsEnabledIT_CTS.
__STATIC_INLINE void LL_LPUART_DisableCTSHWFlowCtrl(USART_TypeDef *LPUARTx)
Disable CTS HW Flow Control CR3 CTSE LL_LPUART_DisableCTSHWFlowCtrl.
__STATIC_INLINE void LL_LPUART_EnableDirectionRx(USART_TypeDef *LPUARTx)
Receiver Enable (Receiver is enabled and begins searching for a start bit) CR1 RE LL_LPUART_EnableDi...
__STATIC_INLINE void LL_LPUART_SetRXPinLevel(USART_TypeDef *LPUARTx, uint32_t PinInvMethod)
Configure RX pin active level logic CR2 RXINV LL_LPUART_SetRXPinLevel.
__STATIC_INLINE void LL_LPUART_SetWakeUpMethod(USART_TypeDef *LPUARTx, uint32_t Method)
Set Receiver Wake Up method from Mute mode. CR1 WAKE LL_LPUART_SetWakeUpMethod.
__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_CM(USART_TypeDef *LPUARTx)
Check if the LPUART Character Match Interrupt is enabled or disabled. CR1 CMIE LL_LPUART_IsEnabledIT...
__STATIC_INLINE void LL_LPUART_EnableIT_TXE_TXFNF(USART_TypeDef *LPUARTx)
Enable TX Empty and TX FIFO Not Full Interrupt CR1 TXEIE_TXFNFIE LL_LPUART_EnableIT_TXE_TXFNF.
__STATIC_INLINE void LL_LPUART_ConfigCharacter(USART_TypeDef *LPUARTx, uint32_t DataWidth, uint32_t Parity, uint32_t StopBits)
Configure Character frame format (Datawidth, Parity control, Stop Bits)