STM32L4xx_HAL_Driver  1.14.0
stm32l4xx_ll_lpuart.h
Go to the documentation of this file.
1 
20 /* Define to prevent recursive inclusion -------------------------------------*/
21 #ifndef STM32L4xx_LL_LPUART_H
22 #define STM32L4xx_LL_LPUART_H
23 
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27 
28 /* Includes ------------------------------------------------------------------*/
29 #include "stm32l4xx.h"
30 
35 #if defined (LPUART1)
36 
41 /* Private types -------------------------------------------------------------*/
42 /* Private variables ---------------------------------------------------------*/
43 #if defined(USART_PRESC_PRESCALER)
44 
47 /* Array used to get the LPUART prescaler division decimal values versus @ref LPUART_LL_EC_PRESCALER values */
48 static const uint16_t LPUART_PRESCALER_TAB[] =
49 {
50  (uint16_t)1,
51  (uint16_t)2,
52  (uint16_t)4,
53  (uint16_t)6,
54  (uint16_t)8,
55  (uint16_t)10,
56  (uint16_t)12,
57  (uint16_t)16,
58  (uint16_t)32,
59  (uint16_t)64,
60  (uint16_t)128,
61  (uint16_t)256
62 };
66 #endif /* USART_PRESC_PRESCALER */
67 
68 /* Private constants ---------------------------------------------------------*/
72 /* Defines used in Baud Rate related macros and corresponding register setting computation */
73 #define LPUART_LPUARTDIV_FREQ_MUL 256U
74 #define LPUART_BRR_MASK 0x000FFFFFU
75 #define LPUART_BRR_MIN_VALUE 0x00000300U
76 
81 /* Private macros ------------------------------------------------------------*/
82 #if defined(USE_FULL_LL_DRIVER)
83 
89 #endif /*USE_FULL_LL_DRIVER*/
90 
91 /* Exported types ------------------------------------------------------------*/
92 #if defined(USE_FULL_LL_DRIVER)
93 
100 typedef struct
101 {
102 #if defined(USART_PRESC_PRESCALER)
103  uint32_t PrescalerValue;
108 #endif /* USART_PRESC_PRESCALER */
109  uint32_t BaudRate;
113  uint32_t DataWidth;
118  uint32_t StopBits;
123  uint32_t Parity;
128  uint32_t TransferDirection;
139 
143 #endif /* USE_FULL_LL_DRIVER */
144 
145 /* Exported constants --------------------------------------------------------*/
154 #define LL_LPUART_ICR_PECF USART_ICR_PECF
155 #define LL_LPUART_ICR_FECF USART_ICR_FECF
156 #define LL_LPUART_ICR_NCF USART_ICR_NECF
157 #define LL_LPUART_ICR_ORECF USART_ICR_ORECF
158 #define LL_LPUART_ICR_IDLECF USART_ICR_IDLECF
159 #if defined(USART_CR1_FIFOEN)
160 #define LL_LPUART_ICR_TXFECF USART_ICR_TXFECF
161 #endif /* USART_CR1_FIFOEN */
162 #define LL_LPUART_ICR_TCCF USART_ICR_TCCF
163 #define LL_LPUART_ICR_CTSCF USART_ICR_CTSCF
164 #define LL_LPUART_ICR_CMCF USART_ICR_CMCF
165 #define LL_LPUART_ICR_WUCF USART_ICR_WUCF
174 #define LL_LPUART_ISR_PE USART_ISR_PE
175 #define LL_LPUART_ISR_FE USART_ISR_FE
176 #define LL_LPUART_ISR_NE USART_ISR_NE
177 #define LL_LPUART_ISR_ORE USART_ISR_ORE
178 #define LL_LPUART_ISR_IDLE USART_ISR_IDLE
179 #if defined(USART_CR1_FIFOEN)
180 #define LL_LPUART_ISR_RXNE_RXFNE USART_ISR_RXNE_RXFNE
181 #else
182 #define LL_LPUART_ISR_RXNE USART_ISR_RXNE
183 #endif /* USART_CR1_FIFOEN */
184 #define LL_LPUART_ISR_TC USART_ISR_TC
185 #if defined(USART_CR1_FIFOEN)
186 #define LL_LPUART_ISR_TXE_TXFNF USART_ISR_TXE_TXFNF
187 #else
188 #define LL_LPUART_ISR_TXE USART_ISR_TXE
189 #endif /* USART_CR1_FIFOEN */
190 #define LL_LPUART_ISR_CTSIF USART_ISR_CTSIF
191 #define LL_LPUART_ISR_CTS USART_ISR_CTS
192 #define LL_LPUART_ISR_BUSY USART_ISR_BUSY
193 #define LL_LPUART_ISR_CMF USART_ISR_CMF
194 #define LL_LPUART_ISR_SBKF USART_ISR_SBKF
195 #define LL_LPUART_ISR_RWU USART_ISR_RWU
196 #define LL_LPUART_ISR_WUF USART_ISR_WUF
197 #define LL_LPUART_ISR_TEACK USART_ISR_TEACK
198 #define LL_LPUART_ISR_REACK USART_ISR_REACK
199 #if defined(USART_CR1_FIFOEN)
200 #define LL_LPUART_ISR_TXFE USART_ISR_TXFE
201 #define LL_LPUART_ISR_RXFF USART_ISR_RXFF
202 #define LL_LPUART_ISR_RXFT USART_ISR_RXFT
203 #define LL_LPUART_ISR_TXFT USART_ISR_TXFT
204 #endif /* USART_CR1_FIFOEN */
205 
213 #define LL_LPUART_CR1_IDLEIE USART_CR1_IDLEIE
214 #if defined(USART_CR1_FIFOEN)
215 #define LL_LPUART_CR1_RXNEIE_RXFNEIE USART_CR1_RXNEIE_RXFNEIE
216 #else
217 #define LL_LPUART_CR1_RXNEIE USART_CR1_RXNEIE
218 #endif /* USART_CR1_FIFOEN */
219 #define LL_LPUART_CR1_TCIE USART_CR1_TCIE
220 #if defined(USART_CR1_FIFOEN)
221 #define LL_LPUART_CR1_TXEIE_TXFNFIE USART_CR1_TXEIE_TXFNFIE
222 #else
223 #define LL_LPUART_CR1_TXEIE USART_CR1_TXEIE
224 #endif /* USART_CR1_FIFOEN */
225 #define LL_LPUART_CR1_PEIE USART_CR1_PEIE
226 #define LL_LPUART_CR1_CMIE USART_CR1_CMIE
227 #if defined(USART_CR1_FIFOEN)
228 #define LL_LPUART_CR1_TXFEIE USART_CR1_TXFEIE
229 #define LL_LPUART_CR1_RXFFIE USART_CR1_RXFFIE
230 #endif /* USART_CR1_FIFOEN */
231 #define LL_LPUART_CR3_EIE USART_CR3_EIE
232 #define LL_LPUART_CR3_CTSIE USART_CR3_CTSIE
233 #define LL_LPUART_CR3_WUFIE USART_CR3_WUFIE
234 #if defined(USART_CR1_FIFOEN)
235 #define LL_LPUART_CR3_TXFTIE USART_CR3_TXFTIE
236 #define LL_LPUART_CR3_RXFTIE USART_CR3_RXFTIE
237 #endif /* USART_CR1_FIFOEN */
238 
241 #if defined(USART_CR1_FIFOEN)
242 
246 #define LL_LPUART_FIFOTHRESHOLD_1_8 0x00000000U
247 #define LL_LPUART_FIFOTHRESHOLD_1_4 0x00000001U
248 #define LL_LPUART_FIFOTHRESHOLD_1_2 0x00000002U
249 #define LL_LPUART_FIFOTHRESHOLD_3_4 0x00000003U
250 #define LL_LPUART_FIFOTHRESHOLD_7_8 0x00000004U
251 #define LL_LPUART_FIFOTHRESHOLD_8_8 0x00000005U
255 #endif /* USART_CR1_FIFOEN */
256 
260 #define LL_LPUART_DIRECTION_NONE 0x00000000U
261 #define LL_LPUART_DIRECTION_RX USART_CR1_RE
262 #define LL_LPUART_DIRECTION_TX USART_CR1_TE
263 #define LL_LPUART_DIRECTION_TX_RX (USART_CR1_TE |USART_CR1_RE)
271 #define LL_LPUART_PARITY_NONE 0x00000000U
272 #define LL_LPUART_PARITY_EVEN USART_CR1_PCE
273 #define LL_LPUART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS)
281 #define LL_LPUART_WAKEUP_IDLELINE 0x00000000U
282 #define LL_LPUART_WAKEUP_ADDRESSMARK USART_CR1_WAKE
290 #define LL_LPUART_DATAWIDTH_7B USART_CR1_M1
291 #define LL_LPUART_DATAWIDTH_8B 0x00000000U
292 #define LL_LPUART_DATAWIDTH_9B USART_CR1_M0
296 #if defined(USART_PRESC_PRESCALER)
297 
301 #define LL_LPUART_PRESCALER_DIV1 0x00000000U
302 #define LL_LPUART_PRESCALER_DIV2 (USART_PRESC_PRESCALER_0)
303 #define LL_LPUART_PRESCALER_DIV4 (USART_PRESC_PRESCALER_1)
304 #define LL_LPUART_PRESCALER_DIV6 (USART_PRESC_PRESCALER_1 | USART_PRESC_PRESCALER_0)
305 #define LL_LPUART_PRESCALER_DIV8 (USART_PRESC_PRESCALER_2)
306 #define LL_LPUART_PRESCALER_DIV10 (USART_PRESC_PRESCALER_2 | USART_PRESC_PRESCALER_0)
307 #define LL_LPUART_PRESCALER_DIV12 (USART_PRESC_PRESCALER_2 | USART_PRESC_PRESCALER_1)
308 #define LL_LPUART_PRESCALER_DIV16 (USART_PRESC_PRESCALER_2 | USART_PRESC_PRESCALER_1 | USART_PRESC_PRESCALER_0)
309 #define LL_LPUART_PRESCALER_DIV32 (USART_PRESC_PRESCALER_3)
310 #define LL_LPUART_PRESCALER_DIV64 (USART_PRESC_PRESCALER_3 | USART_PRESC_PRESCALER_0)
311 #define LL_LPUART_PRESCALER_DIV128 (USART_PRESC_PRESCALER_3 | USART_PRESC_PRESCALER_1)
312 #define LL_LPUART_PRESCALER_DIV256 (USART_PRESC_PRESCALER_3 | USART_PRESC_PRESCALER_1 | USART_PRESC_PRESCALER_0)
316 #endif /* USART_PRESC_PRESCALER */
317 
321 #define LL_LPUART_STOPBITS_1 0x00000000U
322 #define LL_LPUART_STOPBITS_2 USART_CR2_STOP_1
330 #define LL_LPUART_TXRX_STANDARD 0x00000000U
331 #define LL_LPUART_TXRX_SWAPPED (USART_CR2_SWAP)
339 #define LL_LPUART_RXPIN_LEVEL_STANDARD 0x00000000U
340 #define LL_LPUART_RXPIN_LEVEL_INVERTED (USART_CR2_RXINV)
348 #define LL_LPUART_TXPIN_LEVEL_STANDARD 0x00000000U
349 #define LL_LPUART_TXPIN_LEVEL_INVERTED (USART_CR2_TXINV)
357 #define LL_LPUART_BINARY_LOGIC_POSITIVE 0x00000000U
358 #define LL_LPUART_BINARY_LOGIC_NEGATIVE USART_CR2_DATAINV
366 #define LL_LPUART_BITORDER_LSBFIRST 0x00000000U
367 #define LL_LPUART_BITORDER_MSBFIRST USART_CR2_MSBFIRST
375 #define LL_LPUART_ADDRESS_DETECT_4B 0x00000000U
376 #define LL_LPUART_ADDRESS_DETECT_7B USART_CR2_ADDM7
384 #define LL_LPUART_HWCONTROL_NONE 0x00000000U
385 #define LL_LPUART_HWCONTROL_RTS USART_CR3_RTSE
386 #define LL_LPUART_HWCONTROL_CTS USART_CR3_CTSE
387 #define LL_LPUART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE)
395 #define LL_LPUART_WAKEUP_ON_ADDRESS 0x00000000U
396 #define LL_LPUART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1
397 #define LL_LPUART_WAKEUP_ON_RXNE (USART_CR3_WUS_0 | USART_CR3_WUS_1)
405 #define LL_LPUART_DE_POLARITY_HIGH 0x00000000U
406 #define LL_LPUART_DE_POLARITY_LOW USART_CR3_DEP
414 #define LL_LPUART_DMA_REG_DATA_TRANSMIT 0x00000000U
415 #define LL_LPUART_DMA_REG_DATA_RECEIVE 0x00000001U
424 /* Exported macro ------------------------------------------------------------*/
425 
440 #define LL_LPUART_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
441 
448 #define LL_LPUART_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
449 
479 #if defined(USART_PRESC_PRESCALER)
480 #define __LL_LPUART_DIV(__PERIPHCLK__, __PRESCALER__, __BAUDRATE__) (uint32_t)((((((uint64_t)(__PERIPHCLK__)/(uint64_t)(LPUART_PRESCALER_TAB[(uint16_t)(__PRESCALER__)])) * LPUART_LPUARTDIV_FREQ_MUL)\
481  + (uint32_t)((__BAUDRATE__)/2U))/(__BAUDRATE__)) & LPUART_BRR_MASK)
482 #else
483 #define __LL_LPUART_DIV(__PERIPHCLK__, __BAUDRATE__) (uint32_t)(((((uint64_t)(__PERIPHCLK__)*LPUART_LPUARTDIV_FREQ_MUL) + (uint32_t)((__BAUDRATE__)/2U))/(__BAUDRATE__))\
484  & LPUART_BRR_MASK)
485 #endif /* USART_PRESC_PRESCALER */
486 
495 /* Exported functions --------------------------------------------------------*/
510 __STATIC_INLINE void LL_LPUART_Enable(USART_TypeDef *LPUARTx)
511 {
512  SET_BIT(LPUARTx->CR1, USART_CR1_UE);
513 }
514 
529 __STATIC_INLINE void LL_LPUART_Disable(USART_TypeDef *LPUARTx)
530 {
531  CLEAR_BIT(LPUARTx->CR1, USART_CR1_UE);
532 }
533 
540 __STATIC_INLINE uint32_t LL_LPUART_IsEnabled(USART_TypeDef *LPUARTx)
541 {
542  return ((READ_BIT(LPUARTx->CR1, USART_CR1_UE) == (USART_CR1_UE)) ? 1UL : 0UL);
543 }
544 
545 #if defined(USART_CR1_FIFOEN)
546 
552 __STATIC_INLINE void LL_LPUART_EnableFIFO(USART_TypeDef *LPUARTx)
553 {
554  SET_BIT(LPUARTx->CR1, USART_CR1_FIFOEN);
555 }
556 
563 __STATIC_INLINE void LL_LPUART_DisableFIFO(USART_TypeDef *LPUARTx)
564 {
565  CLEAR_BIT(LPUARTx->CR1, USART_CR1_FIFOEN);
566 }
567 
574 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledFIFO(USART_TypeDef *LPUARTx)
575 {
576  return ((READ_BIT(LPUARTx->CR1, USART_CR1_FIFOEN) == (USART_CR1_FIFOEN)) ? 1UL : 0UL);
577 }
578 
592 __STATIC_INLINE void LL_LPUART_SetTXFIFOThreshold(USART_TypeDef *LPUARTx, uint32_t Threshold)
593 {
594  MODIFY_REG(LPUARTx->CR3, USART_CR3_TXFTCFG, Threshold << USART_CR3_TXFTCFG_Pos);
595 }
596 
609 __STATIC_INLINE uint32_t LL_LPUART_GetTXFIFOThreshold(USART_TypeDef *LPUARTx)
610 {
611  return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos);
612 }
613 
627 __STATIC_INLINE void LL_LPUART_SetRXFIFOThreshold(USART_TypeDef *LPUARTx, uint32_t Threshold)
628 {
629  MODIFY_REG(LPUARTx->CR3, USART_CR3_RXFTCFG, Threshold << USART_CR3_RXFTCFG_Pos);
630 }
631 
644 __STATIC_INLINE uint32_t LL_LPUART_GetRXFIFOThreshold(USART_TypeDef *LPUARTx)
645 {
646  return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos);
647 }
648 
670 __STATIC_INLINE void LL_LPUART_ConfigFIFOsThreshold(USART_TypeDef *LPUARTx, uint32_t TXThreshold, uint32_t RXThreshold)
671 {
672  MODIFY_REG(LPUARTx->CR3, USART_CR3_TXFTCFG | USART_CR3_RXFTCFG, (TXThreshold << USART_CR3_TXFTCFG_Pos) | (RXThreshold << USART_CR3_RXFTCFG_Pos));
673 }
674 #endif /* USART_CR1_FIFOEN */
675 
684 __STATIC_INLINE void LL_LPUART_EnableInStopMode(USART_TypeDef *LPUARTx)
685 {
686  SET_BIT(LPUARTx->CR1, USART_CR1_UESM);
687 }
688 
696 __STATIC_INLINE void LL_LPUART_DisableInStopMode(USART_TypeDef *LPUARTx)
697 {
698  CLEAR_BIT(LPUARTx->CR1, USART_CR1_UESM);
699 }
700 
708 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledInStopMode(USART_TypeDef *LPUARTx)
709 {
710  return ((READ_BIT(LPUARTx->CR1, USART_CR1_UESM) == (USART_CR1_UESM)) ? 1UL : 0UL);
711 }
712 
713 #if defined(USART_CR3_UCESM)
714 
721 __STATIC_INLINE void LL_LPUART_EnableClockInStopMode(USART_TypeDef *LPUARTx)
722 {
723  SET_BIT(LPUARTx->CR3, USART_CR3_UCESM);
724 }
725 
733 __STATIC_INLINE void LL_LPUART_DisableClockInStopMode(USART_TypeDef *LPUARTx)
734 {
735  CLEAR_BIT(LPUARTx->CR3, USART_CR3_UCESM);
736 }
737 
744 __STATIC_INLINE uint32_t LL_LPUART_IsClockEnabledInStopMode(USART_TypeDef *LPUARTx)
745 {
746  return ((READ_BIT(LPUARTx->CR3, USART_CR3_UCESM) == (USART_CR3_UCESM)) ? 1UL : 0UL);
747 }
748 
749 #endif /* USART_CR3_UCESM */
750 
756 __STATIC_INLINE void LL_LPUART_EnableDirectionRx(USART_TypeDef *LPUARTx)
757 {
758  SET_BIT(LPUARTx->CR1, USART_CR1_RE);
759 }
760 
767 __STATIC_INLINE void LL_LPUART_DisableDirectionRx(USART_TypeDef *LPUARTx)
768 {
769  CLEAR_BIT(LPUARTx->CR1, USART_CR1_RE);
770 }
771 
778 __STATIC_INLINE void LL_LPUART_EnableDirectionTx(USART_TypeDef *LPUARTx)
779 {
780  SET_BIT(LPUARTx->CR1, USART_CR1_TE);
781 }
782 
789 __STATIC_INLINE void LL_LPUART_DisableDirectionTx(USART_TypeDef *LPUARTx)
790 {
791  CLEAR_BIT(LPUARTx->CR1, USART_CR1_TE);
792 }
793 
807 __STATIC_INLINE void LL_LPUART_SetTransferDirection(USART_TypeDef *LPUARTx, uint32_t TransferDirection)
808 {
809  MODIFY_REG(LPUARTx->CR1, USART_CR1_RE | USART_CR1_TE, TransferDirection);
810 }
811 
823 __STATIC_INLINE uint32_t LL_LPUART_GetTransferDirection(USART_TypeDef *LPUARTx)
824 {
825  return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_RE | USART_CR1_TE));
826 }
827 
842 __STATIC_INLINE void LL_LPUART_SetParity(USART_TypeDef *LPUARTx, uint32_t Parity)
843 {
844  MODIFY_REG(LPUARTx->CR1, USART_CR1_PS | USART_CR1_PCE, Parity);
845 }
846 
857 __STATIC_INLINE uint32_t LL_LPUART_GetParity(USART_TypeDef *LPUARTx)
858 {
859  return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_PS | USART_CR1_PCE));
860 }
861 
871 __STATIC_INLINE void LL_LPUART_SetWakeUpMethod(USART_TypeDef *LPUARTx, uint32_t Method)
872 {
873  MODIFY_REG(LPUARTx->CR1, USART_CR1_WAKE, Method);
874 }
875 
884 __STATIC_INLINE uint32_t LL_LPUART_GetWakeUpMethod(USART_TypeDef *LPUARTx)
885 {
886  return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_WAKE));
887 }
888 
899 __STATIC_INLINE void LL_LPUART_SetDataWidth(USART_TypeDef *LPUARTx, uint32_t DataWidth)
900 {
901  MODIFY_REG(LPUARTx->CR1, USART_CR1_M, DataWidth);
902 }
903 
913 __STATIC_INLINE uint32_t LL_LPUART_GetDataWidth(USART_TypeDef *LPUARTx)
914 {
915  return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_M));
916 }
917 
924 __STATIC_INLINE void LL_LPUART_EnableMuteMode(USART_TypeDef *LPUARTx)
925 {
926  SET_BIT(LPUARTx->CR1, USART_CR1_MME);
927 }
928 
935 __STATIC_INLINE void LL_LPUART_DisableMuteMode(USART_TypeDef *LPUARTx)
936 {
937  CLEAR_BIT(LPUARTx->CR1, USART_CR1_MME);
938 }
939 
946 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledMuteMode(USART_TypeDef *LPUARTx)
947 {
948  return ((READ_BIT(LPUARTx->CR1, USART_CR1_MME) == (USART_CR1_MME)) ? 1UL : 0UL);
949 }
950 
951 #if defined(USART_PRESC_PRESCALER)
952 
971 __STATIC_INLINE void LL_LPUART_SetPrescaler(USART_TypeDef *LPUARTx, uint32_t PrescalerValue)
972 {
973  MODIFY_REG(LPUARTx->PRESC, USART_PRESC_PRESCALER, (uint16_t)PrescalerValue);
974 }
975 
994 __STATIC_INLINE uint32_t LL_LPUART_GetPrescaler(USART_TypeDef *LPUARTx)
995 {
996  return (uint32_t)(READ_BIT(LPUARTx->PRESC, USART_PRESC_PRESCALER));
997 }
998 #endif /* USART_PRESC_PRESCALER */
999 
1009 __STATIC_INLINE void LL_LPUART_SetStopBitsLength(USART_TypeDef *LPUARTx, uint32_t StopBits)
1010 {
1011  MODIFY_REG(LPUARTx->CR2, USART_CR2_STOP, StopBits);
1012 }
1013 
1022 __STATIC_INLINE uint32_t LL_LPUART_GetStopBitsLength(USART_TypeDef *LPUARTx)
1023 {
1024  return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_STOP));
1025 }
1026 
1051 __STATIC_INLINE void LL_LPUART_ConfigCharacter(USART_TypeDef *LPUARTx, uint32_t DataWidth, uint32_t Parity,
1052  uint32_t StopBits)
1053 {
1054  MODIFY_REG(LPUARTx->CR1, USART_CR1_PS | USART_CR1_PCE | USART_CR1_M, Parity | DataWidth);
1055  MODIFY_REG(LPUARTx->CR2, USART_CR2_STOP, StopBits);
1056 }
1057 
1067 __STATIC_INLINE void LL_LPUART_SetTXRXSwap(USART_TypeDef *LPUARTx, uint32_t SwapConfig)
1068 {
1069  MODIFY_REG(LPUARTx->CR2, USART_CR2_SWAP, SwapConfig);
1070 }
1071 
1080 __STATIC_INLINE uint32_t LL_LPUART_GetTXRXSwap(USART_TypeDef *LPUARTx)
1081 {
1082  return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_SWAP));
1083 }
1084 
1094 __STATIC_INLINE void LL_LPUART_SetRXPinLevel(USART_TypeDef *LPUARTx, uint32_t PinInvMethod)
1095 {
1096  MODIFY_REG(LPUARTx->CR2, USART_CR2_RXINV, PinInvMethod);
1097 }
1098 
1107 __STATIC_INLINE uint32_t LL_LPUART_GetRXPinLevel(USART_TypeDef *LPUARTx)
1108 {
1109  return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_RXINV));
1110 }
1111 
1121 __STATIC_INLINE void LL_LPUART_SetTXPinLevel(USART_TypeDef *LPUARTx, uint32_t PinInvMethod)
1122 {
1123  MODIFY_REG(LPUARTx->CR2, USART_CR2_TXINV, PinInvMethod);
1124 }
1125 
1134 __STATIC_INLINE uint32_t LL_LPUART_GetTXPinLevel(USART_TypeDef *LPUARTx)
1135 {
1136  return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_TXINV));
1137 }
1138 
1151 __STATIC_INLINE void LL_LPUART_SetBinaryDataLogic(USART_TypeDef *LPUARTx, uint32_t DataLogic)
1152 {
1153  MODIFY_REG(LPUARTx->CR2, USART_CR2_DATAINV, DataLogic);
1154 }
1155 
1164 __STATIC_INLINE uint32_t LL_LPUART_GetBinaryDataLogic(USART_TypeDef *LPUARTx)
1165 {
1166  return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_DATAINV));
1167 }
1168 
1180 __STATIC_INLINE void LL_LPUART_SetTransferBitOrder(USART_TypeDef *LPUARTx, uint32_t BitOrder)
1181 {
1182  MODIFY_REG(LPUARTx->CR2, USART_CR2_MSBFIRST, BitOrder);
1183 }
1184 
1195 __STATIC_INLINE uint32_t LL_LPUART_GetTransferBitOrder(USART_TypeDef *LPUARTx)
1196 {
1197  return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_MSBFIRST));
1198 }
1199 
1223 __STATIC_INLINE void LL_LPUART_ConfigNodeAddress(USART_TypeDef *LPUARTx, uint32_t AddressLen, uint32_t NodeAddress)
1224 {
1225  MODIFY_REG(LPUARTx->CR2, USART_CR2_ADD | USART_CR2_ADDM7,
1226  (uint32_t)(AddressLen | (NodeAddress << USART_CR2_ADD_Pos)));
1227 }
1228 
1239 __STATIC_INLINE uint32_t LL_LPUART_GetNodeAddress(USART_TypeDef *LPUARTx)
1240 {
1241  return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_ADD) >> USART_CR2_ADD_Pos);
1242 }
1243 
1252 __STATIC_INLINE uint32_t LL_LPUART_GetNodeAddressLen(USART_TypeDef *LPUARTx)
1253 {
1254  return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_ADDM7));
1255 }
1256 
1263 __STATIC_INLINE void LL_LPUART_EnableRTSHWFlowCtrl(USART_TypeDef *LPUARTx)
1264 {
1265  SET_BIT(LPUARTx->CR3, USART_CR3_RTSE);
1266 }
1267 
1274 __STATIC_INLINE void LL_LPUART_DisableRTSHWFlowCtrl(USART_TypeDef *LPUARTx)
1275 {
1276  CLEAR_BIT(LPUARTx->CR3, USART_CR3_RTSE);
1277 }
1278 
1285 __STATIC_INLINE void LL_LPUART_EnableCTSHWFlowCtrl(USART_TypeDef *LPUARTx)
1286 {
1287  SET_BIT(LPUARTx->CR3, USART_CR3_CTSE);
1288 }
1289 
1296 __STATIC_INLINE void LL_LPUART_DisableCTSHWFlowCtrl(USART_TypeDef *LPUARTx)
1297 {
1298  CLEAR_BIT(LPUARTx->CR3, USART_CR3_CTSE);
1299 }
1300 
1313 __STATIC_INLINE void LL_LPUART_SetHWFlowCtrl(USART_TypeDef *LPUARTx, uint32_t HardwareFlowControl)
1314 {
1315  MODIFY_REG(LPUARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl);
1316 }
1317 
1329 __STATIC_INLINE uint32_t LL_LPUART_GetHWFlowCtrl(USART_TypeDef *LPUARTx)
1330 {
1331  return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE));
1332 }
1333 
1340 __STATIC_INLINE void LL_LPUART_EnableOverrunDetect(USART_TypeDef *LPUARTx)
1341 {
1342  CLEAR_BIT(LPUARTx->CR3, USART_CR3_OVRDIS);
1343 }
1344 
1351 __STATIC_INLINE void LL_LPUART_DisableOverrunDetect(USART_TypeDef *LPUARTx)
1352 {
1353  SET_BIT(LPUARTx->CR3, USART_CR3_OVRDIS);
1354 }
1355 
1362 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledOverrunDetect(USART_TypeDef *LPUARTx)
1363 {
1364  return ((READ_BIT(LPUARTx->CR3, USART_CR3_OVRDIS) != USART_CR3_OVRDIS) ? 1UL : 0UL);
1365 }
1366 
1377 __STATIC_INLINE void LL_LPUART_SetWKUPType(USART_TypeDef *LPUARTx, uint32_t Type)
1378 {
1379  MODIFY_REG(LPUARTx->CR3, USART_CR3_WUS, Type);
1380 }
1381 
1391 __STATIC_INLINE uint32_t LL_LPUART_GetWKUPType(USART_TypeDef *LPUARTx)
1392 {
1393  return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_WUS));
1394 }
1395 
1427 #if defined(USART_PRESC_PRESCALER)
1428 __STATIC_INLINE void LL_LPUART_SetBaudRate(USART_TypeDef *LPUARTx, uint32_t PeriphClk, uint32_t PrescalerValue,
1429  uint32_t BaudRate)
1430 #else
1431 __STATIC_INLINE void LL_LPUART_SetBaudRate(USART_TypeDef *LPUARTx, uint32_t PeriphClk, uint32_t BaudRate)
1432 #endif /* USART_PRESC_PRESCALER */
1434 #if defined(USART_PRESC_PRESCALER)
1435  LPUARTx->BRR = __LL_LPUART_DIV(PeriphClk, PrescalerValue, BaudRate);
1436 #else
1437  LPUARTx->BRR = __LL_LPUART_DIV(PeriphClk, BaudRate);
1438 #endif /* USART_PRESC_PRESCALER */
1439 }
1440 
1465 #if defined(USART_PRESC_PRESCALER)
1466 __STATIC_INLINE uint32_t LL_LPUART_GetBaudRate(USART_TypeDef *LPUARTx, uint32_t PeriphClk, uint32_t PrescalerValue)
1467 #else
1468 __STATIC_INLINE uint32_t LL_LPUART_GetBaudRate(USART_TypeDef *LPUARTx, uint32_t PeriphClk)
1469 #endif /* USART_PRESC_PRESCALER */
1470 {
1471  register uint32_t lpuartdiv;
1472  register uint32_t brrresult;
1473 #if defined(USART_PRESC_PRESCALER)
1474  register uint32_t periphclkpresc = (uint32_t)(PeriphClk / (LPUART_PRESCALER_TAB[(uint16_t)PrescalerValue]));
1475 #endif /* USART_PRESC_PRESCALER */
1476 
1477  lpuartdiv = LPUARTx->BRR & LPUART_BRR_MASK;
1478 
1479  if (lpuartdiv >= LPUART_BRR_MIN_VALUE)
1480  {
1481 #if defined(USART_PRESC_PRESCALER)
1482  brrresult = (uint32_t)(((uint64_t)(periphclkpresc) * LPUART_LPUARTDIV_FREQ_MUL) / lpuartdiv);
1483 #else
1484  brrresult = (uint32_t)(((uint64_t)(PeriphClk) * LPUART_LPUARTDIV_FREQ_MUL) / lpuartdiv);
1485 #endif /* USART_PRESC_PRESCALER */
1486  }
1487  else
1488  {
1489  brrresult = 0x0UL;
1490  }
1491 
1492  return (brrresult);
1493 }
1494 
1509 __STATIC_INLINE void LL_LPUART_EnableHalfDuplex(USART_TypeDef *LPUARTx)
1510 {
1511  SET_BIT(LPUARTx->CR3, USART_CR3_HDSEL);
1512 }
1513 
1520 __STATIC_INLINE void LL_LPUART_DisableHalfDuplex(USART_TypeDef *LPUARTx)
1521 {
1522  CLEAR_BIT(LPUARTx->CR3, USART_CR3_HDSEL);
1523 }
1524 
1531 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledHalfDuplex(USART_TypeDef *LPUARTx)
1532 {
1533  return ((READ_BIT(LPUARTx->CR3, USART_CR3_HDSEL) == (USART_CR3_HDSEL)) ? 1UL : 0UL);
1534 }
1535 
1551 __STATIC_INLINE void LL_LPUART_SetDEDeassertionTime(USART_TypeDef *LPUARTx, uint32_t Time)
1552 {
1553  MODIFY_REG(LPUARTx->CR1, USART_CR1_DEDT, Time << USART_CR1_DEDT_Pos);
1554 }
1555 
1562 __STATIC_INLINE uint32_t LL_LPUART_GetDEDeassertionTime(USART_TypeDef *LPUARTx)
1563 {
1564  return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_DEDT) >> USART_CR1_DEDT_Pos);
1565 }
1566 
1574 __STATIC_INLINE void LL_LPUART_SetDEAssertionTime(USART_TypeDef *LPUARTx, uint32_t Time)
1575 {
1576  MODIFY_REG(LPUARTx->CR1, USART_CR1_DEAT, Time << USART_CR1_DEAT_Pos);
1577 }
1578 
1585 __STATIC_INLINE uint32_t LL_LPUART_GetDEAssertionTime(USART_TypeDef *LPUARTx)
1586 {
1587  return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_DEAT) >> USART_CR1_DEAT_Pos);
1588 }
1589 
1596 __STATIC_INLINE void LL_LPUART_EnableDEMode(USART_TypeDef *LPUARTx)
1597 {
1598  SET_BIT(LPUARTx->CR3, USART_CR3_DEM);
1599 }
1600 
1607 __STATIC_INLINE void LL_LPUART_DisableDEMode(USART_TypeDef *LPUARTx)
1608 {
1609  CLEAR_BIT(LPUARTx->CR3, USART_CR3_DEM);
1610 }
1611 
1618 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledDEMode(USART_TypeDef *LPUARTx)
1619 {
1620  return ((READ_BIT(LPUARTx->CR3, USART_CR3_DEM) == (USART_CR3_DEM)) ? 1UL : 0UL);
1621 }
1622 
1632 __STATIC_INLINE void LL_LPUART_SetDESignalPolarity(USART_TypeDef *LPUARTx, uint32_t Polarity)
1633 {
1634  MODIFY_REG(LPUARTx->CR3, USART_CR3_DEP, Polarity);
1635 }
1636 
1645 __STATIC_INLINE uint32_t LL_LPUART_GetDESignalPolarity(USART_TypeDef *LPUARTx)
1646 {
1647  return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_DEP));
1648 }
1649 
1664 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_PE(USART_TypeDef *LPUARTx)
1665 {
1666  return ((READ_BIT(LPUARTx->ISR, USART_ISR_PE) == (USART_ISR_PE)) ? 1UL : 0UL);
1667 }
1668 
1675 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_FE(USART_TypeDef *LPUARTx)
1676 {
1677  return ((READ_BIT(LPUARTx->ISR, USART_ISR_FE) == (USART_ISR_FE)) ? 1UL : 0UL);
1678 }
1679 
1686 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_NE(USART_TypeDef *LPUARTx)
1687 {
1688  return ((READ_BIT(LPUARTx->ISR, USART_ISR_NE) == (USART_ISR_NE)) ? 1UL : 0UL);
1689 }
1690 
1697 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_ORE(USART_TypeDef *LPUARTx)
1698 {
1699  return ((READ_BIT(LPUARTx->ISR, USART_ISR_ORE) == (USART_ISR_ORE)) ? 1UL : 0UL);
1700 }
1701 
1708 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_IDLE(USART_TypeDef *LPUARTx)
1709 {
1710  return ((READ_BIT(LPUARTx->ISR, USART_ISR_IDLE) == (USART_ISR_IDLE)) ? 1UL : 0UL);
1711 }
1712 
1713 #if defined(USART_CR1_FIFOEN)
1714 /* Legacy define */
1715 #define LL_LPUART_IsActiveFlag_RXNE LL_LPUART_IsActiveFlag_RXNE_RXFNE
1716 
1723 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RXNE_RXFNE(USART_TypeDef *LPUARTx)
1724 {
1725  return ((READ_BIT(LPUARTx->ISR, USART_ISR_RXNE_RXFNE) == (USART_ISR_RXNE_RXFNE)) ? 1UL : 0UL);
1726 }
1727 #else
1728 
1734 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RXNE(USART_TypeDef *LPUARTx)
1735 {
1736  return ((READ_BIT(LPUARTx->ISR, USART_ISR_RXNE) == (USART_ISR_RXNE)) ? 1UL : 0UL);
1737 }
1738 #endif /* USART_CR1_FIFOEN */
1739 
1746 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TC(USART_TypeDef *LPUARTx)
1747 {
1748  return ((READ_BIT(LPUARTx->ISR, USART_ISR_TC) == (USART_ISR_TC)) ? 1UL : 0UL);
1749 }
1750 
1751 #if defined(USART_CR1_FIFOEN)
1752 /* Legacy define */
1753 #define LL_LPUART_IsActiveFlag_TXE LL_LPUART_IsActiveFlag_TXE_TXFNF
1754 
1761 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TXE_TXFNF(USART_TypeDef *LPUARTx)
1762 {
1763  return ((READ_BIT(LPUARTx->ISR, USART_ISR_TXE_TXFNF) == (USART_ISR_TXE_TXFNF)) ? 1UL : 0UL);
1764 }
1765 #else
1766 
1772 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TXE(USART_TypeDef *LPUARTx)
1773 {
1774  return ((READ_BIT(LPUARTx->ISR, USART_ISR_TXE) == (USART_ISR_TXE)) ? 1UL : 0UL);
1775 }
1776 #endif /* USART_CR1_FIFOEN */
1777 
1784 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_nCTS(USART_TypeDef *LPUARTx)
1785 {
1786  return ((READ_BIT(LPUARTx->ISR, USART_ISR_CTSIF) == (USART_ISR_CTSIF)) ? 1UL : 0UL);
1787 }
1788 
1795 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_CTS(USART_TypeDef *LPUARTx)
1796 {
1797  return ((READ_BIT(LPUARTx->ISR, USART_ISR_CTS) == (USART_ISR_CTS)) ? 1UL : 0UL);
1798 }
1799 
1806 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_BUSY(USART_TypeDef *LPUARTx)
1807 {
1808  return ((READ_BIT(LPUARTx->ISR, USART_ISR_BUSY) == (USART_ISR_BUSY)) ? 1UL : 0UL);
1809 }
1810 
1817 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_CM(USART_TypeDef *LPUARTx)
1818 {
1819  return ((READ_BIT(LPUARTx->ISR, USART_ISR_CMF) == (USART_ISR_CMF)) ? 1UL : 0UL);
1820 }
1821 
1828 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_SBK(USART_TypeDef *LPUARTx)
1829 {
1830  return ((READ_BIT(LPUARTx->ISR, USART_ISR_SBKF) == (USART_ISR_SBKF)) ? 1UL : 0UL);
1831 }
1832 
1839 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RWU(USART_TypeDef *LPUARTx)
1840 {
1841  return ((READ_BIT(LPUARTx->ISR, USART_ISR_RWU) == (USART_ISR_RWU)) ? 1UL : 0UL);
1842 }
1843 
1850 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_WKUP(USART_TypeDef *LPUARTx)
1851 {
1852  return ((READ_BIT(LPUARTx->ISR, USART_ISR_WUF) == (USART_ISR_WUF)) ? 1UL : 0UL);
1853 }
1854 
1861 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TEACK(USART_TypeDef *LPUARTx)
1862 {
1863  return ((READ_BIT(LPUARTx->ISR, USART_ISR_TEACK) == (USART_ISR_TEACK)) ? 1UL : 0UL);
1864 }
1865 
1872 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_REACK(USART_TypeDef *LPUARTx)
1873 {
1874  return ((READ_BIT(LPUARTx->ISR, USART_ISR_REACK) == (USART_ISR_REACK)) ? 1UL : 0UL);
1875 }
1876 
1877 #if defined(USART_CR1_FIFOEN)
1878 
1884 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TXFE(USART_TypeDef *LPUARTx)
1885 {
1886  return ((READ_BIT(LPUARTx->ISR, USART_ISR_TXFE) == (USART_ISR_TXFE)) ? 1UL : 0UL);
1887 }
1888 
1895 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RXFF(USART_TypeDef *LPUARTx)
1896 {
1897  return ((READ_BIT(LPUARTx->ISR, USART_ISR_RXFF) == (USART_ISR_RXFF)) ? 1UL : 0UL);
1898 }
1899 
1906 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TXFT(USART_TypeDef *LPUARTx)
1907 {
1908  return ((READ_BIT(LPUARTx->ISR, USART_ISR_TXFT) == (USART_ISR_TXFT)) ? 1UL : 0UL);
1909 }
1910 
1917 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RXFT(USART_TypeDef *LPUARTx)
1918 {
1919  return ((READ_BIT(LPUARTx->ISR, USART_ISR_RXFT) == (USART_ISR_RXFT)) ? 1UL : 0UL);
1920 }
1921 #endif /* USART_CR1_FIFOEN */
1922 
1929 __STATIC_INLINE void LL_LPUART_ClearFlag_PE(USART_TypeDef *LPUARTx)
1930 {
1931  WRITE_REG(LPUARTx->ICR, USART_ICR_PECF);
1932 }
1933 
1940 __STATIC_INLINE void LL_LPUART_ClearFlag_FE(USART_TypeDef *LPUARTx)
1941 {
1942  WRITE_REG(LPUARTx->ICR, USART_ICR_FECF);
1943 }
1944 
1951 __STATIC_INLINE void LL_LPUART_ClearFlag_NE(USART_TypeDef *LPUARTx)
1952 {
1953  WRITE_REG(LPUARTx->ICR, USART_ICR_NECF);
1954 }
1955 
1962 __STATIC_INLINE void LL_LPUART_ClearFlag_ORE(USART_TypeDef *LPUARTx)
1963 {
1964  WRITE_REG(LPUARTx->ICR, USART_ICR_ORECF);
1965 }
1966 
1973 __STATIC_INLINE void LL_LPUART_ClearFlag_IDLE(USART_TypeDef *LPUARTx)
1974 {
1975  WRITE_REG(LPUARTx->ICR, USART_ICR_IDLECF);
1976 }
1977 
1978 #if defined(USART_CR1_FIFOEN)
1979 
1985 __STATIC_INLINE void LL_LPUART_ClearFlag_TXFE(USART_TypeDef *LPUARTx)
1986 {
1987  WRITE_REG(LPUARTx->ICR, USART_ICR_TXFECF);
1988 }
1989 #endif /* USART_CR1_FIFOEN */
1990 
1997 __STATIC_INLINE void LL_LPUART_ClearFlag_TC(USART_TypeDef *LPUARTx)
1998 {
1999  WRITE_REG(LPUARTx->ICR, USART_ICR_TCCF);
2000 }
2001 
2008 __STATIC_INLINE void LL_LPUART_ClearFlag_nCTS(USART_TypeDef *LPUARTx)
2009 {
2010  WRITE_REG(LPUARTx->ICR, USART_ICR_CTSCF);
2011 }
2012 
2019 __STATIC_INLINE void LL_LPUART_ClearFlag_CM(USART_TypeDef *LPUARTx)
2020 {
2021  WRITE_REG(LPUARTx->ICR, USART_ICR_CMCF);
2022 }
2023 
2030 __STATIC_INLINE void LL_LPUART_ClearFlag_WKUP(USART_TypeDef *LPUARTx)
2031 {
2032  WRITE_REG(LPUARTx->ICR, USART_ICR_WUCF);
2033 }
2034 
2049 __STATIC_INLINE void LL_LPUART_EnableIT_IDLE(USART_TypeDef *LPUARTx)
2050 {
2051  SET_BIT(LPUARTx->CR1, USART_CR1_IDLEIE);
2052 }
2053 
2054 #if defined(USART_CR1_FIFOEN)
2055 /* Legacy define */
2056 #define LL_LPUART_EnableIT_RXNE LL_LPUART_EnableIT_RXNE_RXFNE
2057 
2064 __STATIC_INLINE void LL_LPUART_EnableIT_RXNE_RXFNE(USART_TypeDef *LPUARTx)
2065 {
2066  SET_BIT(LPUARTx->CR1, USART_CR1_RXNEIE_RXFNEIE);
2067 }
2068 #else
2069 
2076 __STATIC_INLINE void LL_LPUART_EnableIT_RXNE(USART_TypeDef *LPUARTx)
2077 {
2078  SET_BIT(LPUARTx->CR1, USART_CR1_RXNEIE);
2079 }
2080 #endif /* USART_CR1_FIFOEN */
2081 
2088 __STATIC_INLINE void LL_LPUART_EnableIT_TC(USART_TypeDef *LPUARTx)
2089 {
2090  SET_BIT(LPUARTx->CR1, USART_CR1_TCIE);
2091 }
2092 
2093 #if defined(USART_CR1_FIFOEN)
2094 /* Legacy define */
2095 #define LL_LPUART_EnableIT_TXE LL_LPUART_EnableIT_TXE_TXFNF
2096 
2103 __STATIC_INLINE void LL_LPUART_EnableIT_TXE_TXFNF(USART_TypeDef *LPUARTx)
2104 {
2105  SET_BIT(LPUARTx->CR1, USART_CR1_TXEIE_TXFNFIE);
2106 }
2107 #else
2108 
2115 __STATIC_INLINE void LL_LPUART_EnableIT_TXE(USART_TypeDef *LPUARTx)
2116 {
2117  SET_BIT(LPUARTx->CR1, USART_CR1_TXEIE);
2118 }
2119 #endif /* USART_CR1_FIFOEN */
2120 
2127 __STATIC_INLINE void LL_LPUART_EnableIT_PE(USART_TypeDef *LPUARTx)
2128 {
2129  SET_BIT(LPUARTx->CR1, USART_CR1_PEIE);
2130 }
2131 
2138 __STATIC_INLINE void LL_LPUART_EnableIT_CM(USART_TypeDef *LPUARTx)
2139 {
2140  SET_BIT(LPUARTx->CR1, USART_CR1_CMIE);
2141 }
2142 
2143 #if defined(USART_CR1_FIFOEN)
2144 
2150 __STATIC_INLINE void LL_LPUART_EnableIT_TXFE(USART_TypeDef *LPUARTx)
2151 {
2152  SET_BIT(LPUARTx->CR1, USART_CR1_TXFEIE);
2153 }
2154 
2161 __STATIC_INLINE void LL_LPUART_EnableIT_RXFF(USART_TypeDef *LPUARTx)
2162 {
2163  SET_BIT(LPUARTx->CR1, USART_CR1_RXFFIE);
2164 }
2165 #endif /* USART_CR1_FIFOEN */
2166 
2177 __STATIC_INLINE void LL_LPUART_EnableIT_ERROR(USART_TypeDef *LPUARTx)
2178 {
2179  SET_BIT(LPUARTx->CR3, USART_CR3_EIE);
2180 }
2181 
2188 __STATIC_INLINE void LL_LPUART_EnableIT_CTS(USART_TypeDef *LPUARTx)
2189 {
2190  SET_BIT(LPUARTx->CR3, USART_CR3_CTSIE);
2191 }
2192 
2199 __STATIC_INLINE void LL_LPUART_EnableIT_WKUP(USART_TypeDef *LPUARTx)
2200 {
2201  SET_BIT(LPUARTx->CR3, USART_CR3_WUFIE);
2202 }
2203 
2204 #if defined(USART_CR1_FIFOEN)
2205 
2211 __STATIC_INLINE void LL_LPUART_EnableIT_TXFT(USART_TypeDef *LPUARTx)
2212 {
2213  SET_BIT(LPUARTx->CR3, USART_CR3_TXFTIE);
2214 }
2215 
2222 __STATIC_INLINE void LL_LPUART_EnableIT_RXFT(USART_TypeDef *LPUARTx)
2223 {
2224  SET_BIT(LPUARTx->CR3, USART_CR3_RXFTIE);
2225 }
2226 #endif /* USART_CR1_FIFOEN */
2227 
2234 __STATIC_INLINE void LL_LPUART_DisableIT_IDLE(USART_TypeDef *LPUARTx)
2235 {
2236  CLEAR_BIT(LPUARTx->CR1, USART_CR1_IDLEIE);
2237 }
2238 
2239 #if defined(USART_CR1_FIFOEN)
2240 /* Legacy define */
2241 #define LL_LPUART_DisableIT_RXNE LL_LPUART_DisableIT_RXNE_RXFNE
2242 
2249 __STATIC_INLINE void LL_LPUART_DisableIT_RXNE_RXFNE(USART_TypeDef *LPUARTx)
2250 {
2251  CLEAR_BIT(LPUARTx->CR1, USART_CR1_RXNEIE_RXFNEIE);
2252 }
2253 #else
2254 
2261 __STATIC_INLINE void LL_LPUART_DisableIT_RXNE(USART_TypeDef *LPUARTx)
2262 {
2263  CLEAR_BIT(LPUARTx->CR1, USART_CR1_RXNEIE);
2264 }
2265 #endif /* USART_CR1_FIFOEN */
2266 
2273 __STATIC_INLINE void LL_LPUART_DisableIT_TC(USART_TypeDef *LPUARTx)
2274 {
2275  CLEAR_BIT(LPUARTx->CR1, USART_CR1_TCIE);
2276 }
2277 
2278 #if defined(USART_CR1_FIFOEN)
2279 /* Legacy define */
2280 #define LL_LPUART_DisableIT_TXE LL_LPUART_DisableIT_TXE_TXFNF
2281 
2288 __STATIC_INLINE void LL_LPUART_DisableIT_TXE_TXFNF(USART_TypeDef *LPUARTx)
2289 {
2290  CLEAR_BIT(LPUARTx->CR1, USART_CR1_TXEIE_TXFNFIE);
2291 }
2292 #else
2293 
2300 __STATIC_INLINE void LL_LPUART_DisableIT_TXE(USART_TypeDef *LPUARTx)
2301 {
2302  CLEAR_BIT(LPUARTx->CR1, USART_CR1_TXEIE);
2303 }
2304 #endif /* USART_CR1_FIFOEN */
2305 
2312 __STATIC_INLINE void LL_LPUART_DisableIT_PE(USART_TypeDef *LPUARTx)
2313 {
2314  CLEAR_BIT(LPUARTx->CR1, USART_CR1_PEIE);
2315 }
2316 
2323 __STATIC_INLINE void LL_LPUART_DisableIT_CM(USART_TypeDef *LPUARTx)
2324 {
2325  CLEAR_BIT(LPUARTx->CR1, USART_CR1_CMIE);
2326 }
2327 
2328 #if defined(USART_CR1_FIFOEN)
2329 
2335 __STATIC_INLINE void LL_LPUART_DisableIT_TXFE(USART_TypeDef *LPUARTx)
2336 {
2337  CLEAR_BIT(LPUARTx->CR1, USART_CR1_TXFEIE);
2338 }
2339 
2346 __STATIC_INLINE void LL_LPUART_DisableIT_RXFF(USART_TypeDef *LPUARTx)
2347 {
2348  CLEAR_BIT(LPUARTx->CR1, USART_CR1_RXFFIE);
2349 }
2350 #endif /* USART_CR1_FIFOEN */
2351 
2362 __STATIC_INLINE void LL_LPUART_DisableIT_ERROR(USART_TypeDef *LPUARTx)
2363 {
2364  CLEAR_BIT(LPUARTx->CR3, USART_CR3_EIE);
2365 }
2366 
2373 __STATIC_INLINE void LL_LPUART_DisableIT_CTS(USART_TypeDef *LPUARTx)
2374 {
2375  CLEAR_BIT(LPUARTx->CR3, USART_CR3_CTSIE);
2376 }
2377 
2384 __STATIC_INLINE void LL_LPUART_DisableIT_WKUP(USART_TypeDef *LPUARTx)
2385 {
2386  CLEAR_BIT(LPUARTx->CR3, USART_CR3_WUFIE);
2387 }
2388 
2389 #if defined(USART_CR1_FIFOEN)
2390 
2396 __STATIC_INLINE void LL_LPUART_DisableIT_TXFT(USART_TypeDef *LPUARTx)
2397 {
2398  CLEAR_BIT(LPUARTx->CR3, USART_CR3_TXFTIE);
2399 }
2400 
2407 __STATIC_INLINE void LL_LPUART_DisableIT_RXFT(USART_TypeDef *LPUARTx)
2408 {
2409  CLEAR_BIT(LPUARTx->CR3, USART_CR3_RXFTIE);
2410 }
2411 #endif /* USART_CR1_FIFOEN */
2412 
2419 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_IDLE(USART_TypeDef *LPUARTx)
2420 {
2421  return ((READ_BIT(LPUARTx->CR1, USART_CR1_IDLEIE) == (USART_CR1_IDLEIE)) ? 1UL : 0UL);
2422 }
2423 
2424 #if defined(USART_CR1_FIFOEN)
2425 /* Legacy define */
2426 #define LL_LPUART_IsEnabledIT_RXNE LL_LPUART_IsEnabledIT_RXNE_RXFNE
2427 
2434 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_RXNE_RXFNE(USART_TypeDef *LPUARTx)
2435 {
2436  return ((READ_BIT(LPUARTx->CR1, USART_CR1_RXNEIE_RXFNEIE) == (USART_CR1_RXNEIE_RXFNEIE)) ? 1UL : 0UL);
2437 }
2438 #else
2439 
2446 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_RXNE(USART_TypeDef *LPUARTx)
2447 {
2448  return ((READ_BIT(LPUARTx->CR1, USART_CR1_RXNEIE) == (USART_CR1_RXNEIE)) ? 1UL : 0UL);
2449 }
2450 #endif /* USART_CR1_FIFOEN */
2451 
2458 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TC(USART_TypeDef *LPUARTx)
2459 {
2460  return ((READ_BIT(LPUARTx->CR1, USART_CR1_TCIE) == (USART_CR1_TCIE)) ? 1UL : 0UL);
2461 }
2462 
2463 #if defined(USART_CR1_FIFOEN)
2464 /* Legacy define */
2465 #define LL_LPUART_IsEnabledIT_TXE LL_LPUART_IsEnabledIT_TXE_TXFNF
2466 
2473 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TXE_TXFNF(USART_TypeDef *LPUARTx)
2474 {
2475  return ((READ_BIT(LPUARTx->CR1, USART_CR1_TXEIE_TXFNFIE) == (USART_CR1_TXEIE_TXFNFIE)) ? 1UL : 0UL);
2476 }
2477 #else
2478 
2485 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TXE(USART_TypeDef *LPUARTx)
2486 {
2487  return ((READ_BIT(LPUARTx->CR1, USART_CR1_TXEIE) == (USART_CR1_TXEIE)) ? 1UL : 0UL);
2488 }
2489 #endif /* USART_CR1_FIFOEN */
2490 
2497 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_PE(USART_TypeDef *LPUARTx)
2498 {
2499  return ((READ_BIT(LPUARTx->CR1, USART_CR1_PEIE) == (USART_CR1_PEIE)) ? 1UL : 0UL);
2500 }
2501 
2508 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_CM(USART_TypeDef *LPUARTx)
2509 {
2510  return ((READ_BIT(LPUARTx->CR1, USART_CR1_CMIE) == (USART_CR1_CMIE)) ? 1UL : 0UL);
2511 }
2512 
2513 #if defined(USART_CR1_FIFOEN)
2514 
2520 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TXFE(USART_TypeDef *LPUARTx)
2521 {
2522  return ((READ_BIT(LPUARTx->CR1, USART_CR1_TXFEIE) == (USART_CR1_TXFEIE)) ? 1UL : 0UL);
2523 }
2524 
2531 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_RXFF(USART_TypeDef *LPUARTx)
2532 {
2533  return ((READ_BIT(LPUARTx->CR1, USART_CR1_RXFFIE) == (USART_CR1_RXFFIE)) ? 1UL : 0UL);
2534 }
2535 #endif /* USART_CR1_FIFOEN */
2536 
2543 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_ERROR(USART_TypeDef *LPUARTx)
2544 {
2545  return ((READ_BIT(LPUARTx->CR3, USART_CR3_EIE) == (USART_CR3_EIE)) ? 1UL : 0UL);
2546 }
2547 
2554 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_CTS(USART_TypeDef *LPUARTx)
2555 {
2556  return ((READ_BIT(LPUARTx->CR3, USART_CR3_CTSIE) == (USART_CR3_CTSIE)) ? 1UL : 0UL);
2557 }
2558 
2565 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_WKUP(USART_TypeDef *LPUARTx)
2566 {
2567  return ((READ_BIT(LPUARTx->CR3, USART_CR3_WUFIE) == (USART_CR3_WUFIE)) ? 1UL : 0UL);
2568 }
2569 
2570 #if defined(USART_CR1_FIFOEN)
2571 
2577 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TXFT(USART_TypeDef *LPUARTx)
2578 {
2579  return ((READ_BIT(LPUARTx->CR3, USART_CR3_TXFTIE) == (USART_CR3_TXFTIE)) ? 1UL : 0UL);
2580 }
2581 
2588 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_RXFT(USART_TypeDef *LPUARTx)
2589 {
2590  return ((READ_BIT(LPUARTx->CR3, USART_CR3_RXFTIE) == (USART_CR3_RXFTIE)) ? 1UL : 0UL);
2591 }
2592 #endif /* USART_CR1_FIFOEN */
2593 
2608 __STATIC_INLINE void LL_LPUART_EnableDMAReq_RX(USART_TypeDef *LPUARTx)
2609 {
2610  SET_BIT(LPUARTx->CR3, USART_CR3_DMAR);
2611 }
2612 
2619 __STATIC_INLINE void LL_LPUART_DisableDMAReq_RX(USART_TypeDef *LPUARTx)
2620 {
2621  CLEAR_BIT(LPUARTx->CR3, USART_CR3_DMAR);
2622 }
2623 
2630 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledDMAReq_RX(USART_TypeDef *LPUARTx)
2631 {
2632  return ((READ_BIT(LPUARTx->CR3, USART_CR3_DMAR) == (USART_CR3_DMAR)) ? 1UL : 0UL);
2633 }
2634 
2641 __STATIC_INLINE void LL_LPUART_EnableDMAReq_TX(USART_TypeDef *LPUARTx)
2642 {
2643  SET_BIT(LPUARTx->CR3, USART_CR3_DMAT);
2644 }
2645 
2652 __STATIC_INLINE void LL_LPUART_DisableDMAReq_TX(USART_TypeDef *LPUARTx)
2653 {
2654  CLEAR_BIT(LPUARTx->CR3, USART_CR3_DMAT);
2655 }
2656 
2663 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledDMAReq_TX(USART_TypeDef *LPUARTx)
2664 {
2665  return ((READ_BIT(LPUARTx->CR3, USART_CR3_DMAT) == (USART_CR3_DMAT)) ? 1UL : 0UL);
2666 }
2667 
2674 __STATIC_INLINE void LL_LPUART_EnableDMADeactOnRxErr(USART_TypeDef *LPUARTx)
2675 {
2676  SET_BIT(LPUARTx->CR3, USART_CR3_DDRE);
2677 }
2678 
2685 __STATIC_INLINE void LL_LPUART_DisableDMADeactOnRxErr(USART_TypeDef *LPUARTx)
2686 {
2687  CLEAR_BIT(LPUARTx->CR3, USART_CR3_DDRE);
2688 }
2689 
2696 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledDMADeactOnRxErr(USART_TypeDef *LPUARTx)
2697 {
2698  return ((READ_BIT(LPUARTx->CR3, USART_CR3_DDRE) == (USART_CR3_DDRE)) ? 1UL : 0UL);
2699 }
2700 
2711 __STATIC_INLINE uint32_t LL_LPUART_DMA_GetRegAddr(USART_TypeDef *LPUARTx, uint32_t Direction)
2712 {
2713  register uint32_t data_reg_addr;
2714 
2715  if (Direction == LL_LPUART_DMA_REG_DATA_TRANSMIT)
2716  {
2717  /* return address of TDR register */
2718  data_reg_addr = (uint32_t) &(LPUARTx->TDR);
2719  }
2720  else
2721  {
2722  /* return address of RDR register */
2723  data_reg_addr = (uint32_t) &(LPUARTx->RDR);
2724  }
2725 
2726  return data_reg_addr;
2727 }
2728 
2743 __STATIC_INLINE uint8_t LL_LPUART_ReceiveData8(USART_TypeDef *LPUARTx)
2744 {
2745  return (uint8_t)(READ_BIT(LPUARTx->RDR, USART_RDR_RDR) & 0xFFU);
2746 }
2747 
2754 __STATIC_INLINE uint16_t LL_LPUART_ReceiveData9(USART_TypeDef *LPUARTx)
2755 {
2756  return (uint16_t)(READ_BIT(LPUARTx->RDR, USART_RDR_RDR));
2757 }
2758 
2766 __STATIC_INLINE void LL_LPUART_TransmitData8(USART_TypeDef *LPUARTx, uint8_t Value)
2767 {
2768  LPUARTx->TDR = Value;
2769 }
2770 
2778 __STATIC_INLINE void LL_LPUART_TransmitData9(USART_TypeDef *LPUARTx, uint16_t Value)
2779 {
2780  LPUARTx->TDR = Value & 0x1FFUL;
2781 }
2782 
2797 __STATIC_INLINE void LL_LPUART_RequestBreakSending(USART_TypeDef *LPUARTx)
2798 {
2799  SET_BIT(LPUARTx->RQR, (uint16_t)USART_RQR_SBKRQ);
2800 }
2801 
2808 __STATIC_INLINE void LL_LPUART_RequestEnterMuteMode(USART_TypeDef *LPUARTx)
2809 {
2810  SET_BIT(LPUARTx->RQR, (uint16_t)USART_RQR_MMRQ);
2811 }
2812 
2825 __STATIC_INLINE void LL_LPUART_RequestRxDataFlush(USART_TypeDef *LPUARTx)
2826 {
2827  SET_BIT(LPUARTx->RQR, (uint16_t)USART_RQR_RXFRQ);
2828 }
2829 
2834 #if defined(USE_FULL_LL_DRIVER)
2835 
2838 ErrorStatus LL_LPUART_DeInit(USART_TypeDef *LPUARTx);
2839 ErrorStatus LL_LPUART_Init(USART_TypeDef *LPUARTx, LL_LPUART_InitTypeDef *LPUART_InitStruct);
2840 void LL_LPUART_StructInit(LL_LPUART_InitTypeDef *LPUART_InitStruct);
2844 #endif /* USE_FULL_LL_DRIVER */
2845 
2854 #endif /* LPUART1 */
2855 
2860 #ifdef __cplusplus
2861 }
2862 #endif
2863 
2864 #endif /* STM32L4xx_LL_LPUART_H */
2865 
2866 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
__STATIC_INLINE uint32_t LL_LPUART_IsEnabledHalfDuplex(USART_TypeDef *LPUARTx)
Indicate if Single Wire Half-Duplex mode is enabled CR3 HDSEL LL_LPUART_IsEnabledHalfDuplex.
__STATIC_INLINE void LL_LPUART_EnableIT_TC(USART_TypeDef *LPUARTx)
Enable Transmission Complete Interrupt CR1 TCIE LL_LPUART_EnableIT_TC.
__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_PE(USART_TypeDef *LPUARTx)
Check if the LPUART Parity Error Flag is set or not ISR PE LL_LPUART_IsActiveFlag_PE.
__STATIC_INLINE void LL_LPUART_SetDataWidth(USART_TypeDef *LPUARTx, uint32_t DataWidth)
Set Word length (nb of data bits, excluding start and stop bits) CR1 M LL_LPUART_SetDataWidth.
__STATIC_INLINE void LL_LPUART_DisableIT_TC(USART_TypeDef *LPUARTx)
Disable Transmission Complete Interrupt CR1 TCIE LL_LPUART_DisableIT_TC.
__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_IDLE(USART_TypeDef *LPUARTx)
Check if the LPUART IDLE line detected Flag is set or not ISR IDLE LL_LPUART_IsActiveFlag_IDLE.
__STATIC_INLINE void LL_LPUART_DisableDMAReq_RX(USART_TypeDef *LPUARTx)
Disable DMA Mode for reception CR3 DMAR LL_LPUART_DisableDMAReq_RX.
__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_NE(USART_TypeDef *LPUARTx)
Check if the LPUART Noise error detected Flag is set or not ISR NE LL_LPUART_IsActiveFlag_NE.
__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TXFT(USART_TypeDef *LPUARTx)
Check if LPUART TX FIFO Threshold Interrupt is enabled or disabled CR3 TXFTIE LL_LPUART_IsEnabledIT_...
__STATIC_INLINE void LL_LPUART_DisableDirectionRx(USART_TypeDef *LPUARTx)
Receiver Disable CR1 RE LL_LPUART_DisableDirectionRx.
__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_BUSY(USART_TypeDef *LPUARTx)
Check if the LPUART Busy Flag is set or not ISR BUSY LL_LPUART_IsActiveFlag_BUSY.
__STATIC_INLINE void LL_LPUART_DisableIT_RXNE(USART_TypeDef *LPUARTx)
Disable RX Not Empty Interrupt CR1 RXNEIE LL_LPUART_DisableIT_RXNE.
__STATIC_INLINE void LL_LPUART_DisableIT_IDLE(USART_TypeDef *LPUARTx)
Disable IDLE Interrupt CR1 IDLEIE LL_LPUART_DisableIT_IDLE.
__STATIC_INLINE void LL_LPUART_ClearFlag_NE(USART_TypeDef *LPUARTx)
Clear Noise detected Flag ICR NECF LL_LPUART_ClearFlag_NE.
__STATIC_INLINE uint32_t LL_LPUART_GetHWFlowCtrl(USART_TypeDef *LPUARTx)
Return HW Flow Control configuration (both CTS and RTS) CR3 RTSE LL_LPUART_GetHWFlowCtrl CR3 CTSE L...
__STATIC_INLINE void LL_LPUART_SetHWFlowCtrl(USART_TypeDef *LPUARTx, uint32_t HardwareFlowControl)
Configure HW Flow Control mode (both CTS and RTS) CR3 RTSE LL_LPUART_SetHWFlowCtrl CR3 CTSE LL_LPUA...
__STATIC_INLINE void LL_LPUART_EnableHalfDuplex(USART_TypeDef *LPUARTx)
Enable Single Wire Half-Duplex mode CR3 HDSEL LL_LPUART_EnableHalfDuplex.
__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_RXFT(USART_TypeDef *LPUARTx)
Check if LPUART RX FIFO Threshold Interrupt is enabled or disabled CR3 RXFTIE LL_LPUART_IsEnabledIT_...
__STATIC_INLINE void LL_LPUART_DisableDirectionTx(USART_TypeDef *LPUARTx)
Transmitter Disable CR1 TE LL_LPUART_DisableDirectionTx.
__STATIC_INLINE void LL_LPUART_DisableDMADeactOnRxErr(USART_TypeDef *LPUARTx)
Disable DMA Disabling on Reception Error CR3 DDRE LL_LPUART_DisableDMADeactOnRxErr.
__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_CM(USART_TypeDef *LPUARTx)
Check if the LPUART Character Match Flag is set or not ISR CMF LL_LPUART_IsActiveFlag_CM.
__STATIC_INLINE void LL_LPUART_DisableIT_PE(USART_TypeDef *LPUARTx)
Disable Parity Error Interrupt CR1 PEIE LL_LPUART_DisableIT_PE.
__STATIC_INLINE void LL_LPUART_DisableIT_WKUP(USART_TypeDef *LPUARTx)
Disable Wake Up from Stop Mode Interrupt CR3 WUFIE LL_LPUART_DisableIT_WKUP.
__STATIC_INLINE void LL_LPUART_SetBaudRate(USART_TypeDef *LPUARTx, uint32_t PeriphClk, uint32_t PrescalerValue, uint32_t BaudRate) __STATIC_INLINE void LL_LPUART_SetBaudRate(USART_TypeDef *LPUARTx
Configure LPUART BRR register for achieving expected Baud Rate value.
__STATIC_INLINE void LL_LPUART_EnableIT_RXNE_RXFNE(USART_TypeDef *LPUARTx)
Enable RX Not Empty and RX FIFO Not Empty Interrupt CR1 RXNEIE_RXFNEIE LL_LPUART_EnableIT_RXNE_RXFNE...
__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TXE_TXFNF(USART_TypeDef *LPUARTx)
Check if the LPUART Transmit Data Register Empty or LPUART TX FIFO Not Full Flag is set or not ISR T...
__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RXFF(USART_TypeDef *LPUARTx)
Check if the LPUART RX FIFO Full Flag is set or not ISR RXFF LL_LPUART_IsActiveFlag_RXFF.
__STATIC_INLINE void LL_LPUART_ClearFlag_IDLE(USART_TypeDef *LPUARTx)
Clear IDLE line detected Flag ICR IDLECF LL_LPUART_ClearFlag_IDLE.
__STATIC_INLINE void LL_LPUART_DisableOverrunDetect(USART_TypeDef *LPUARTx)
Disable Overrun detection CR3 OVRDIS LL_LPUART_DisableOverrunDetect.
__STATIC_INLINE void LL_LPUART_SetWKUPType(USART_TypeDef *LPUARTx, uint32_t Type)
Select event type for Wake UP Interrupt Flag (WUS[1:0] bits) CR3 WUS LL_LPUART_SetWKUPType.
__STATIC_INLINE void LL_LPUART_ClearFlag_FE(USART_TypeDef *LPUARTx)
Clear Framing Error Flag ICR FECF LL_LPUART_ClearFlag_FE.
__STATIC_INLINE void LL_LPUART_ClearFlag_TXFE(USART_TypeDef *LPUARTx)
Clear TX FIFO Empty Flag ICR TXFECF LL_LPUART_ClearFlag_TXFE.
__STATIC_INLINE void LL_LPUART_SetBinaryDataLogic(USART_TypeDef *LPUARTx, uint32_t DataLogic)
Configure Binary data logic.
__STATIC_INLINE void LL_LPUART_SetDEAssertionTime(USART_TypeDef *LPUARTx, uint32_t Time)
Set DEAT (Driver Enable Assertion Time), Time value expressed on 5 bits ([4:0] bits). CR1 DEAT LL_LPUART_SetDEAssertionTime.
__STATIC_INLINE uint32_t LL_LPUART_GetWKUPType(USART_TypeDef *LPUARTx)
Return event type for Wake UP Interrupt Flag (WUS[1:0] bits) CR3 WUS LL_LPUART_GetWKUPType.
__STATIC_INLINE uint32_t LL_LPUART_GetTransferDirection(USART_TypeDef *LPUARTx)
Return enabled/disabled states of Transmitter and Receiver CR1 RE LL_LPUART_GetTransferDirection CR...
__STATIC_INLINE void LL_LPUART_EnableDirectionTx(USART_TypeDef *LPUARTx)
Transmitter Enable CR1 TE LL_LPUART_EnableDirectionTx.
__STATIC_INLINE uint32_t LL_LPUART_GetRXPinLevel(USART_TypeDef *LPUARTx)
Retrieve RX pin active level logic configuration CR2 RXINV LL_LPUART_GetRXPinLevel.
__STATIC_INLINE void uint32_t PeriphClk
__STATIC_INLINE uint32_t LL_LPUART_IsEnabledFIFO(USART_TypeDef *LPUARTx)
Indicate if FIFO Mode is enabled CR1 FIFOEN LL_LPUART_IsEnabledFIFO.
__STATIC_INLINE uint32_t LL_LPUART_IsEnabledDMAReq_RX(USART_TypeDef *LPUARTx)
Check if DMA Mode is enabled for reception CR3 DMAR LL_LPUART_IsEnabledDMAReq_RX.
__STATIC_INLINE void LL_LPUART_DisableIT_ERROR(USART_TypeDef *LPUARTx)
Disable Error Interrupt.
__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_RXNE(USART_TypeDef *LPUARTx)
Check if the LPUART RX Not Empty Interrupt is enabled or disabled. CR1 RXNEIE LL_LPUART_IsEnabledIT_...
__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TXE_TXFNF(USART_TypeDef *LPUARTx)
Check if the LPUART TX Empty and LPUART TX FIFO Not Full Interrupt is enabled or disabled CR1 TXEIE_...
__STATIC_INLINE void LL_LPUART_DisableRTSHWFlowCtrl(USART_TypeDef *LPUARTx)
Disable RTS HW Flow Control CR3 RTSE LL_LPUART_DisableRTSHWFlowCtrl.
__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_IDLE(USART_TypeDef *LPUARTx)
Check if the LPUART IDLE Interrupt source is enabled or disabled. CR1 IDLEIE LL_LPUART_IsEnabledIT_I...
__STATIC_INLINE void LL_LPUART_EnableClockInStopMode(USART_TypeDef *LPUARTx)
LPUART Clock enabled in STOP Mode.
__STATIC_INLINE void LL_LPUART_DisableIT_CM(USART_TypeDef *LPUARTx)
Disable Character Match Interrupt CR1 CMIE LL_LPUART_DisableIT_CM.
__STATIC_INLINE void LL_LPUART_EnableIT_TXFT(USART_TypeDef *LPUARTx)
Enable TX FIFO Threshold Interrupt CR3 TXFTIE LL_LPUART_EnableIT_TXFT.
__STATIC_INLINE void LL_LPUART_EnableIT_RXFF(USART_TypeDef *LPUARTx)
Enable RX FIFO Full Interrupt CR1 RXFFIE LL_LPUART_EnableIT_RXFF.
__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_PE(USART_TypeDef *LPUARTx)
Check if the LPUART Parity Error Interrupt is enabled or disabled. CR1 PEIE LL_LPUART_IsEnabledIT_PE...
static const uint16_t LPUART_PRESCALER_TAB[]
__STATIC_INLINE void LL_LPUART_SetRXFIFOThreshold(USART_TypeDef *LPUARTx, uint32_t Threshold)
Configure RX FIFO Threshold CR3 RXFTCFG LL_LPUART_SetRXFIFOThreshold.
__STATIC_INLINE void LL_LPUART_SetDESignalPolarity(USART_TypeDef *LPUARTx, uint32_t Polarity)
Select Driver Enable Polarity CR3 DEP LL_LPUART_SetDESignalPolarity.
__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RXNE(USART_TypeDef *LPUARTx)
Check if the LPUART Read Data Register Not Empty Flag is set or not ISR RXNE LL_LPUART_IsActiveFlag_...
__STATIC_INLINE void LL_LPUART_SetTXFIFOThreshold(USART_TypeDef *LPUARTx, uint32_t Threshold)
Configure TX FIFO Threshold CR3 TXFTCFG LL_LPUART_SetTXFIFOThreshold.
__STATIC_INLINE void LL_LPUART_DisableIT_RXNE_RXFNE(USART_TypeDef *LPUARTx)
Disable RX Not Empty and RX FIFO Not Empty Interrupt CR1 RXNEIE_RXFNEIE LL_LPUART_DisableIT_RXNE_RXF...
__STATIC_INLINE void LL_LPUART_DisableIT_RXFT(USART_TypeDef *LPUARTx)
Disable RX FIFO Threshold Interrupt CR3 RXFTIE LL_LPUART_DisableIT_RXFT.
__STATIC_INLINE uint32_t LL_LPUART_GetBaudRate(USART_TypeDef *LPUARTx, uint32_t PeriphClk, uint32_t PrescalerValue) __STATIC_INLINE uint32_t LL_LPUART_GetBaudRate(USART_TypeDef *LPUARTx
Return current Baud Rate value, according to LPUARTDIV present in BRR register (full BRR content)...
__STATIC_INLINE void LL_LPUART_EnableIT_IDLE(USART_TypeDef *LPUARTx)
Enable IDLE Interrupt CR1 IDLEIE LL_LPUART_EnableIT_IDLE.
__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_ORE(USART_TypeDef *LPUARTx)
Check if the LPUART OverRun Error Flag is set or not ISR ORE LL_LPUART_IsActiveFlag_ORE.
__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_nCTS(USART_TypeDef *LPUARTx)
Check if the LPUART CTS interrupt Flag is set or not ISR CTSIF LL_LPUART_IsActiveFlag_nCTS.
__STATIC_INLINE void LL_LPUART_SetTransferDirection(USART_TypeDef *LPUARTx, uint32_t TransferDirection)
Configure simultaneously enabled/disabled states of Transmitter and Receiver CR1 RE LL_LPUART_SetTra...
register uint32_t periphclkpresc
__STATIC_INLINE uint32_t LL_LPUART_GetDEAssertionTime(USART_TypeDef *LPUARTx)
Return DEAT (Driver Enable Assertion Time) CR1 DEAT LL_LPUART_GetDEAssertionTime.
__STATIC_INLINE void LL_LPUART_ClearFlag_TC(USART_TypeDef *LPUARTx)
Clear Transmission Complete Flag ICR TCCF LL_LPUART_ClearFlag_TC.
__STATIC_INLINE void LL_LPUART_EnableMuteMode(USART_TypeDef *LPUARTx)
Allow switch between Mute Mode and Active mode CR1 MME LL_LPUART_EnableMuteMode. ...
__STATIC_INLINE void LL_LPUART_EnableDEMode(USART_TypeDef *LPUARTx)
Enable Driver Enable (DE) Mode CR3 DEM LL_LPUART_EnableDEMode.
__STATIC_INLINE uint32_t LL_LPUART_GetWakeUpMethod(USART_TypeDef *LPUARTx)
Return Receiver Wake Up method from Mute mode CR1 WAKE LL_LPUART_GetWakeUpMethod.
__STATIC_INLINE void LL_LPUART_EnableOverrunDetect(USART_TypeDef *LPUARTx)
Enable Overrun detection CR3 OVRDIS LL_LPUART_EnableOverrunDetect.
CLEAR_BIT(hrtc->Instance->CR, RTC_CR_WUTE)
__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TXFE(USART_TypeDef *LPUARTx)
Check if the LPUART TX FIFO Empty Flag is set or not ISR TXFE LL_LPUART_IsActiveFlag_TXFE.
__STATIC_INLINE void LL_LPUART_EnableIT_ERROR(USART_TypeDef *LPUARTx)
Enable Error Interrupt.
__STATIC_INLINE void LL_LPUART_DisableInStopMode(USART_TypeDef *LPUARTx)
LPUART disabled in STOP Mode.
__STATIC_INLINE uint32_t LL_LPUART_GetNodeAddressLen(USART_TypeDef *LPUARTx)
Return Length of Node Address used in Address Detection mode (7-bit or 4-bit) CR2 ADDM7 LL_LPUART_Ge...
register uint32_t brrresult
__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RWU(USART_TypeDef *LPUARTx)
Check if the LPUART Receive Wake Up from mute mode Flag is set or not ISR RWU LL_LPUART_IsActiveFlag...
__STATIC_INLINE void LL_LPUART_EnableIT_TXE(USART_TypeDef *LPUARTx)
Enable TX Empty Interrupt CR1 TXEIE LL_LPUART_EnableIT_TXE.
__STATIC_INLINE uint32_t LL_LPUART_GetPrescaler(USART_TypeDef *LPUARTx)
Retrieve the Clock source prescaler for baudrate generator and oversampling PRESC PRESCALER LL_LPUAR...
__STATIC_INLINE void LL_LPUART_EnableRTSHWFlowCtrl(USART_TypeDef *LPUARTx)
Enable RTS HW Flow Control CR3 RTSE LL_LPUART_EnableRTSHWFlowCtrl.
__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TXE(USART_TypeDef *LPUARTx)
Check if the LPUART Transmit Data Register Empty Flag is set or not ISR TXE LL_LPUART_IsActiveFlag_T...
__STATIC_INLINE void LL_LPUART_Disable(USART_TypeDef *LPUARTx)
LPUART Disable.
__STATIC_INLINE void LL_LPUART_DisableDEMode(USART_TypeDef *LPUARTx)
Disable Driver Enable (DE) Mode CR3 DEM LL_LPUART_DisableDEMode.
__STATIC_INLINE uint32_t LL_LPUART_GetTXPinLevel(USART_TypeDef *LPUARTx)
Retrieve TX pin active level logic configuration CR2 TXINV LL_LPUART_GetTXPinLevel.
__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_FE(USART_TypeDef *LPUARTx)
Check if the LPUART Framing Error Flag is set or not ISR FE LL_LPUART_IsActiveFlag_FE.
__STATIC_INLINE void LL_LPUART_DisableDMAReq_TX(USART_TypeDef *LPUARTx)
Disable DMA Mode for transmission CR3 DMAT LL_LPUART_DisableDMAReq_TX.
__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TXFE(USART_TypeDef *LPUARTx)
Check if the LPUART TX FIFO Empty Interrupt is enabled or disabled CR1 TXFEIE LL_LPUART_IsEnabledIT_...
__STATIC_INLINE uint32_t LL_LPUART_GetStopBitsLength(USART_TypeDef *LPUARTx)
Retrieve the length of the stop bits CR2 STOP LL_LPUART_GetStopBitsLength.
__STATIC_INLINE void LL_LPUART_DisableIT_TXE_TXFNF(USART_TypeDef *LPUARTx)
Disable TX Empty and TX FIFO Not Full Interrupt CR1 TXEIE_TXFNFIE LL_LPUART_DisableIT_TXE_TXFNF.
__STATIC_INLINE void LL_LPUART_EnableIT_PE(USART_TypeDef *LPUARTx)
Enable Parity Error Interrupt CR1 PEIE LL_LPUART_EnableIT_PE.
__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TC(USART_TypeDef *LPUARTx)
Check if the LPUART Transmission Complete Interrupt is enabled or disabled. CR1 TCIE LL_LPUART_IsEna...
__STATIC_INLINE void LL_LPUART_DisableIT_RXFF(USART_TypeDef *LPUARTx)
Disable RX FIFO Full Interrupt CR1 RXFFIE LL_LPUART_DisableIT_RXFF.
__STATIC_INLINE void LL_LPUART_EnableInStopMode(USART_TypeDef *LPUARTx)
LPUART enabled in STOP Mode.
__STATIC_INLINE void LL_LPUART_TransmitData8(USART_TypeDef *LPUARTx, uint8_t Value)
Write in Transmitter Data Register (Transmit Data value, 8 bits) TDR TDR LL_LPUART_TransmitData8.
__STATIC_INLINE void LL_LPUART_ClearFlag_PE(USART_TypeDef *LPUARTx)
Clear Parity Error Flag ICR PECF LL_LPUART_ClearFlag_PE.
LL LPUART Init Structure definition.
__STATIC_INLINE uint32_t LL_LPUART_GetRXFIFOThreshold(USART_TypeDef *LPUARTx)
Return RX FIFO Threshold Configuration CR3 RXFTCFG LL_LPUART_GetRXFIFOThreshold. ...
__STATIC_INLINE uint32_t LL_LPUART_GetNodeAddress(USART_TypeDef *LPUARTx)
Return 8 bit Address of the LPUART node as set in ADD field of CR2.
__STATIC_INLINE uint32_t LL_LPUART_GetTXFIFOThreshold(USART_TypeDef *LPUARTx)
Return TX FIFO Threshold Configuration CR3 TXFTCFG LL_LPUART_GetTXFIFOThreshold. ...
__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_WKUP(USART_TypeDef *LPUARTx)
Check if the LPUART Wake Up from stop mode Flag is set or not ISR WUF LL_LPUART_IsActiveFlag_WKUP.
__STATIC_INLINE uint32_t LL_LPUART_GetDESignalPolarity(USART_TypeDef *LPUARTx)
Return Driver Enable Polarity CR3 DEP LL_LPUART_GetDESignalPolarity.
__STATIC_INLINE void LL_LPUART_Enable(USART_TypeDef *LPUARTx)
LPUART Enable CR1 UE LL_LPUART_Enable.
__STATIC_INLINE void LL_LPUART_DisableClockInStopMode(USART_TypeDef *LPUARTx)
LPUART clock disabled in STOP Mode.
__STATIC_INLINE uint32_t LL_LPUART_IsEnabledDMADeactOnRxErr(USART_TypeDef *LPUARTx)
Indicate if DMA Disabling on Reception Error is disabled CR3 DDRE LL_LPUART_IsEnabledDMADeactOnRxErr...
__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_REACK(USART_TypeDef *LPUARTx)
Check if the LPUART Receive Enable Acknowledge Flag is set or not ISR REACK LL_LPUART_IsActiveFlag_R...
__STATIC_INLINE void LL_LPUART_DisableFIFO(USART_TypeDef *LPUARTx)
FIFO Mode Disable CR1 FIFOEN LL_LPUART_DisableFIFO.
__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_SBK(USART_TypeDef *LPUARTx)
Check if the LPUART Send Break Flag is set or not ISR SBKF LL_LPUART_IsActiveFlag_SBK.
__STATIC_INLINE uint32_t LL_LPUART_IsEnabledDMAReq_TX(USART_TypeDef *LPUARTx)
Check if DMA Mode is enabled for transmission CR3 DMAT LL_LPUART_IsEnabledDMAReq_TX.
__STATIC_INLINE void LL_LPUART_SetTXPinLevel(USART_TypeDef *LPUARTx, uint32_t PinInvMethod)
Configure TX pin active level logic CR2 TXINV LL_LPUART_SetTXPinLevel.
__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TXFT(USART_TypeDef *LPUARTx)
Check if the LPUART TX FIFO Threshold Flag is set or not ISR TXFT LL_LPUART_IsActiveFlag_TXFT.
__STATIC_INLINE void LL_LPUART_DisableIT_TXFT(USART_TypeDef *LPUARTx)
Disable TX FIFO Threshold Interrupt CR3 TXFTIE LL_LPUART_DisableIT_TXFT.
__STATIC_INLINE void LL_LPUART_SetStopBitsLength(USART_TypeDef *LPUARTx, uint32_t StopBits)
Set the length of the stop bits CR2 STOP LL_LPUART_SetStopBitsLength.
__STATIC_INLINE uint32_t LL_LPUART_IsEnabledDEMode(USART_TypeDef *LPUARTx)
Indicate if Driver Enable (DE) Mode is enabled CR3 DEM LL_LPUART_IsEnabledDEMode.
__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TEACK(USART_TypeDef *LPUARTx)
Check if the LPUART Transmit Enable Acknowledge Flag is set or not ISR TEACK LL_LPUART_IsActiveFlag_...
__STATIC_INLINE void LL_LPUART_DisableHalfDuplex(USART_TypeDef *LPUARTx)
Disable Single Wire Half-Duplex mode CR3 HDSEL LL_LPUART_DisableHalfDuplex.
__STATIC_INLINE void LL_LPUART_EnableIT_RXFT(USART_TypeDef *LPUARTx)
Enable RX FIFO Threshold Interrupt CR3 RXFTIE LL_LPUART_EnableIT_RXFT.
__STATIC_INLINE void LL_LPUART_DisableMuteMode(USART_TypeDef *LPUARTx)
Prevent Mute Mode use. Set Receiver in active mode permanently. CR1 MME LL_LPUART_DisableMuteMode.
__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RXNE_RXFNE(USART_TypeDef *LPUARTx)
Check if the LPUART Read Data Register or LPUART RX FIFO Not Empty Flag is set or not ISR RXNE_RXFNE...
__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_RXNE_RXFNE(USART_TypeDef *LPUARTx)
Check if the LPUART RX Not Empty and LPUART RX FIFO Not Empty Interrupt is enabled or disabled...
__STATIC_INLINE void LL_LPUART_ConfigFIFOsThreshold(USART_TypeDef *LPUARTx, uint32_t TXThreshold, uint32_t RXThreshold)
Configure TX and RX FIFOs Threshold CR3 TXFTCFG LL_LPUART_ConfigFIFOsThreshold CR3 RXFTCFG LL_LPUAR...
__STATIC_INLINE void LL_LPUART_SetTransferBitOrder(USART_TypeDef *LPUARTx, uint32_t BitOrder)
Configure transfer bit order (either Less or Most Significant Bit First)
__STATIC_INLINE uint32_t LL_LPUART_DMA_GetRegAddr(USART_TypeDef *LPUARTx, uint32_t Direction)
Get the LPUART data register address used for DMA transfer RDR RDR LL_LPUART_DMA_GetRegAddr TDR TDR...
__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_WKUP(USART_TypeDef *LPUARTx)
Check if the LPUART Wake Up from Stop Mode Interrupt is enabled or disabled. CR3 WUFIE LL_LPUART_IsE...
__STATIC_INLINE uint32_t LL_LPUART_GetTXRXSwap(USART_TypeDef *LPUARTx)
Retrieve TX/RX pins swapping configuration. CR2 SWAP LL_LPUART_GetTXRXSwap.
__STATIC_INLINE uint32_t LL_LPUART_IsEnabled(USART_TypeDef *LPUARTx)
Indicate if LPUART is enabled CR1 UE LL_LPUART_IsEnabled.
__STATIC_INLINE void LL_LPUART_EnableDMADeactOnRxErr(USART_TypeDef *LPUARTx)
Enable DMA Disabling on Reception Error CR3 DDRE LL_LPUART_EnableDMADeactOnRxErr.
__STATIC_INLINE void LL_LPUART_EnableDMAReq_TX(USART_TypeDef *LPUARTx)
Enable DMA Mode for transmission CR3 DMAT LL_LPUART_EnableDMAReq_TX.
__STATIC_INLINE uint32_t LL_LPUART_GetDataWidth(USART_TypeDef *LPUARTx)
Return Word length (i.e. nb of data bits, excluding start and stop bits) CR1 M LL_LPUART_GetDataWidt...
__STATIC_INLINE void LL_LPUART_EnableFIFO(USART_TypeDef *LPUARTx)
FIFO Mode Enable CR1 FIFOEN LL_LPUART_EnableFIFO.
__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TXE(USART_TypeDef *LPUARTx)
Check if the LPUART TX Empty Interrupt is enabled or disabled. CR1 TXEIE LL_LPUART_IsEnabledIT_TXE.
__STATIC_INLINE void LL_LPUART_DisableIT_CTS(USART_TypeDef *LPUARTx)
Disable CTS Interrupt CR3 CTSIE LL_LPUART_DisableIT_CTS.
__STATIC_INLINE void LL_LPUART_RequestBreakSending(USART_TypeDef *LPUARTx)
Request Break sending RQR SBKRQ LL_LPUART_RequestBreakSending.
__STATIC_INLINE void LL_LPUART_SetParity(USART_TypeDef *LPUARTx, uint32_t Parity)
Configure Parity (enabled/disabled and parity mode if enabled)
__STATIC_INLINE uint32_t LL_LPUART_IsEnabledMuteMode(USART_TypeDef *LPUARTx)
Indicate if switch between Mute Mode and Active mode is allowed CR1 MME LL_LPUART_IsEnabledMuteMode...
__STATIC_INLINE void LL_LPUART_EnableCTSHWFlowCtrl(USART_TypeDef *LPUARTx)
Enable CTS HW Flow Control CR3 CTSE LL_LPUART_EnableCTSHWFlowCtrl.
__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TC(USART_TypeDef *LPUARTx)
Check if the LPUART Transmission Complete Flag is set or not ISR TC LL_LPUART_IsActiveFlag_TC.
__STATIC_INLINE void LL_LPUART_DisableIT_TXFE(USART_TypeDef *LPUARTx)
Disable TX FIFO Empty Interrupt CR1 TXFEIE LL_LPUART_DisableIT_TXFE.
__STATIC_INLINE uint32_t LL_LPUART_GetParity(USART_TypeDef *LPUARTx)
Return Parity configuration (enabled/disabled and parity mode if enabled) CR1 PS LL_LPUART_GetParity...
__STATIC_INLINE void LL_LPUART_RequestRxDataFlush(USART_TypeDef *LPUARTx)
Request a Receive Data flush RQR RXFRQ LL_LPUART_RequestRxDataFlush.
__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_ERROR(USART_TypeDef *LPUARTx)
Check if the LPUART Error Interrupt is enabled or disabled. CR3 EIE LL_LPUART_IsEnabledIT_ERROR.
__STATIC_INLINE uint32_t LL_LPUART_IsEnabledOverrunDetect(USART_TypeDef *LPUARTx)
Indicate if Overrun detection is enabled CR3 OVRDIS LL_LPUART_IsEnabledOverrunDetect.
__STATIC_INLINE void LL_LPUART_EnableDMAReq_RX(USART_TypeDef *LPUARTx)
Enable DMA Mode for reception CR3 DMAR LL_LPUART_EnableDMAReq_RX.
__STATIC_INLINE void LL_LPUART_DisableIT_TXE(USART_TypeDef *LPUARTx)
Disable TX Empty Interrupt CR1 TXEIE LL_LPUART_DisableIT_TXE.
__STATIC_INLINE void LL_LPUART_SetPrescaler(USART_TypeDef *LPUARTx, uint32_t PrescalerValue)
Configure Clock source prescaler for baudrate generator and oversampling PRESC PRESCALER LL_LPUART_S...
__STATIC_INLINE uint32_t LL_LPUART_GetDEDeassertionTime(USART_TypeDef *LPUARTx)
Return DEDT (Driver Enable De-Assertion Time) CR1 DEDT LL_LPUART_GetDEDeassertionTime.
__STATIC_INLINE uint32_t LL_LPUART_GetTransferBitOrder(USART_TypeDef *LPUARTx)
Return transfer bit order (either Less or Most Significant Bit First)
__STATIC_INLINE void LL_LPUART_EnableIT_CM(USART_TypeDef *LPUARTx)
Enable Character Match Interrupt CR1 CMIE LL_LPUART_EnableIT_CM.
__STATIC_INLINE void LL_LPUART_ClearFlag_nCTS(USART_TypeDef *LPUARTx)
Clear CTS Interrupt Flag ICR CTSCF LL_LPUART_ClearFlag_nCTS.
__STATIC_INLINE void LL_LPUART_EnableIT_RXNE(USART_TypeDef *LPUARTx)
Enable RX Not Empty Interrupt CR1 RXNEIE LL_LPUART_EnableIT_RXNE.
__STATIC_INLINE void LL_LPUART_ClearFlag_CM(USART_TypeDef *LPUARTx)
Clear Character Match Flag ICR CMCF LL_LPUART_ClearFlag_CM.
__STATIC_INLINE void LL_LPUART_TransmitData9(USART_TypeDef *LPUARTx, uint16_t Value)
Write in Transmitter Data Register (Transmit Data value, 9 bits) TDR TDR LL_LPUART_TransmitData9.
__STATIC_INLINE void LL_LPUART_EnableIT_WKUP(USART_TypeDef *LPUARTx)
Enable Wake Up from Stop Mode Interrupt CR3 WUFIE LL_LPUART_EnableIT_WKUP.
__STATIC_INLINE void LL_LPUART_SetDEDeassertionTime(USART_TypeDef *LPUARTx, uint32_t Time)
Set DEDT (Driver Enable De-Assertion Time), Time value expressed on 5 bits ([4:0] bits)...
ErrorStatus LL_LPUART_Init(USART_TypeDef *LPUARTx, LL_LPUART_InitTypeDef *LPUART_InitStruct)
Initialize LPUART registers according to the specified parameters in LPUART_InitStruct.
__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_CTS(USART_TypeDef *LPUARTx)
Check if the LPUART CTS Flag is set or not ISR CTS LL_LPUART_IsActiveFlag_CTS.
__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RXFT(USART_TypeDef *LPUARTx)
Check if the LPUART RX FIFO Threshold Flag is set or not ISR RXFT LL_LPUART_IsActiveFlag_RXFT.
MODIFY_REG(hrtc->Instance->CR, RTC_CR_WUCKSEL,(uint32_t) WakeUpClock)
__STATIC_INLINE uint32_t LL_LPUART_GetBinaryDataLogic(USART_TypeDef *LPUARTx)
Retrieve Binary data configuration CR2 DATAINV LL_LPUART_GetBinaryDataLogic.
__STATIC_INLINE void uint32_t uint32_t BaudRate
__STATIC_INLINE void LL_LPUART_ClearFlag_WKUP(USART_TypeDef *LPUARTx)
Clear Wake Up from stop mode Flag ICR WUCF LL_LPUART_ClearFlag_WKUP.
__STATIC_INLINE uint32_t LL_LPUART_IsEnabledInStopMode(USART_TypeDef *LPUARTx)
Indicate if LPUART is enabled in STOP Mode (able to wake up MCU from Stop mode or not) CR1 UESM LL_L...
ErrorStatus LL_LPUART_DeInit(USART_TypeDef *LPUARTx)
De-initialize LPUART registers (Registers restored to their default values).
__STATIC_INLINE void LL_LPUART_RequestEnterMuteMode(USART_TypeDef *LPUARTx)
Put LPUART in mute mode and set the RWU flag RQR MMRQ LL_LPUART_RequestEnterMuteMode.
__STATIC_INLINE void LL_LPUART_EnableIT_TXFE(USART_TypeDef *LPUARTx)
Enable TX FIFO Empty Interrupt CR1 TXFEIE LL_LPUART_EnableIT_TXFE.
__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_RXFF(USART_TypeDef *LPUARTx)
Check if the LPUART RX FIFO Full Interrupt is enabled or disabled CR1 RXFFIE LL_LPUART_IsEnabledIT_R...
__STATIC_INLINE void LL_LPUART_SetTXRXSwap(USART_TypeDef *LPUARTx, uint32_t SwapConfig)
Configure TX/RX pins swapping setting. CR2 SWAP LL_LPUART_SetTXRXSwap.
void LL_LPUART_StructInit(LL_LPUART_InitTypeDef *LPUART_InitStruct)
Set each LL_LPUART_InitTypeDef field to default value.
__STATIC_INLINE uint32_t LL_LPUART_IsClockEnabledInStopMode(USART_TypeDef *LPUARTx)
Indicate if LPUART clock is enabled in STOP Mode CR3 UCESM LL_LPUART_IsClockEnabledInStopMode.
__STATIC_INLINE void LL_LPUART_ConfigNodeAddress(USART_TypeDef *LPUARTx, uint32_t AddressLen, uint32_t NodeAddress)
Set Address of the LPUART node.
__STATIC_INLINE uint8_t LL_LPUART_ReceiveData8(USART_TypeDef *LPUARTx)
Read Receiver Data register (Receive Data value, 8 bits) RDR RDR LL_LPUART_ReceiveData8.
__STATIC_INLINE uint16_t LL_LPUART_ReceiveData9(USART_TypeDef *LPUARTx)
Read Receiver Data register (Receive Data value, 9 bits) RDR RDR LL_LPUART_ReceiveData9.
__STATIC_INLINE void LL_LPUART_ClearFlag_ORE(USART_TypeDef *LPUARTx)
Clear OverRun Error Flag ICR ORECF LL_LPUART_ClearFlag_ORE.
__STATIC_INLINE void LL_LPUART_EnableIT_CTS(USART_TypeDef *LPUARTx)
Enable CTS Interrupt CR3 CTSIE LL_LPUART_EnableIT_CTS.
__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_CTS(USART_TypeDef *LPUARTx)
Check if the LPUART CTS Interrupt is enabled or disabled. CR3 CTSIE LL_LPUART_IsEnabledIT_CTS.
__STATIC_INLINE void LL_LPUART_DisableCTSHWFlowCtrl(USART_TypeDef *LPUARTx)
Disable CTS HW Flow Control CR3 CTSE LL_LPUART_DisableCTSHWFlowCtrl.
__STATIC_INLINE void LL_LPUART_EnableDirectionRx(USART_TypeDef *LPUARTx)
Receiver Enable (Receiver is enabled and begins searching for a start bit) CR1 RE LL_LPUART_EnableDi...
__STATIC_INLINE void LL_LPUART_SetRXPinLevel(USART_TypeDef *LPUARTx, uint32_t PinInvMethod)
Configure RX pin active level logic CR2 RXINV LL_LPUART_SetRXPinLevel.
__STATIC_INLINE void LL_LPUART_SetWakeUpMethod(USART_TypeDef *LPUARTx, uint32_t Method)
Set Receiver Wake Up method from Mute mode. CR1 WAKE LL_LPUART_SetWakeUpMethod.
__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_CM(USART_TypeDef *LPUARTx)
Check if the LPUART Character Match Interrupt is enabled or disabled. CR1 CMIE LL_LPUART_IsEnabledIT...
__STATIC_INLINE void LL_LPUART_EnableIT_TXE_TXFNF(USART_TypeDef *LPUARTx)
Enable TX Empty and TX FIFO Not Full Interrupt CR1 TXEIE_TXFNFIE LL_LPUART_EnableIT_TXE_TXFNF.
__STATIC_INLINE void LL_LPUART_ConfigCharacter(USART_TypeDef *LPUARTx, uint32_t DataWidth, uint32_t Parity, uint32_t StopBits)
Configure Character frame format (Datawidth, Parity control, Stop Bits)