STM32L4xx_HAL_Driver  1.14.0
stm32l4xx_ll_swpmi.h
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1 
20 /* Define to prevent recursive inclusion -------------------------------------*/
21 #ifndef STM32L4xx_LL_SWPMI_H
22 #define STM32L4xx_LL_SWPMI_H
23 
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27 
28 /* Includes ------------------------------------------------------------------*/
29 #include "stm32l4xx.h"
30 
35 #if defined(SWPMI1)
36 
41 /* Private types -------------------------------------------------------------*/
42 /* Private variables ---------------------------------------------------------*/
43 /* Private constants ---------------------------------------------------------*/
44 /* Private macros ------------------------------------------------------------*/
45 #if defined(USE_FULL_LL_DRIVER)
46 
52 #endif /*USE_FULL_LL_DRIVER*/
53 
54 /* Exported types ------------------------------------------------------------*/
55 #if defined(USE_FULL_LL_DRIVER)
56 
63 typedef struct
64 {
65  uint32_t VoltageClass;
70  uint32_t BitRatePrescaler;
77  uint32_t TxBufferingMode;
82  uint32_t RxBufferingMode;
87 
91 #endif /* USE_FULL_LL_DRIVER */
92 
93 /* Exported constants --------------------------------------------------------*/
102 #define LL_SWPMI_ICR_CRXBFF SWPMI_ICR_CRXBFF
103 #define LL_SWPMI_ICR_CTXBEF SWPMI_ICR_CTXBEF
104 #define LL_SWPMI_ICR_CRXBERF SWPMI_ICR_CRXBERF
105 #define LL_SWPMI_ICR_CRXOVRF SWPMI_ICR_CRXOVRF
106 #define LL_SWPMI_ICR_CTXUNRF SWPMI_ICR_CTXUNRF
107 #define LL_SWPMI_ICR_CTCF SWPMI_ICR_CTCF
108 #define LL_SWPMI_ICR_CSRF SWPMI_ICR_CSRF
117 #define LL_SWPMI_ISR_RXBFF SWPMI_ISR_RXBFF
118 #define LL_SWPMI_ISR_TXBEF SWPMI_ISR_TXBEF
119 #define LL_SWPMI_ISR_RXBERF SWPMI_ISR_RXBERF
120 #define LL_SWPMI_ISR_RXOVRF SWPMI_ISR_RXOVRF
121 #define LL_SWPMI_ISR_TXUNRF SWPMI_ISR_TXUNRF
122 #define LL_SWPMI_ISR_RXNE SWPMI_ISR_RXNE
123 #define LL_SWPMI_ISR_TXE SWPMI_ISR_TXE
124 #define LL_SWPMI_ISR_TCF SWPMI_ISR_TCF
125 #define LL_SWPMI_ISR_SRF SWPMI_ISR_SRF
126 #define LL_SWPMI_ISR_SUSP SWPMI_ISR_SUSP
127 #define LL_SWPMI_ISR_DEACTF SWPMI_ISR_DEACTF
136 #define LL_SWPMI_IER_SRIE SWPMI_IER_SRIE
137 #define LL_SWPMI_IER_TCIE SWPMI_IER_TCIE
138 #define LL_SWPMI_IER_TIE SWPMI_IER_TIE
139 #define LL_SWPMI_IER_RIE SWPMI_IER_RIE
140 #define LL_SWPMI_IER_TXUNRIE SWPMI_IER_TXUNRIE
141 #define LL_SWPMI_IER_RXOVRIE SWPMI_IER_RXOVRIE
142 #define LL_SWPMI_IER_RXBERIE SWPMI_IER_RXBERIE
143 #define LL_SWPMI_IER_TXBEIE SWPMI_IER_TXBEIE
144 #define LL_SWPMI_IER_RXBFIE SWPMI_IER_RXBFIE
152 #define LL_SWPMI_SW_BUFFER_RX_SINGLE ((uint32_t)0x00000000)
153 #define LL_SWPMI_SW_BUFFER_RX_MULTI SWPMI_CR_RXMODE
161 #define LL_SWPMI_SW_BUFFER_TX_SINGLE ((uint32_t)0x00000000)
162 #define LL_SWPMI_SW_BUFFER_TX_MULTI SWPMI_CR_TXMODE
170 #define LL_SWPMI_VOLTAGE_CLASS_C ((uint32_t)0x00000000)
171 #define LL_SWPMI_VOLTAGE_CLASS_B SWPMI_OR_CLASS
179 #define LL_SWPMI_DMA_REG_DATA_TRANSMIT (uint32_t)0
180 #define LL_SWPMI_DMA_REG_DATA_RECEIVE (uint32_t)1
189 /* Exported macro ------------------------------------------------------------*/
190 
205 #define LL_SWPMI_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
206 
213 #define LL_SWPMI_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
214 
229 #define __LL_SWPMI_CALC_BITRATE_PRESCALER(__FSWP__, __FSWPCLK__) ((uint32_t)(((__FSWPCLK__) / ((__FSWP__) * 4)) - 1))
230 
239 /* Exported functions --------------------------------------------------------*/
258 __STATIC_INLINE void LL_SWPMI_SetReceptionMode(SWPMI_TypeDef *SWPMIx, uint32_t RxBufferingMode)
259 {
260  MODIFY_REG(SWPMIx->CR, SWPMI_CR_RXMODE, RxBufferingMode);
261 }
262 
271 __STATIC_INLINE uint32_t LL_SWPMI_GetReceptionMode(SWPMI_TypeDef *SWPMIx)
272 {
273  return (uint32_t)(READ_BIT(SWPMIx->CR, SWPMI_CR_RXMODE));
274 }
275 
286 __STATIC_INLINE void LL_SWPMI_SetTransmissionMode(SWPMI_TypeDef *SWPMIx, uint32_t TxBufferingMode)
287 {
288  MODIFY_REG(SWPMIx->CR, SWPMI_CR_TXMODE, TxBufferingMode);
289 }
290 
299 __STATIC_INLINE uint32_t LL_SWPMI_GetTransmissionMode(SWPMI_TypeDef *SWPMIx)
300 {
301  return (uint32_t)(READ_BIT(SWPMIx->CR, SWPMI_CR_TXMODE));
302 }
303 
310 __STATIC_INLINE void LL_SWPMI_EnableLoopback(SWPMI_TypeDef *SWPMIx)
311 {
312  SET_BIT(SWPMIx->CR, SWPMI_CR_LPBK);
313 }
314 
321 __STATIC_INLINE void LL_SWPMI_DisableLoopback(SWPMI_TypeDef *SWPMIx)
322 {
323  CLEAR_BIT(SWPMIx->CR, SWPMI_CR_LPBK);
324 }
325 
336 __STATIC_INLINE void LL_SWPMI_Activate(SWPMI_TypeDef *SWPMIx)
337 {
338  /* In order to activate SWP again, the software must clear DEACT bit*/
339  CLEAR_BIT(SWPMIx->CR, SWPMI_CR_DEACT);
340 
341  /* Set SWACT bit */
342  SET_BIT(SWPMIx->CR, SWPMI_CR_SWPACT);
343 }
344 
351 __STATIC_INLINE uint32_t LL_SWPMI_IsActivated(SWPMI_TypeDef *SWPMIx)
352 {
353  return ((READ_BIT(SWPMIx->CR, SWPMI_CR_SWPACT) == (SWPMI_CR_SWPACT)) ? 1UL : 0UL);
354 }
355 
363 __STATIC_INLINE void LL_SWPMI_Deactivate(SWPMI_TypeDef *SWPMIx)
364 {
365  CLEAR_BIT(SWPMIx->CR, SWPMI_CR_SWPACT);
366 }
367 
375 __STATIC_INLINE void LL_SWPMI_RequestDeactivation(SWPMI_TypeDef *SWPMIx)
376 {
377  SET_BIT(SWPMIx->CR, SWPMI_CR_DEACT);
378 }
379 
387 __STATIC_INLINE void LL_SWPMI_SetBitRatePrescaler(SWPMI_TypeDef *SWPMIx, uint32_t BitRatePrescaler)
388 {
389  WRITE_REG(SWPMIx->BRR, BitRatePrescaler);
390 }
391 
398 __STATIC_INLINE uint32_t LL_SWPMI_GetBitRatePrescaler(SWPMI_TypeDef *SWPMIx)
399 {
400  return (uint32_t)(READ_BIT(SWPMIx->BRR, SWPMI_BRR_BR));
401 }
402 
412 __STATIC_INLINE void LL_SWPMI_SetVoltageClass(SWPMI_TypeDef *SWPMIx, uint32_t VoltageClass)
413 {
414  MODIFY_REG(SWPMIx->OR, SWPMI_OR_CLASS, VoltageClass);
415 }
416 
425 __STATIC_INLINE uint32_t LL_SWPMI_GetVoltageClass(SWPMI_TypeDef *SWPMIx)
426 {
427  return (uint32_t)(READ_BIT(SWPMIx->OR, SWPMI_OR_CLASS));
428 }
429 
444 __STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_RXBF(SWPMI_TypeDef *SWPMIx)
445 {
446  return ((READ_BIT(SWPMIx->ISR, SWPMI_ISR_RXBFF) == (SWPMI_ISR_RXBFF)) ? 1UL : 0UL);
447 }
448 
455 __STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_TXBE(SWPMI_TypeDef *SWPMIx)
456 {
457  return ((READ_BIT(SWPMIx->ISR, SWPMI_ISR_TXBEF) == (SWPMI_ISR_TXBEF)) ? 1UL : 0UL);
458 }
459 
466 __STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_RXBER(SWPMI_TypeDef *SWPMIx)
467 {
468  return ((READ_BIT(SWPMIx->ISR, SWPMI_ISR_RXBERF) == (SWPMI_ISR_RXBERF)) ? 1UL : 0UL);
469 }
470 
477 __STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_RXOVR(SWPMI_TypeDef *SWPMIx)
478 {
479  return ((READ_BIT(SWPMIx->ISR, SWPMI_ISR_RXOVRF) == (SWPMI_ISR_RXOVRF)) ? 1UL : 0UL);
480 }
481 
488 __STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_TXUNR(SWPMI_TypeDef *SWPMIx)
489 {
490  return ((READ_BIT(SWPMIx->ISR, SWPMI_ISR_TXUNRF) == (SWPMI_ISR_TXUNRF)) ? 1UL : 0UL);
491 }
492 
500 __STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_RXNE(SWPMI_TypeDef *SWPMIx)
501 {
502  return ((READ_BIT(SWPMIx->ISR, SWPMI_ISR_RXNE) == (SWPMI_ISR_RXNE)) ? 1UL : 0UL);
503 }
504 
512 __STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_TXE(SWPMI_TypeDef *SWPMIx)
513 {
514  return ((READ_BIT(SWPMIx->ISR, SWPMI_ISR_TXE) == (SWPMI_ISR_TXE)) ? 1UL : 0UL);
515 }
516 
524 __STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_TC(SWPMI_TypeDef *SWPMIx)
525 {
526  return ((READ_BIT(SWPMIx->ISR, SWPMI_ISR_TCF) == (SWPMI_ISR_TCF)) ? 1UL : 0UL);
527 }
528 
536 __STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_SR(SWPMI_TypeDef *SWPMIx)
537 {
538  return ((READ_BIT(SWPMIx->ISR, SWPMI_ISR_SRF) == (SWPMI_ISR_SRF)) ? 1UL : 0UL);
539 }
540 
547 __STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_SUSP(SWPMI_TypeDef *SWPMIx)
548 {
549  return ((READ_BIT(SWPMIx->ISR, SWPMI_ISR_SUSP) == (SWPMI_ISR_SUSP)) ? 1UL : 0UL);
550 }
551 
558 __STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_DEACT(SWPMI_TypeDef *SWPMIx)
559 {
560  return ((READ_BIT(SWPMIx->ISR, SWPMI_ISR_DEACTF) == (SWPMI_ISR_DEACTF)) ? 1UL : 0UL);
561 }
562 
569 __STATIC_INLINE void LL_SWPMI_ClearFlag_RXBF(SWPMI_TypeDef *SWPMIx)
570 {
571  WRITE_REG(SWPMIx->ICR, SWPMI_ICR_CRXBFF);
572 }
573 
580 __STATIC_INLINE void LL_SWPMI_ClearFlag_TXBE(SWPMI_TypeDef *SWPMIx)
581 {
582  WRITE_REG(SWPMIx->ICR, SWPMI_ICR_CTXBEF);
583 }
584 
591 __STATIC_INLINE void LL_SWPMI_ClearFlag_RXBER(SWPMI_TypeDef *SWPMIx)
592 {
593  WRITE_REG(SWPMIx->ICR, SWPMI_ICR_CRXBERF);
594 }
595 
602 __STATIC_INLINE void LL_SWPMI_ClearFlag_RXOVR(SWPMI_TypeDef *SWPMIx)
603 {
604  WRITE_REG(SWPMIx->ICR, SWPMI_ICR_CRXOVRF);
605 }
606 
613 __STATIC_INLINE void LL_SWPMI_ClearFlag_TXUNR(SWPMI_TypeDef *SWPMIx)
614 {
615  WRITE_REG(SWPMIx->ICR, SWPMI_ICR_CTXUNRF);
616 }
617 
624 __STATIC_INLINE void LL_SWPMI_ClearFlag_TC(SWPMI_TypeDef *SWPMIx)
625 {
626  WRITE_REG(SWPMIx->ICR, SWPMI_ICR_CTCF);
627 }
628 
635 __STATIC_INLINE void LL_SWPMI_ClearFlag_SR(SWPMI_TypeDef *SWPMIx)
636 {
637  WRITE_REG(SWPMIx->ICR, SWPMI_ICR_CSRF);
638 }
639 
654 __STATIC_INLINE void LL_SWPMI_EnableIT_SR(SWPMI_TypeDef *SWPMIx)
655 {
656  SET_BIT(SWPMIx->IER, SWPMI_IER_SRIE);
657 }
658 
665 __STATIC_INLINE void LL_SWPMI_EnableIT_TC(SWPMI_TypeDef *SWPMIx)
666 {
667  SET_BIT(SWPMIx->IER, SWPMI_IER_TCIE);
668 }
669 
676 __STATIC_INLINE void LL_SWPMI_EnableIT_TX(SWPMI_TypeDef *SWPMIx)
677 {
678  SET_BIT(SWPMIx->IER, SWPMI_IER_TIE);
679 }
680 
687 __STATIC_INLINE void LL_SWPMI_EnableIT_RX(SWPMI_TypeDef *SWPMIx)
688 {
689  SET_BIT(SWPMIx->IER, SWPMI_IER_RIE);
690 }
691 
698 __STATIC_INLINE void LL_SWPMI_EnableIT_TXUNR(SWPMI_TypeDef *SWPMIx)
699 {
700  SET_BIT(SWPMIx->IER, SWPMI_IER_TXUNRIE);
701 }
702 
709 __STATIC_INLINE void LL_SWPMI_EnableIT_RXOVR(SWPMI_TypeDef *SWPMIx)
710 {
711  SET_BIT(SWPMIx->IER, SWPMI_IER_RXOVRIE);
712 }
713 
720 __STATIC_INLINE void LL_SWPMI_EnableIT_RXBER(SWPMI_TypeDef *SWPMIx)
721 {
722  SET_BIT(SWPMIx->IER, SWPMI_IER_RXBERIE);
723 }
724 
731 __STATIC_INLINE void LL_SWPMI_EnableIT_TXBE(SWPMI_TypeDef *SWPMIx)
732 {
733  SET_BIT(SWPMIx->IER, SWPMI_IER_TXBEIE);
734 }
735 
742 __STATIC_INLINE void LL_SWPMI_EnableIT_RXBF(SWPMI_TypeDef *SWPMIx)
743 {
744  SET_BIT(SWPMIx->IER, SWPMI_IER_RXBFIE);
745 }
746 
753 __STATIC_INLINE void LL_SWPMI_DisableIT_SR(SWPMI_TypeDef *SWPMIx)
754 {
755  CLEAR_BIT(SWPMIx->IER, SWPMI_IER_SRIE);
756 }
757 
764 __STATIC_INLINE void LL_SWPMI_DisableIT_TC(SWPMI_TypeDef *SWPMIx)
765 {
766  CLEAR_BIT(SWPMIx->IER, SWPMI_IER_TCIE);
767 }
768 
775 __STATIC_INLINE void LL_SWPMI_DisableIT_TX(SWPMI_TypeDef *SWPMIx)
776 {
777  CLEAR_BIT(SWPMIx->IER, SWPMI_IER_TIE);
778 }
779 
786 __STATIC_INLINE void LL_SWPMI_DisableIT_RX(SWPMI_TypeDef *SWPMIx)
787 {
788  CLEAR_BIT(SWPMIx->IER, SWPMI_IER_RIE);
789 }
790 
797 __STATIC_INLINE void LL_SWPMI_DisableIT_TXUNR(SWPMI_TypeDef *SWPMIx)
798 {
799  CLEAR_BIT(SWPMIx->IER, SWPMI_IER_TXUNRIE);
800 }
801 
808 __STATIC_INLINE void LL_SWPMI_DisableIT_RXOVR(SWPMI_TypeDef *SWPMIx)
809 {
810  CLEAR_BIT(SWPMIx->IER, SWPMI_IER_RXOVRIE);
811 }
812 
819 __STATIC_INLINE void LL_SWPMI_DisableIT_RXBER(SWPMI_TypeDef *SWPMIx)
820 {
821  CLEAR_BIT(SWPMIx->IER, SWPMI_IER_RXBERIE);
822 }
823 
830 __STATIC_INLINE void LL_SWPMI_DisableIT_TXBE(SWPMI_TypeDef *SWPMIx)
831 {
832  CLEAR_BIT(SWPMIx->IER, SWPMI_IER_TXBEIE);
833 }
834 
841 __STATIC_INLINE void LL_SWPMI_DisableIT_RXBF(SWPMI_TypeDef *SWPMIx)
842 {
843  CLEAR_BIT(SWPMIx->IER, SWPMI_IER_RXBFIE);
844 }
845 
852 __STATIC_INLINE uint32_t LL_SWPMI_IsEnabledIT_SR(SWPMI_TypeDef *SWPMIx)
853 {
854  return ((READ_BIT(SWPMIx->IER, SWPMI_IER_SRIE) == (SWPMI_IER_SRIE)) ? 1UL : 0UL);
855 }
856 
863 __STATIC_INLINE uint32_t LL_SWPMI_IsEnabledIT_TC(SWPMI_TypeDef *SWPMIx)
864 {
865  return ((READ_BIT(SWPMIx->IER, SWPMI_IER_TCIE) == (SWPMI_IER_TCIE)) ? 1UL : 0UL);
866 }
867 
874 __STATIC_INLINE uint32_t LL_SWPMI_IsEnabledIT_TX(SWPMI_TypeDef *SWPMIx)
875 {
876  return ((READ_BIT(SWPMIx->IER, SWPMI_IER_TIE) == (SWPMI_IER_TIE)) ? 1UL : 0UL);
877 }
878 
885 __STATIC_INLINE uint32_t LL_SWPMI_IsEnabledIT_RX(SWPMI_TypeDef *SWPMIx)
886 {
887  return ((READ_BIT(SWPMIx->IER, SWPMI_IER_RIE) == (SWPMI_IER_RIE)) ? 1UL : 0UL);
888 }
889 
896 __STATIC_INLINE uint32_t LL_SWPMI_IsEnabledIT_TXUNR(SWPMI_TypeDef *SWPMIx)
897 {
898  return ((READ_BIT(SWPMIx->IER, SWPMI_IER_TXUNRIE) == (SWPMI_IER_TXUNRIE)) ? 1UL : 0UL);
899 }
900 
907 __STATIC_INLINE uint32_t LL_SWPMI_IsEnabledIT_RXOVR(SWPMI_TypeDef *SWPMIx)
908 {
909  return ((READ_BIT(SWPMIx->IER, SWPMI_IER_RXOVRIE) == (SWPMI_IER_RXOVRIE)) ? 1UL : 0UL);
910 }
911 
918 __STATIC_INLINE uint32_t LL_SWPMI_IsEnabledIT_RXBER(SWPMI_TypeDef *SWPMIx)
919 {
920  return ((READ_BIT(SWPMIx->IER, SWPMI_IER_RXBERIE) == (SWPMI_IER_RXBERIE)) ? 1UL : 0UL);
921 }
922 
929 __STATIC_INLINE uint32_t LL_SWPMI_IsEnabledIT_TXBE(SWPMI_TypeDef *SWPMIx)
930 {
931  return ((READ_BIT(SWPMIx->IER, SWPMI_IER_TXBEIE) == (SWPMI_IER_TXBEIE)) ? 1UL : 0UL);
932 }
933 
940 __STATIC_INLINE uint32_t LL_SWPMI_IsEnabledIT_RXBF(SWPMI_TypeDef *SWPMIx)
941 {
942  return ((READ_BIT(SWPMIx->IER, SWPMI_IER_RXBFIE) == (SWPMI_IER_RXBFIE)) ? 1UL : 0UL);
943 }
944 
959 __STATIC_INLINE void LL_SWPMI_EnableDMAReq_RX(SWPMI_TypeDef *SWPMIx)
960 {
961  SET_BIT(SWPMIx->CR, SWPMI_CR_RXDMA);
962 }
963 
970 __STATIC_INLINE void LL_SWPMI_DisableDMAReq_RX(SWPMI_TypeDef *SWPMIx)
971 {
972  CLEAR_BIT(SWPMIx->CR, SWPMI_CR_RXDMA);
973 }
974 
981 __STATIC_INLINE uint32_t LL_SWPMI_IsEnabledDMAReq_RX(SWPMI_TypeDef *SWPMIx)
982 {
983  return ((READ_BIT(SWPMIx->CR, SWPMI_CR_RXDMA) == (SWPMI_CR_RXDMA)) ? 1UL : 0UL);
984 }
985 
992 __STATIC_INLINE void LL_SWPMI_EnableDMAReq_TX(SWPMI_TypeDef *SWPMIx)
993 {
994  SET_BIT(SWPMIx->CR, SWPMI_CR_TXDMA);
995 }
996 
1003 __STATIC_INLINE void LL_SWPMI_DisableDMAReq_TX(SWPMI_TypeDef *SWPMIx)
1004 {
1005  CLEAR_BIT(SWPMIx->CR, SWPMI_CR_TXDMA);
1006 }
1007 
1014 __STATIC_INLINE uint32_t LL_SWPMI_IsEnabledDMAReq_TX(SWPMI_TypeDef *SWPMIx)
1015 {
1016  return ((READ_BIT(SWPMIx->CR, SWPMI_CR_TXDMA) == (SWPMI_CR_TXDMA)) ? 1UL : 0UL);
1017 }
1018 
1029 __STATIC_INLINE uint32_t LL_SWPMI_DMA_GetRegAddr(SWPMI_TypeDef *SWPMIx, uint32_t Direction)
1030 {
1031  uint32_t data_reg_addr;
1032 
1033  if (Direction == LL_SWPMI_DMA_REG_DATA_TRANSMIT)
1034  {
1035  /* return address of TDR register */
1036  data_reg_addr = (uint32_t)&(SWPMIx->TDR);
1037  }
1038  else
1039  {
1040  /* return address of RDR register */
1041  data_reg_addr = (uint32_t)&(SWPMIx->RDR);
1042  }
1043 
1044  return data_reg_addr;
1045 }
1046 
1061 __STATIC_INLINE uint32_t LL_SWPMI_GetReceiveFrameLength(SWPMI_TypeDef *SWPMIx)
1062 {
1063  return (uint32_t)(READ_BIT(SWPMIx->RFL, SWPMI_RFL_RFL));
1064 }
1065 
1073 __STATIC_INLINE void LL_SWPMI_TransmitData32(SWPMI_TypeDef *SWPMIx, uint32_t TxData)
1074 {
1075  WRITE_REG(SWPMIx->TDR, TxData);
1076 }
1077 
1084 __STATIC_INLINE uint32_t LL_SWPMI_ReceiveData32(SWPMI_TypeDef *SWPMIx)
1085 {
1086  return (uint32_t)(READ_BIT(SWPMIx->RDR, SWPMI_RDR_RD));
1087 }
1088 
1097 __STATIC_INLINE void LL_SWPMI_EnableTXBypass(SWPMI_TypeDef *SWPMIx)
1098 {
1099  CLEAR_BIT(SWPMIx->OR, SWPMI_OR_TBYP);
1100 }
1101 
1110 __STATIC_INLINE void LL_SWPMI_DisableTXBypass(SWPMI_TypeDef *SWPMIx)
1111 {
1112  SET_BIT(SWPMIx->OR, SWPMI_OR_TBYP);
1113 }
1114 
1119 #if defined(USE_FULL_LL_DRIVER)
1120 
1124 ErrorStatus LL_SWPMI_DeInit(SWPMI_TypeDef *SWPMIx);
1125 ErrorStatus LL_SWPMI_Init(SWPMI_TypeDef *SWPMIx, LL_SWPMI_InitTypeDef *SWPMI_InitStruct);
1126 void LL_SWPMI_StructInit(LL_SWPMI_InitTypeDef *SWPMI_InitStruct);
1127 
1131 #endif /*USE_FULL_LL_DRIVER*/
1132 
1141 #endif /* SWPMI1 */
1142 
1147 #ifdef __cplusplus
1148 }
1149 #endif
1150 
1151 #endif /* STM32L4xx_LL_SWPMI_H */
1152 
1153 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
__STATIC_INLINE uint32_t LL_SWPMI_GetReceiveFrameLength(SWPMI_TypeDef *SWPMIx)
Retrieve number of data bytes present in payload of received frame RFL RFL LL_SWPMI_GetReceiveFrameL...
__STATIC_INLINE void LL_SWPMI_EnableIT_RXBER(SWPMI_TypeDef *SWPMIx)
Enable Receive CRC error interrupt IER RXBERIE LL_SWPMI_EnableIT_RXBER.
__STATIC_INLINE void LL_SWPMI_ClearFlag_RXBF(SWPMI_TypeDef *SWPMIx)
Clear receive buffer full flag ICR CRXBFF LL_SWPMI_ClearFlag_RXBF.
__STATIC_INLINE void LL_SWPMI_SetReceptionMode(SWPMI_TypeDef *SWPMIx, uint32_t RxBufferingMode)
Set Reception buffering mode.
__STATIC_INLINE uint32_t LL_SWPMI_IsEnabledIT_TXUNR(SWPMI_TypeDef *SWPMIx)
Check if Transmit underrun error interrupt is enabled IER TXUNRIE LL_SWPMI_IsEnabledIT_TXUNR.
__STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_TXBE(SWPMI_TypeDef *SWPMIx)
Check if Frame transmission buffer has been emptied ISR TXBEF LL_SWPMI_IsActiveFlag_TXBE.
__STATIC_INLINE void LL_SWPMI_ClearFlag_TXBE(SWPMI_TypeDef *SWPMIx)
Clear transmit buffer empty flag ICR CTXBEF LL_SWPMI_ClearFlag_TXBE.
__STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_TXUNR(SWPMI_TypeDef *SWPMIx)
Check if underrun error in transmission has been detected ISR TXUNRF LL_SWPMI_IsActiveFlag_TXUNR.
__STATIC_INLINE void LL_SWPMI_DisableIT_TXUNR(SWPMI_TypeDef *SWPMIx)
Disable Transmit underrun error interrupt IER TXUNRIE LL_SWPMI_DisableIT_TXUNR.
__STATIC_INLINE uint32_t LL_SWPMI_IsEnabledIT_TXBE(SWPMI_TypeDef *SWPMIx)
Check if Transmit buffer empty interrupt is enabled IER TXBEIE LL_SWPMI_IsEnabledIT_TXBE.
__STATIC_INLINE void LL_SWPMI_EnableIT_RXOVR(SWPMI_TypeDef *SWPMIx)
Enable Receive overrun error interrupt IER RXOVRIE LL_SWPMI_EnableIT_RXOVR.
__STATIC_INLINE void LL_SWPMI_DisableIT_RX(SWPMI_TypeDef *SWPMIx)
Disable Receive interrupt IER RIE LL_SWPMI_DisableIT_RX.
__STATIC_INLINE void LL_SWPMI_DisableIT_TXBE(SWPMI_TypeDef *SWPMIx)
Disable Transmit buffer empty interrupt IER TXBEIE LL_SWPMI_DisableIT_TXBE.
__STATIC_INLINE void LL_SWPMI_DisableIT_SR(SWPMI_TypeDef *SWPMIx)
Disable Slave resume interrupt IER SRIE LL_SWPMI_DisableIT_SR.
__STATIC_INLINE uint32_t LL_SWPMI_IsEnabledIT_RX(SWPMI_TypeDef *SWPMIx)
Check if Receive interrupt is enabled IER RIE LL_SWPMI_IsEnabledIT_RX.
__STATIC_INLINE uint32_t LL_SWPMI_IsActivated(SWPMI_TypeDef *SWPMIx)
Check if Single wire protocol bus is in ACTIVATED state. CR SWPACT LL_SWPMI_Activate.
__STATIC_INLINE void LL_SWPMI_SetBitRatePrescaler(SWPMI_TypeDef *SWPMIx, uint32_t BitRatePrescaler)
Set Bitrate prescaler SWPMI_freq = SWPMI_clk / (((BitRate) + 1) * 4) BRR BR LL_SWPMI_SetBitRatePresc...
__STATIC_INLINE uint32_t LL_SWPMI_IsEnabledIT_TX(SWPMI_TypeDef *SWPMIx)
Check if Transmit interrupt is enabled IER TIE LL_SWPMI_IsEnabledIT_TX.
__STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_RXOVR(SWPMI_TypeDef *SWPMIx)
Check if Overrun in reception has been detected ISR RXOVRF LL_SWPMI_IsActiveFlag_RXOVR.
__STATIC_INLINE void LL_SWPMI_SetVoltageClass(SWPMI_TypeDef *SWPMIx, uint32_t VoltageClass)
Set SWP Voltage Class OR CLASS LL_SWPMI_SetVoltageClass.
__STATIC_INLINE void LL_SWPMI_EnableIT_TX(SWPMI_TypeDef *SWPMIx)
Enable Transmit interrupt IER TIE LL_SWPMI_EnableIT_TX.
__STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_TXE(SWPMI_TypeDef *SWPMIx)
Check if Transmit data register is empty (it means that Data written in transmit data register SWPMI_...
__STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_RXBF(SWPMI_TypeDef *SWPMIx)
Check if the last word of the frame under reception has arrived in SWPMI_RDR. ISR RXBFF LL_SWPMI_IsA...
__STATIC_INLINE void LL_SWPMI_EnableIT_RX(SWPMI_TypeDef *SWPMIx)
Enable Receive interrupt IER RIE LL_SWPMI_EnableIT_RX.
SWPMI Init structures definition.
__STATIC_INLINE void LL_SWPMI_ClearFlag_TC(SWPMI_TypeDef *SWPMIx)
Clear transfer complete flag ICR CTCF LL_SWPMI_ClearFlag_TC.
__STATIC_INLINE void LL_SWPMI_DisableIT_RXOVR(SWPMI_TypeDef *SWPMIx)
Disable Receive overrun error interrupt IER RXOVRIE LL_SWPMI_DisableIT_RXOVR.
__STATIC_INLINE uint32_t LL_SWPMI_IsEnabledIT_RXOVR(SWPMI_TypeDef *SWPMIx)
Check if Receive overrun error interrupt is enabled IER RXOVRIE LL_SWPMI_IsEnabledIT_RXOVR.
CLEAR_BIT(hrtc->Instance->CR, RTC_CR_WUTE)
__STATIC_INLINE void LL_SWPMI_ClearFlag_RXBER(SWPMI_TypeDef *SWPMIx)
Clear receive CRC error flag ICR CRXBERF LL_SWPMI_ClearFlag_RXBER.
__STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_TC(SWPMI_TypeDef *SWPMIx)
Check if Both transmission and reception are completed and SWP is switched to the SUSPENDED state IS...
__STATIC_INLINE uint32_t LL_SWPMI_DMA_GetRegAddr(SWPMI_TypeDef *SWPMIx, uint32_t Direction)
Get the data register address used for DMA transfer TDR TD LL_SWPMI_DMA_GetRegAddr RDR RD LL_SWPMI_...
__STATIC_INLINE uint32_t LL_SWPMI_ReceiveData32(SWPMI_TypeDef *SWPMIx)
Receive Data Register RDR RD LL_SWPMI_ReceiveData32.
__STATIC_INLINE void LL_SWPMI_DisableDMAReq_TX(SWPMI_TypeDef *SWPMIx)
Disable DMA mode for transmission CR TXDMA LL_SWPMI_DisableDMAReq_TX.
__STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_DEACT(SWPMI_TypeDef *SWPMIx)
Check if SWP bus is in DEACTIVATED state ISR DEACTF LL_SWPMI_IsActiveFlag_DEACT. ...
__STATIC_INLINE void LL_SWPMI_EnableDMAReq_RX(SWPMI_TypeDef *SWPMIx)
Enable DMA mode for reception CR RXDMA LL_SWPMI_EnableDMAReq_RX.
__STATIC_INLINE void LL_SWPMI_SetTransmissionMode(SWPMI_TypeDef *SWPMIx, uint32_t TxBufferingMode)
Set Transmission buffering mode.
__STATIC_INLINE void LL_SWPMI_ClearFlag_SR(SWPMI_TypeDef *SWPMIx)
Clear slave resume flag ICR CSRF LL_SWPMI_ClearFlag_SR.
__STATIC_INLINE void LL_SWPMI_DisableIT_TX(SWPMI_TypeDef *SWPMIx)
Disable Transmit interrupt IER TIE LL_SWPMI_DisableIT_TX.
__STATIC_INLINE uint32_t LL_SWPMI_IsEnabledDMAReq_RX(SWPMI_TypeDef *SWPMIx)
Check if DMA mode for reception is enabled CR RXDMA LL_SWPMI_IsEnabledDMAReq_RX. ...
__STATIC_INLINE void LL_SWPMI_EnableIT_SR(SWPMI_TypeDef *SWPMIx)
Enable Slave resume interrupt IER SRIE LL_SWPMI_EnableIT_SR.
__STATIC_INLINE void LL_SWPMI_Deactivate(SWPMI_TypeDef *SWPMIx)
Deactivate immediately Single wire protocol bus (immediate transition to DEACTIVATED state) CR SWPAC...
__STATIC_INLINE void LL_SWPMI_EnableIT_TXBE(SWPMI_TypeDef *SWPMIx)
Enable Transmit buffer empty interrupt IER TXBEIE LL_SWPMI_EnableIT_TXBE.
__STATIC_INLINE uint32_t LL_SWPMI_GetTransmissionMode(SWPMI_TypeDef *SWPMIx)
Get Transmission buffering mode CR TXMODE LL_SWPMI_GetTransmissionMode.
__STATIC_INLINE void LL_SWPMI_EnableTXBypass(SWPMI_TypeDef *SWPMIx)
Enable SWP Transceiver Bypass.
__STATIC_INLINE void LL_SWPMI_EnableIT_TC(SWPMI_TypeDef *SWPMIx)
Enable Transmit complete interrupt IER TCIE LL_SWPMI_EnableIT_TC.
__STATIC_INLINE void LL_SWPMI_ClearFlag_RXOVR(SWPMI_TypeDef *SWPMIx)
Clear receive overrun error flag ICR CRXOVRF LL_SWPMI_ClearFlag_RXOVR.
__STATIC_INLINE void LL_SWPMI_ClearFlag_TXUNR(SWPMI_TypeDef *SWPMIx)
Clear transmit underrun error flag ICR CTXUNRF LL_SWPMI_ClearFlag_TXUNR.
__STATIC_INLINE void LL_SWPMI_DisableIT_TC(SWPMI_TypeDef *SWPMIx)
Disable Transmit complete interrupt IER TCIE LL_SWPMI_DisableIT_TC.
__STATIC_INLINE uint32_t LL_SWPMI_GetReceptionMode(SWPMI_TypeDef *SWPMIx)
Get Reception buffering mode CR RXMODE LL_SWPMI_GetReceptionMode.
__STATIC_INLINE void LL_SWPMI_DisableLoopback(SWPMI_TypeDef *SWPMIx)
Disable loopback mode CR LPBK LL_SWPMI_DisableLoopback.
__STATIC_INLINE void LL_SWPMI_Activate(SWPMI_TypeDef *SWPMIx)
Activate Single wire protocol bus (SUSPENDED or ACTIVATED state)
__STATIC_INLINE uint32_t LL_SWPMI_IsEnabledDMAReq_TX(SWPMI_TypeDef *SWPMIx)
Check if DMA mode for transmission is enabled CR TXDMA LL_SWPMI_IsEnabledDMAReq_TX.
__STATIC_INLINE void LL_SWPMI_EnableIT_RXBF(SWPMI_TypeDef *SWPMIx)
Enable Receive buffer full interrupt IER RXBFIE LL_SWPMI_EnableIT_RXBF.
__STATIC_INLINE uint32_t LL_SWPMI_IsEnabledIT_RXBF(SWPMI_TypeDef *SWPMIx)
Check if Receive buffer full interrupt is enabled IER RXBFIE LL_SWPMI_IsEnabledIT_RXBF.
__STATIC_INLINE void LL_SWPMI_EnableLoopback(SWPMI_TypeDef *SWPMIx)
Enable loopback mode CR LPBK LL_SWPMI_EnableLoopback.
__STATIC_INLINE void LL_SWPMI_EnableDMAReq_TX(SWPMI_TypeDef *SWPMIx)
Enable DMA mode for transmission CR TXDMA LL_SWPMI_EnableDMAReq_TX.
ErrorStatus LL_SWPMI_Init(SWPMI_TypeDef *SWPMIx, LL_SWPMI_InitTypeDef *SWPMI_InitStruct)
Initialize the SWPMI peripheral according to the specified parameters in the SWPMI_InitStruct.
__STATIC_INLINE uint32_t LL_SWPMI_GetVoltageClass(SWPMI_TypeDef *SWPMIx)
Get SWP Voltage Class OR CLASS LL_SWPMI_GetVoltageClass.
__STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_RXNE(SWPMI_TypeDef *SWPMIx)
Check if Receive data register not empty (it means that Received data is ready to be read in the SWPM...
__STATIC_INLINE void LL_SWPMI_DisableTXBypass(SWPMI_TypeDef *SWPMIx)
Disable SWP Transceiver Bypass.
MODIFY_REG(hrtc->Instance->CR, RTC_CR_WUCKSEL,(uint32_t) WakeUpClock)
__STATIC_INLINE void LL_SWPMI_RequestDeactivation(SWPMI_TypeDef *SWPMIx)
Request a deactivation of Single wire protocol bus (request to go in DEACTIVATED state if no resume f...
__STATIC_INLINE void LL_SWPMI_DisableDMAReq_RX(SWPMI_TypeDef *SWPMIx)
Disable DMA mode for reception CR RXDMA LL_SWPMI_DisableDMAReq_RX.
__STATIC_INLINE uint32_t LL_SWPMI_GetBitRatePrescaler(SWPMI_TypeDef *SWPMIx)
Get Bitrate prescaler BRR BR LL_SWPMI_GetBitRatePrescaler.
__STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_RXBER(SWPMI_TypeDef *SWPMIx)
Check if CRC error in reception has been detected ISR RXBERF LL_SWPMI_IsActiveFlag_RXBER.
__STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_SR(SWPMI_TypeDef *SWPMIx)
Check if a Resume by slave state has been detected during the SWP bus SUSPENDED state ISR SRF LL_SWP...
ErrorStatus LL_SWPMI_DeInit(SWPMI_TypeDef *SWPMIx)
De-initialize the SWPMI peripheral registers to their default reset values.
void LL_SWPMI_StructInit(LL_SWPMI_InitTypeDef *SWPMI_InitStruct)
Set each LL_SWPMI_InitTypeDef field to default value.
__STATIC_INLINE uint32_t LL_SWPMI_IsEnabledIT_TC(SWPMI_TypeDef *SWPMIx)
Check if Transmit complete interrupt is enabled IER TCIE LL_SWPMI_IsEnabledIT_TC.
__STATIC_INLINE void LL_SWPMI_EnableIT_TXUNR(SWPMI_TypeDef *SWPMIx)
Enable Transmit underrun error interrupt IER TXUNRIE LL_SWPMI_EnableIT_TXUNR.
__STATIC_INLINE uint32_t LL_SWPMI_IsEnabledIT_SR(SWPMI_TypeDef *SWPMIx)
Check if Slave resume interrupt is enabled IER SRIE LL_SWPMI_IsEnabledIT_SR.
__STATIC_INLINE void LL_SWPMI_DisableIT_RXBF(SWPMI_TypeDef *SWPMIx)
Disable Receive buffer full interrupt IER RXBFIE LL_SWPMI_DisableIT_RXBF.
__STATIC_INLINE uint32_t LL_SWPMI_IsEnabledIT_RXBER(SWPMI_TypeDef *SWPMIx)
Check if Receive CRC error interrupt is enabled IER RXBERIE LL_SWPMI_IsEnabledIT_RXBER.
__STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_SUSP(SWPMI_TypeDef *SWPMIx)
Check if SWP bus is in SUSPENDED or DEACTIVATED state ISR SUSP LL_SWPMI_IsActiveFlag_SUSP.
__STATIC_INLINE void LL_SWPMI_TransmitData32(SWPMI_TypeDef *SWPMIx, uint32_t TxData)
Transmit Data Register TDR TD LL_SWPMI_TransmitData32.
__STATIC_INLINE void LL_SWPMI_DisableIT_RXBER(SWPMI_TypeDef *SWPMIx)
Disable Receive CRC error interrupt IER RXBERIE LL_SWPMI_DisableIT_RXBER.