Peripheral Control functions

Peripheral Control functions. More...

Functions
HAL_StatusTypeDef	HAL_DMA2D_ConfigLayer (DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
	Configure the DMA2D Layer according to the specified parameters in the DMA2D_HandleTypeDef. More...
HAL_StatusTypeDef	HAL_DMA2D_ConfigCLUT (DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx)
	Configure the DMA2D CLUT Transfer. More...
HAL_StatusTypeDef	HAL_DMA2D_ProgramLineEvent (DMA2D_HandleTypeDef *hdma2d, uint32_t Line)
	Configure the line watermark. More...
HAL_StatusTypeDef	HAL_DMA2D_EnableDeadTime (DMA2D_HandleTypeDef *hdma2d)
	Enable DMA2D dead time feature. More...
HAL_StatusTypeDef	HAL_DMA2D_DisableDeadTime (DMA2D_HandleTypeDef *hdma2d)
	Disable DMA2D dead time feature. More...
HAL_StatusTypeDef	HAL_DMA2D_ConfigDeadTime (DMA2D_HandleTypeDef *hdma2d, uint8_t DeadTime)
	Configure dead time. More...

Detailed Description

Peripheral Control functions.

 ===============================================================================
                    ##### Peripheral Control functions #####
 ===============================================================================
    [..]  This section provides functions allowing to:
      (+) Configure the DMA2D foreground or background layer parameters.
      (+) Configure the DMA2D CLUT transfer.
      (+) Configure the line watermark
      (+) Configure the dead time value.
      (+) Enable or disable the dead time value functionality.

Function Documentation

HAL_DMA2D_ConfigCLUT()

HAL_StatusTypeDef HAL_DMA2D_ConfigCLUT	(	DMA2D_HandleTypeDef *	hdma2d,
		DMA2D_CLUTCfgTypeDef	CLUTCfg,
		uint32_t	LayerIdx
	)

Configure the DMA2D CLUT Transfer.

Parameters

hdma2d	Pointer to a DMA2D_HandleTypeDef structure that contains the configuration information for the DMA2D.
CLUTCfg	Pointer to a DMA2D_CLUTCfgTypeDef structure that contains the configuration information for the color look up table.
LayerIdx	DMA2D Layer index. This parameter can be one of the following values: DMA2D_BACKGROUND_LAYER(0) / DMA2D_FOREGROUND_LAYER(1)

Return values

HAL

status

Definition at line 1708 of file stm32l4xx_hal_dma2d.c.

{
  /* Check the parameters */
  assert_param(IS_DMA2D_LAYER(LayerIdx));
  assert_param(IS_DMA2D_CLUT_CM(CLUTCfg.CLUTColorMode));
  assert_param(IS_DMA2D_CLUT_SIZE(CLUTCfg.Size));

  /* Process locked */
  __HAL_LOCK(hdma2d);

  /* Change DMA2D peripheral state */
  hdma2d->State = HAL_DMA2D_STATE_BUSY;

  /* Configure the CLUT of the background DMA2D layer */
  if(LayerIdx == DMA2D_BACKGROUND_LAYER)
  {
    /* Write background CLUT memory address */
    WRITE_REG(hdma2d->Instance->BGCMAR, (uint32_t)CLUTCfg.pCLUT);

    /* Write background CLUT size and CLUT color mode */
    MODIFY_REG(hdma2d->Instance->BGPFCCR, (DMA2D_BGPFCCR_CS | DMA2D_BGPFCCR_CCM),
            ((CLUTCfg.Size << DMA2D_BGPFCCR_CS_Pos) | (CLUTCfg.CLUTColorMode << DMA2D_BGPFCCR_CCM_Pos)));
 }
 /* Configure the CLUT of the foreground DMA2D layer */
 else
 {
   /* Write foreground CLUT memory address */
    WRITE_REG(hdma2d->Instance->FGCMAR, (uint32_t)CLUTCfg.pCLUT);

    /* Write foreground CLUT size and CLUT color mode */
    MODIFY_REG(hdma2d->Instance->FGPFCCR, (DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM),
            ((CLUTCfg.Size << DMA2D_FGPFCCR_CS_Pos) | (CLUTCfg.CLUTColorMode << DMA2D_FGPFCCR_CCM_Pos)));
  }

  /* Set the DMA2D state to Ready*/
  hdma2d->State = HAL_DMA2D_STATE_READY;

  /* Process unlocked */
  __HAL_UNLOCK(hdma2d);

  return HAL_OK;
}

HAL_DMA2D_ConfigDeadTime()

HAL_StatusTypeDef HAL_DMA2D_ConfigDeadTime	(	DMA2D_HandleTypeDef *	hdma2d,
		uint8_t	DeadTime
	)

Configure dead time.

Note

The dead time value represents the guaranteed minimum number of cycles between two consecutive transactions on the AHB bus.

Parameters

hdma2d	DMA2D handle.
DeadTime	dead time value.

Return values

HAL

status

Definition at line 1849 of file stm32l4xx_hal_dma2d.c.

{
  /* Process Locked */
  __HAL_LOCK(hdma2d);

  hdma2d->State = HAL_DMA2D_STATE_BUSY;

  /* Set DMA2D_AMTCR DT field */
  MODIFY_REG(hdma2d->Instance->AMTCR, DMA2D_AMTCR_DT, (((uint32_t) DeadTime) << DMA2D_AMTCR_DT_Pos));

  hdma2d->State = HAL_DMA2D_STATE_READY;

  /* Process Unlocked */
  __HAL_UNLOCK(hdma2d);

  return HAL_OK;
}

HAL_DMA2D_ConfigLayer()

HAL_StatusTypeDef HAL_DMA2D_ConfigLayer	(	DMA2D_HandleTypeDef *	hdma2d,
		uint32_t	LayerIdx
	)

Configure the DMA2D Layer according to the specified parameters in the DMA2D_HandleTypeDef.

Parameters

hdma2d	Pointer to a DMA2D_HandleTypeDef structure that contains the configuration information for the DMA2D.
LayerIdx	DMA2D Layer index. This parameter can be one of the following values: DMA2D_BACKGROUND_LAYER(0) / DMA2D_FOREGROUND_LAYER(1)

Return values

HAL

status

Definition at line 1614 of file stm32l4xx_hal_dma2d.c.

{
  DMA2D_LayerCfgTypeDef *pLayerCfg;
  uint32_t regMask, regValue;

  /* Check the parameters */
  assert_param(IS_DMA2D_LAYER(LayerIdx));
  assert_param(IS_DMA2D_OFFSET(hdma2d->LayerCfg[LayerIdx].InputOffset));
  if(hdma2d->Init.Mode != DMA2D_R2M)
  {
    assert_param(IS_DMA2D_INPUT_COLOR_MODE(hdma2d->LayerCfg[LayerIdx].InputColorMode));
    if(hdma2d->Init.Mode != DMA2D_M2M)
    {
      assert_param(IS_DMA2D_ALPHA_MODE(hdma2d->LayerCfg[LayerIdx].AlphaMode));
    }
  }
  assert_param(IS_DMA2D_ALPHA_INVERTED(hdma2d->LayerCfg[LayerIdx].AlphaInverted));
  assert_param(IS_DMA2D_RB_SWAP(hdma2d->LayerCfg[LayerIdx].RedBlueSwap));

  /* Process locked */
  __HAL_LOCK(hdma2d);

  /* Change DMA2D peripheral state */
  hdma2d->State = HAL_DMA2D_STATE_BUSY;

  pLayerCfg = &hdma2d->LayerCfg[LayerIdx];

  /* Prepare the value to be written to the BGPFCCR or FGPFCCR register */
  regValue = pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << DMA2D_BGPFCCR_AM_Pos) |\
             (pLayerCfg->AlphaInverted << DMA2D_BGPFCCR_AI_Pos) | (pLayerCfg->RedBlueSwap << DMA2D_BGPFCCR_RBS_Pos);
  regMask  = (DMA2D_BGPFCCR_CM | DMA2D_BGPFCCR_AM | DMA2D_BGPFCCR_ALPHA | DMA2D_BGPFCCR_AI | DMA2D_BGPFCCR_RBS);


  if ((pLayerCfg->InputColorMode == DMA2D_INPUT_A4) || (pLayerCfg->InputColorMode == DMA2D_INPUT_A8))
  {
    regValue |= (pLayerCfg->InputAlpha & DMA2D_BGPFCCR_ALPHA);
  }
  else
  {
    regValue |=  (pLayerCfg->InputAlpha << DMA2D_BGPFCCR_ALPHA_Pos);
  }

  /* Configure the background DMA2D layer */
  if(LayerIdx == DMA2D_BACKGROUND_LAYER)
  {
    /* Write DMA2D BGPFCCR register */
    MODIFY_REG(hdma2d->Instance->BGPFCCR, regMask, regValue);

    /* DMA2D BGOR register configuration -------------------------------------*/
    WRITE_REG(hdma2d->Instance->BGOR, pLayerCfg->InputOffset);

    /* DMA2D BGCOLR register configuration -------------------------------------*/
    if ((pLayerCfg->InputColorMode == DMA2D_INPUT_A4) || (pLayerCfg->InputColorMode == DMA2D_INPUT_A8))
    {
      WRITE_REG(hdma2d->Instance->BGCOLR, pLayerCfg->InputAlpha & (DMA2D_BGCOLR_BLUE|DMA2D_BGCOLR_GREEN|DMA2D_BGCOLR_RED));
    }
  }
  /* Configure the foreground DMA2D layer */
  else
  {


     /* Write DMA2D FGPFCCR register */
    MODIFY_REG(hdma2d->Instance->FGPFCCR, regMask, regValue);

    /* DMA2D FGOR register configuration -------------------------------------*/
    WRITE_REG(hdma2d->Instance->FGOR, pLayerCfg->InputOffset);

    /* DMA2D FGCOLR register configuration -------------------------------------*/
    if ((pLayerCfg->InputColorMode == DMA2D_INPUT_A4) || (pLayerCfg->InputColorMode == DMA2D_INPUT_A8))
    {
      WRITE_REG(hdma2d->Instance->FGCOLR, pLayerCfg->InputAlpha & (DMA2D_FGCOLR_BLUE|DMA2D_FGCOLR_GREEN|DMA2D_FGCOLR_RED));
    }
  }
  /* Initialize the DMA2D state*/
  hdma2d->State = HAL_DMA2D_STATE_READY;

  /* Process unlocked */
  __HAL_UNLOCK(hdma2d);

  return HAL_OK;
}

HAL_DMA2D_DisableDeadTime()

HAL_StatusTypeDef HAL_DMA2D_DisableDeadTime

(

DMA2D_HandleTypeDef *

hdma2d

)

Disable DMA2D dead time feature.

Parameters

hdma2d

DMA2D handle.

Return values

HAL

status

Definition at line 1823 of file stm32l4xx_hal_dma2d.c.

{
  /* Process Locked */
  __HAL_LOCK(hdma2d);

  hdma2d->State = HAL_DMA2D_STATE_BUSY;

  /* Clear DMA2D_AMTCR EN bit */
  CLEAR_BIT(hdma2d->Instance->AMTCR, DMA2D_AMTCR_EN);

  hdma2d->State = HAL_DMA2D_STATE_READY;

  /* Process Unlocked */
  __HAL_UNLOCK(hdma2d);

  return HAL_OK;
}

HAL_DMA2D_EnableDeadTime()

HAL_StatusTypeDef HAL_DMA2D_EnableDeadTime

(

DMA2D_HandleTypeDef *

hdma2d

)

Enable DMA2D dead time feature.

Parameters

hdma2d

DMA2D handle.

Return values

HAL

status

Definition at line 1800 of file stm32l4xx_hal_dma2d.c.

{
  /* Process Locked */
  __HAL_LOCK(hdma2d);

  hdma2d->State = HAL_DMA2D_STATE_BUSY;

  /* Set DMA2D_AMTCR EN bit */
  SET_BIT(hdma2d->Instance->AMTCR, DMA2D_AMTCR_EN);

  hdma2d->State = HAL_DMA2D_STATE_READY;

  /* Process Unlocked */
  __HAL_UNLOCK(hdma2d);

  return HAL_OK;
}

HAL_DMA2D_ProgramLineEvent()

HAL_StatusTypeDef HAL_DMA2D_ProgramLineEvent	(	DMA2D_HandleTypeDef *	hdma2d,
		uint32_t	Line
	)

Configure the line watermark.

Parameters

hdma2d	Pointer to a DMA2D_HandleTypeDef structure that contains the configuration information for the DMA2D.
Line	Line Watermark configuration (maximum 16-bit long value expected).

Note

HAL_DMA2D_ProgramLineEvent() API enables the transfer watermark interrupt.

The transfer watermark interrupt is disabled once it has occurred.

Return values

HAL

status

Definition at line 1762 of file stm32l4xx_hal_dma2d.c.

{
  /* Check the parameters */
  assert_param(IS_DMA2D_LINEWATERMARK(Line));

  if (Line > DMA2D_LWR_LW)
  {
    return HAL_ERROR;
  }
  else
  {
    /* Process locked */
    __HAL_LOCK(hdma2d);

    /* Change DMA2D peripheral state */
    hdma2d->State = HAL_DMA2D_STATE_BUSY;

    /* Sets the Line watermark configuration */
    WRITE_REG(hdma2d->Instance->LWR, Line);

    /* Enable the Line interrupt */
    __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TW);

    /* Initialize the DMA2D state*/
    hdma2d->State = HAL_DMA2D_STATE_READY;

    /* Process unlocked */
    __HAL_UNLOCK(hdma2d);

    return HAL_OK;
  }
}