STM32L4xx_HAL_Driver  1.14.0
Input and Output operation functions

Input and Output operation functions. More...

Functions

HAL_StatusTypeDef HAL_DMA_Start (DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
 Start the DMA Transfer. More...
 
HAL_StatusTypeDef HAL_DMA_Start_IT (DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
 Start the DMA Transfer with interrupt enabled. More...
 
HAL_StatusTypeDef HAL_DMA_Abort (DMA_HandleTypeDef *hdma)
 Abort the DMA Transfer. More...
 
HAL_StatusTypeDef HAL_DMA_Abort_IT (DMA_HandleTypeDef *hdma)
 Aborts the DMA Transfer in Interrupt mode. More...
 
HAL_StatusTypeDef HAL_DMA_PollForTransfer (DMA_HandleTypeDef *hdma, HAL_DMA_LevelCompleteTypeDef CompleteLevel, uint32_t Timeout)
 Polling for transfer complete. More...
 
void HAL_DMA_IRQHandler (DMA_HandleTypeDef *hdma)
 Handle DMA interrupt request. More...
 
HAL_StatusTypeDef HAL_DMA_RegisterCallback (DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID, void(*pCallback)(DMA_HandleTypeDef *_hdma))
 Register callbacks. More...
 
HAL_StatusTypeDef HAL_DMA_UnRegisterCallback (DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID)
 UnRegister callbacks. More...
 

Detailed Description

Input and Output operation functions.

 ===============================================================================
                      #####  IO operation functions  #####
 ===============================================================================
    [..]  This section provides functions allowing to:
      (+) Configure the source, destination address and data length and Start DMA transfer
      (+) Configure the source, destination address and data length and
          Start DMA transfer with interrupt
      (+) Abort DMA transfer
      (+) Poll for transfer complete
      (+) Handle DMA interrupt request

Function Documentation

◆ HAL_DMA_Abort()

HAL_StatusTypeDef HAL_DMA_Abort ( DMA_HandleTypeDef hdma)

Abort the DMA Transfer.

Parameters
hdmapointer to a DMA_HandleTypeDef structure that contains the configuration information for the specified DMA Channel.
Return values
HALstatus

Definition at line 546 of file stm32l4xx_hal_dma.c.

547 {
548  HAL_StatusTypeDef status = HAL_OK;
549 
550  /* Check the DMA peripheral state */
551  if(hdma->State != HAL_DMA_STATE_BUSY)
552  {
553  hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
554 
555  /* Process Unlocked */
556  __HAL_UNLOCK(hdma);
557 
558  return HAL_ERROR;
559  }
560  else
561  {
562  /* Disable DMA IT */
563  __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
564 
565 #if defined(DMAMUX1)
566  /* disable the DMAMUX sync overrun IT*/
567  hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE;
568 #endif /* DMAMUX1 */
569 
570  /* Disable the channel */
571  __HAL_DMA_DISABLE(hdma);
572 
573  /* Clear all flags */
574  hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU));
575 
576 #if defined(DMAMUX1)
577  /* Clear the DMAMUX synchro overrun flag */
578  hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
579 
580  if(hdma->DMAmuxRequestGen != 0U)
581  {
582  /* if using DMAMUX request generator, disable the DMAMUX request generator overrun IT*/
583  /* disable the request gen overrun IT*/
584  hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE;
585 
586  /* Clear the DMAMUX request generator overrun flag */
588  }
589 
590 #endif /* DMAMUX1 */
591 
592  /* Change the DMA state */
593  hdma->State = HAL_DMA_STATE_READY;
594 
595  /* Process Unlocked */
596  __HAL_UNLOCK(hdma);
597 
598  return status;
599  }
600 }
DMAMUX_RequestGenStatus_TypeDef * DMAmuxRequestGenStatus
DMAMUX_RequestGen_TypeDef * DMAmuxRequestGen
__HAL_UNLOCK(hrtc)
DMA_TypeDef * DmaBaseAddress
__IO HAL_DMA_StateTypeDef State
DMAMUX_Channel_TypeDef * DMAmuxChannel
return HAL_OK
uint32_t DMAmuxRequestGenStatusMask
DMAMUX_ChannelStatus_TypeDef * DMAmuxChannelStatus

◆ HAL_DMA_Abort_IT()

HAL_StatusTypeDef HAL_DMA_Abort_IT ( DMA_HandleTypeDef hdma)

Aborts the DMA Transfer in Interrupt mode.

Parameters
hdmapointer to a DMA_HandleTypeDef structure that contains the configuration information for the specified DMA Channel.
Return values
HALstatus

Definition at line 608 of file stm32l4xx_hal_dma.c.

609 {
610  HAL_StatusTypeDef status = HAL_OK;
611 
612  if(HAL_DMA_STATE_BUSY != hdma->State)
613  {
614  /* no transfer ongoing */
615  hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
616 
617  status = HAL_ERROR;
618  }
619  else
620  {
621  /* Disable DMA IT */
622  __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
623 
624  /* Disable the channel */
625  __HAL_DMA_DISABLE(hdma);
626 
627 #if defined(DMAMUX1)
628  /* disable the DMAMUX sync overrun IT*/
629  hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE;
630 
631  /* Clear all flags */
632  hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU));
633 
634  /* Clear the DMAMUX synchro overrun flag */
635  hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
636 
637  if(hdma->DMAmuxRequestGen != 0U)
638  {
639  /* if using DMAMUX request generator, disable the DMAMUX request generator overrun IT*/
640  /* disable the request gen overrun IT*/
641  hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE;
642 
643  /* Clear the DMAMUX request generator overrun flag */
645  }
646 
647 #else
648  /* Clear all flags */
649  hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU));
650 #endif /* DMAMUX1 */
651 
652  /* Change the DMA state */
653  hdma->State = HAL_DMA_STATE_READY;
654 
655  /* Process Unlocked */
656  __HAL_UNLOCK(hdma);
657 
658  /* Call User Abort callback */
659  if(hdma->XferAbortCallback != NULL)
660  {
661  hdma->XferAbortCallback(hdma);
662  }
663  }
664  return status;
665 }
void(* XferAbortCallback)(struct __DMA_HandleTypeDef *hdma)
DMAMUX_RequestGenStatus_TypeDef * DMAmuxRequestGenStatus
DMAMUX_RequestGen_TypeDef * DMAmuxRequestGen
__HAL_UNLOCK(hrtc)
DMA_TypeDef * DmaBaseAddress
__IO HAL_DMA_StateTypeDef State
DMAMUX_Channel_TypeDef * DMAmuxChannel
return HAL_OK
uint32_t DMAmuxRequestGenStatusMask
DMAMUX_ChannelStatus_TypeDef * DMAmuxChannelStatus

◆ HAL_DMA_IRQHandler()

void HAL_DMA_IRQHandler ( DMA_HandleTypeDef hdma)

Handle DMA interrupt request.

Parameters
hdmapointer to a DMA_HandleTypeDef structure that contains the configuration information for the specified DMA Channel.
Return values
None

Definition at line 805 of file stm32l4xx_hal_dma.c.

806 {
807  uint32_t flag_it = hdma->DmaBaseAddress->ISR;
808  uint32_t source_it = hdma->Instance->CCR;
809 
810  /* Half Transfer Complete Interrupt management ******************************/
811  if (((flag_it & (DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1CU))) != 0U) && ((source_it & DMA_IT_HT) != 0U))
812  {
813  /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */
814  if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
815  {
816  /* Disable the half transfer interrupt */
817  __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
818  }
819  /* Clear the half transfer complete flag */
820  hdma->DmaBaseAddress->IFCR = DMA_ISR_HTIF1 << (hdma->ChannelIndex & 0x1CU);
821 
822  /* DMA peripheral state is not updated in Half Transfer */
823  /* but in Transfer Complete case */
824 
825  if(hdma->XferHalfCpltCallback != NULL)
826  {
827  /* Half transfer callback */
828  hdma->XferHalfCpltCallback(hdma);
829  }
830  }
831 
832  /* Transfer Complete Interrupt management ***********************************/
833  else if (((flag_it & (DMA_FLAG_TC1 << (hdma->ChannelIndex & 0x1CU))) != 0U) && ((source_it & DMA_IT_TC) != 0U))
834  {
835  if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
836  {
837  /* Disable the transfer complete interrupt if the DMA mode is not CIRCULAR */
838  /* Disable the transfer complete and error interrupt */
839  /* if the DMA mode is not CIRCULAR */
840  __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC);
841 
842  /* Change the DMA state */
843  hdma->State = HAL_DMA_STATE_READY;
844  }
845  /* Clear the transfer complete flag */
846  hdma->DmaBaseAddress->IFCR = (DMA_ISR_TCIF1 << (hdma->ChannelIndex & 0x1CU));
847 
848  /* Process Unlocked */
849  __HAL_UNLOCK(hdma);
850 
851  if(hdma->XferCpltCallback != NULL)
852  {
853  /* Transfer complete callback */
854  hdma->XferCpltCallback(hdma);
855  }
856  }
857 
858  /* Transfer Error Interrupt management **************************************/
859  else if (((flag_it & (DMA_FLAG_TE1 << (hdma->ChannelIndex & 0x1CU))) != 0U) && ((source_it & DMA_IT_TE) != 0U))
860  {
861  /* When a DMA transfer error occurs */
862  /* A hardware clear of its EN bits is performed */
863  /* Disable ALL DMA IT */
864  __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
865 
866  /* Clear all flags */
867  hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU));
868 
869  /* Update error code */
870  hdma->ErrorCode = HAL_DMA_ERROR_TE;
871 
872  /* Change the DMA state */
873  hdma->State = HAL_DMA_STATE_READY;
874 
875  /* Process Unlocked */
876  __HAL_UNLOCK(hdma);
877 
878  if (hdma->XferErrorCallback != NULL)
879  {
880  /* Transfer error callback */
881  hdma->XferErrorCallback(hdma);
882  }
883  }
884  else
885  {
886  /* Nothing To Do */
887  }
888  return;
889 }
void(* XferCpltCallback)(struct __DMA_HandleTypeDef *hdma)
DMA_Channel_TypeDef * Instance
void(* XferErrorCallback)(struct __DMA_HandleTypeDef *hdma)
__HAL_UNLOCK(hrtc)
void(* XferHalfCpltCallback)(struct __DMA_HandleTypeDef *hdma)
DMA_TypeDef * DmaBaseAddress
__IO HAL_DMA_StateTypeDef State

◆ HAL_DMA_PollForTransfer()

HAL_StatusTypeDef HAL_DMA_PollForTransfer ( DMA_HandleTypeDef hdma,
HAL_DMA_LevelCompleteTypeDef  CompleteLevel,
uint32_t  Timeout 
)

Polling for transfer complete.

Parameters
hdmapointer to a DMA_HandleTypeDef structure that contains the configuration information for the specified DMA Channel.
CompleteLevelSpecifies the DMA level complete.
TimeoutTimeout duration.
Return values
HALstatus

Definition at line 675 of file stm32l4xx_hal_dma.c.

676 {
677  uint32_t temp;
678  uint32_t tickstart;
679 
680  if(HAL_DMA_STATE_BUSY != hdma->State)
681  {
682  /* no transfer ongoing */
683  hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
684  __HAL_UNLOCK(hdma);
685  return HAL_ERROR;
686  }
687 
688  /* Polling mode not supported in circular mode */
689  if ((hdma->Instance->CCR & DMA_CCR_CIRC) != 0U)
690  {
691  hdma->ErrorCode = HAL_DMA_ERROR_NOT_SUPPORTED;
692  return HAL_ERROR;
693  }
694 
695  /* Get the level transfer complete flag */
696  if (HAL_DMA_FULL_TRANSFER == CompleteLevel)
697  {
698  /* Transfer Complete flag */
699  temp = DMA_FLAG_TC1 << (hdma->ChannelIndex & 0x1CU);
700  }
701  else
702  {
703  /* Half Transfer Complete flag */
704  temp = DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1CU);
705  }
706 
707  /* Get tick */
708  tickstart = HAL_GetTick();
709 
710  while((hdma->DmaBaseAddress->ISR & temp) == 0U)
711  {
712  if((hdma->DmaBaseAddress->ISR & (DMA_FLAG_TE1 << (hdma->ChannelIndex& 0x1CU))) != 0U)
713  {
714  /* When a DMA transfer error occurs */
715  /* A hardware clear of its EN bits is performed */
716  /* Clear all flags */
717  hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU));
718 
719  /* Update error code */
720  hdma->ErrorCode = HAL_DMA_ERROR_TE;
721 
722  /* Change the DMA state */
723  hdma->State= HAL_DMA_STATE_READY;
724 
725  /* Process Unlocked */
726  __HAL_UNLOCK(hdma);
727 
728  return HAL_ERROR;
729  }
730  /* Check for the Timeout */
731  if(Timeout != HAL_MAX_DELAY)
732  {
733  if(((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
734  {
735  /* Update error code */
736  hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT;
737 
738  /* Change the DMA state */
739  hdma->State = HAL_DMA_STATE_READY;
740 
741  /* Process Unlocked */
742  __HAL_UNLOCK(hdma);
743 
744  return HAL_ERROR;
745  }
746  }
747  }
748 
749 #if defined(DMAMUX1)
750  /*Check for DMAMUX Request generator (if used) overrun status */
751  if(hdma->DMAmuxRequestGen != 0U)
752  {
753  /* if using DMAMUX request generator Check for DMAMUX request generator overrun */
754  if((hdma->DMAmuxRequestGenStatus->RGSR & hdma->DMAmuxRequestGenStatusMask) != 0U)
755  {
756  /* Disable the request gen overrun interrupt */
757  hdma->DMAmuxRequestGen->RGCR |= DMAMUX_RGxCR_OIE;
758 
759  /* Clear the DMAMUX request generator overrun flag */
761 
762  /* Update error code */
763  hdma->ErrorCode |= HAL_DMA_ERROR_REQGEN;
764  }
765  }
766 
767  /* Check for DMAMUX Synchronization overrun */
768  if((hdma->DMAmuxChannelStatus->CSR & hdma->DMAmuxChannelStatusMask) != 0U)
769  {
770  /* Clear the DMAMUX synchro overrun flag */
771  hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
772 
773  /* Update error code */
774  hdma->ErrorCode |= HAL_DMA_ERROR_SYNC;
775  }
776 #endif /* DMAMUX1 */
777 
778  if(HAL_DMA_FULL_TRANSFER == CompleteLevel)
779  {
780  /* Clear the transfer complete flag */
781  hdma->DmaBaseAddress->IFCR = (DMA_FLAG_TC1 << (hdma->ChannelIndex& 0x1CU));
782 
783  /* The selected Channelx EN bit is cleared (DMA is disabled and
784  all transfers are complete) */
785  hdma->State = HAL_DMA_STATE_READY;
786  }
787  else
788  {
789  /* Clear the half transfer complete flag */
790  hdma->DmaBaseAddress->IFCR = (DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1CU));
791  }
792 
793  /* Process unlocked */
794  __HAL_UNLOCK(hdma);
795 
796  return HAL_OK;
797 }
DMAMUX_RequestGenStatus_TypeDef * DMAmuxRequestGenStatus
DMAMUX_RequestGen_TypeDef * DMAmuxRequestGen
uint32_t HAL_GetTick(void)
Provide a tick value in millisecond.
DMA_Channel_TypeDef * Instance
__HAL_UNLOCK(hrtc)
DMA_TypeDef * DmaBaseAddress
__IO HAL_DMA_StateTypeDef State
return HAL_OK
uint32_t DMAmuxRequestGenStatusMask
DMAMUX_ChannelStatus_TypeDef * DMAmuxChannelStatus

◆ HAL_DMA_RegisterCallback()

HAL_StatusTypeDef HAL_DMA_RegisterCallback ( DMA_HandleTypeDef hdma,
HAL_DMA_CallbackIDTypeDef  CallbackID,
void(*)(DMA_HandleTypeDef *_hdma)  pCallback 
)

Register callbacks.

Parameters
hdmapointer to a DMA_HandleTypeDef structure that contains the configuration information for the specified DMA Channel.
CallbackIDUser Callback identifer a HAL_DMA_CallbackIDTypeDef ENUM as parameter.
pCallbackpointer to private callbacsk function which has pointer to a DMA_HandleTypeDef structure as parameter.
Return values
HALstatus

Definition at line 901 of file stm32l4xx_hal_dma.c.

902 {
903  HAL_StatusTypeDef status = HAL_OK;
904 
905  /* Process locked */
906  __HAL_LOCK(hdma);
907 
908  if(HAL_DMA_STATE_READY == hdma->State)
909  {
910  switch (CallbackID)
911  {
913  hdma->XferCpltCallback = pCallback;
914  break;
915 
917  hdma->XferHalfCpltCallback = pCallback;
918  break;
919 
921  hdma->XferErrorCallback = pCallback;
922  break;
923 
925  hdma->XferAbortCallback = pCallback;
926  break;
927 
928  default:
929  status = HAL_ERROR;
930  break;
931  }
932  }
933  else
934  {
935  status = HAL_ERROR;
936  }
937 
938  /* Release Lock */
939  __HAL_UNLOCK(hdma);
940 
941  return status;
942 }
void(* XferAbortCallback)(struct __DMA_HandleTypeDef *hdma)
void(* XferCpltCallback)(struct __DMA_HandleTypeDef *hdma)
void(* XferErrorCallback)(struct __DMA_HandleTypeDef *hdma)
__HAL_UNLOCK(hrtc)
void(* XferHalfCpltCallback)(struct __DMA_HandleTypeDef *hdma)
__HAL_LOCK(hrtc)
__IO HAL_DMA_StateTypeDef State
return HAL_OK

◆ HAL_DMA_Start()

HAL_StatusTypeDef HAL_DMA_Start ( DMA_HandleTypeDef hdma,
uint32_t  SrcAddress,
uint32_t  DstAddress,
uint32_t  DataLength 
)

Start the DMA Transfer.

Parameters
hdmapointer to a DMA_HandleTypeDef structure that contains the configuration information for the specified DMA Channel.
SrcAddressThe source memory Buffer address
DstAddressThe destination memory Buffer address
DataLengthThe length of data to be transferred from source to destination
Return values
HALstatus

Definition at line 430 of file stm32l4xx_hal_dma.c.

431 {
432  HAL_StatusTypeDef status = HAL_OK;
433 
434  /* Check the parameters */
435  assert_param(IS_DMA_BUFFER_SIZE(DataLength));
436 
437  /* Process locked */
438  __HAL_LOCK(hdma);
439 
440  if(HAL_DMA_STATE_READY == hdma->State)
441  {
442  /* Change DMA peripheral state */
443  hdma->State = HAL_DMA_STATE_BUSY;
444  hdma->ErrorCode = HAL_DMA_ERROR_NONE;
445 
446  /* Disable the peripheral */
447  __HAL_DMA_DISABLE(hdma);
448 
449  /* Configure the source, destination address and the data length & clear flags*/
450  DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
451 
452  /* Enable the Peripheral */
453  __HAL_DMA_ENABLE(hdma);
454  }
455  else
456  {
457  /* Process Unlocked */
458  __HAL_UNLOCK(hdma);
459  status = HAL_BUSY;
460  }
461  return status;
462 }
__HAL_UNLOCK(hrtc)
__HAL_LOCK(hrtc)
__IO HAL_DMA_StateTypeDef State
return HAL_OK
static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
Sets the DMA Transfer parameter.
assert_param(IS_RTC_WAKEUP_CLOCK(WakeUpClock))

◆ HAL_DMA_Start_IT()

HAL_StatusTypeDef HAL_DMA_Start_IT ( DMA_HandleTypeDef hdma,
uint32_t  SrcAddress,
uint32_t  DstAddress,
uint32_t  DataLength 
)

Start the DMA Transfer with interrupt enabled.

Parameters
hdmapointer to a DMA_HandleTypeDef structure that contains the configuration information for the specified DMA Channel.
SrcAddressThe source memory Buffer address
DstAddressThe destination memory Buffer address
DataLengthThe length of data to be transferred from source to destination
Return values
HALstatus

Definition at line 473 of file stm32l4xx_hal_dma.c.

474 {
475  HAL_StatusTypeDef status = HAL_OK;
476 
477  /* Check the parameters */
478  assert_param(IS_DMA_BUFFER_SIZE(DataLength));
479 
480  /* Process locked */
481  __HAL_LOCK(hdma);
482 
483  if(HAL_DMA_STATE_READY == hdma->State)
484  {
485  /* Change DMA peripheral state */
486  hdma->State = HAL_DMA_STATE_BUSY;
487  hdma->ErrorCode = HAL_DMA_ERROR_NONE;
488 
489  /* Disable the peripheral */
490  __HAL_DMA_DISABLE(hdma);
491 
492  /* Configure the source, destination address and the data length & clear flags*/
493  DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
494 
495  /* Enable the transfer complete interrupt */
496  /* Enable the transfer Error interrupt */
497  if(NULL != hdma->XferHalfCpltCallback )
498  {
499  /* Enable the Half transfer complete interrupt as well */
500  __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
501  }
502  else
503  {
504  __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
505  __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE));
506  }
507 
508 #ifdef DMAMUX1
509 
510  /* Check if DMAMUX Synchronization is enabled*/
511  if((hdma->DMAmuxChannel->CCR & DMAMUX_CxCR_SE) != 0U)
512  {
513  /* Enable DMAMUX sync overrun IT*/
514  hdma->DMAmuxChannel->CCR |= DMAMUX_CxCR_SOIE;
515  }
516 
517  if(hdma->DMAmuxRequestGen != 0U)
518  {
519  /* if using DMAMUX request generator, enable the DMAMUX request generator overrun IT*/
520  /* enable the request gen overrun IT*/
521  hdma->DMAmuxRequestGen->RGCR |= DMAMUX_RGxCR_OIE;
522  }
523 
524 #endif /* DMAMUX1 */
525 
526  /* Enable the Peripheral */
527  __HAL_DMA_ENABLE(hdma);
528  }
529  else
530  {
531  /* Process Unlocked */
532  __HAL_UNLOCK(hdma);
533 
534  /* Remain BUSY */
535  status = HAL_BUSY;
536  }
537  return status;
538 }
DMAMUX_RequestGen_TypeDef * DMAmuxRequestGen
__HAL_UNLOCK(hrtc)
void(* XferHalfCpltCallback)(struct __DMA_HandleTypeDef *hdma)
__HAL_LOCK(hrtc)
__IO HAL_DMA_StateTypeDef State
DMAMUX_Channel_TypeDef * DMAmuxChannel
return HAL_OK
static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
Sets the DMA Transfer parameter.
assert_param(IS_RTC_WAKEUP_CLOCK(WakeUpClock))

◆ HAL_DMA_UnRegisterCallback()

HAL_StatusTypeDef HAL_DMA_UnRegisterCallback ( DMA_HandleTypeDef hdma,
HAL_DMA_CallbackIDTypeDef  CallbackID 
)

UnRegister callbacks.

Parameters
hdmapointer to a DMA_HandleTypeDef structure that contains the configuration information for the specified DMA Channel.
CallbackIDUser Callback identifer a HAL_DMA_CallbackIDTypeDef ENUM as parameter.
Return values
HALstatus

Definition at line 952 of file stm32l4xx_hal_dma.c.

953 {
954  HAL_StatusTypeDef status = HAL_OK;
955 
956  /* Process locked */
957  __HAL_LOCK(hdma);
958 
959  if(HAL_DMA_STATE_READY == hdma->State)
960  {
961  switch (CallbackID)
962  {
964  hdma->XferCpltCallback = NULL;
965  break;
966 
968  hdma->XferHalfCpltCallback = NULL;
969  break;
970 
972  hdma->XferErrorCallback = NULL;
973  break;
974 
976  hdma->XferAbortCallback = NULL;
977  break;
978 
980  hdma->XferCpltCallback = NULL;
981  hdma->XferHalfCpltCallback = NULL;
982  hdma->XferErrorCallback = NULL;
983  hdma->XferAbortCallback = NULL;
984  break;
985 
986  default:
987  status = HAL_ERROR;
988  break;
989  }
990  }
991  else
992  {
993  status = HAL_ERROR;
994  }
995 
996  /* Release Lock */
997  __HAL_UNLOCK(hdma);
998 
999  return status;
1000 }
void(* XferAbortCallback)(struct __DMA_HandleTypeDef *hdma)
void(* XferCpltCallback)(struct __DMA_HandleTypeDef *hdma)
void(* XferErrorCallback)(struct __DMA_HandleTypeDef *hdma)
__HAL_UNLOCK(hrtc)
void(* XferHalfCpltCallback)(struct __DMA_HandleTypeDef *hdma)
__HAL_LOCK(hrtc)
__IO HAL_DMA_StateTypeDef State
return HAL_OK