21 #ifndef STM32L4xx_HAL_I2C_H 22 #define STM32L4xx_HAL_I2C_H 165 #define HAL_I2C_ERROR_NONE (0x00000000U) 166 #define HAL_I2C_ERROR_BERR (0x00000001U) 167 #define HAL_I2C_ERROR_ARLO (0x00000002U) 168 #define HAL_I2C_ERROR_AF (0x00000004U) 169 #define HAL_I2C_ERROR_OVR (0x00000008U) 170 #define HAL_I2C_ERROR_DMA (0x00000010U) 171 #define HAL_I2C_ERROR_TIMEOUT (0x00000020U) 172 #define HAL_I2C_ERROR_SIZE (0x00000040U) 173 #define HAL_I2C_ERROR_DMA_PARAM (0x00000080U) 174 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) 175 #define HAL_I2C_ERROR_INVALID_CALLBACK (0x00000100U) 177 #define HAL_I2C_ERROR_INVALID_PARAM (0x00000200U) 186 typedef struct __I2C_HandleTypeDef 219 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) 238 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) 282 #define I2C_FIRST_FRAME ((uint32_t)I2C_SOFTEND_MODE) 283 #define I2C_FIRST_AND_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE)) 284 #define I2C_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE)) 285 #define I2C_FIRST_AND_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE) 286 #define I2C_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE) 287 #define I2C_LAST_FRAME_NO_STOP ((uint32_t)I2C_SOFTEND_MODE) 292 #define I2C_OTHER_FRAME (0x000000AAU) 293 #define I2C_OTHER_AND_LAST_FRAME (0x0000AA00U) 301 #define I2C_ADDRESSINGMODE_7BIT (0x00000001U) 302 #define I2C_ADDRESSINGMODE_10BIT (0x00000002U) 310 #define I2C_DUALADDRESS_DISABLE (0x00000000U) 311 #define I2C_DUALADDRESS_ENABLE I2C_OAR2_OA2EN 319 #define I2C_OA2_NOMASK ((uint8_t)0x00U) 320 #define I2C_OA2_MASK01 ((uint8_t)0x01U) 321 #define I2C_OA2_MASK02 ((uint8_t)0x02U) 322 #define I2C_OA2_MASK03 ((uint8_t)0x03U) 323 #define I2C_OA2_MASK04 ((uint8_t)0x04U) 324 #define I2C_OA2_MASK05 ((uint8_t)0x05U) 325 #define I2C_OA2_MASK06 ((uint8_t)0x06U) 326 #define I2C_OA2_MASK07 ((uint8_t)0x07U) 334 #define I2C_GENERALCALL_DISABLE (0x00000000U) 335 #define I2C_GENERALCALL_ENABLE I2C_CR1_GCEN 343 #define I2C_NOSTRETCH_DISABLE (0x00000000U) 344 #define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH 352 #define I2C_MEMADD_SIZE_8BIT (0x00000001U) 353 #define I2C_MEMADD_SIZE_16BIT (0x00000002U) 361 #define I2C_DIRECTION_TRANSMIT (0x00000000U) 362 #define I2C_DIRECTION_RECEIVE (0x00000001U) 370 #define I2C_RELOAD_MODE I2C_CR2_RELOAD 371 #define I2C_AUTOEND_MODE I2C_CR2_AUTOEND 372 #define I2C_SOFTEND_MODE (0x00000000U) 380 #define I2C_NO_STARTSTOP (0x00000000U) 381 #define I2C_GENERATE_STOP (uint32_t)(0x80000000U | I2C_CR2_STOP) 382 #define I2C_GENERATE_START_READ (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN) 383 #define I2C_GENERATE_START_WRITE (uint32_t)(0x80000000U | I2C_CR2_START) 394 #define I2C_IT_ERRI I2C_CR1_ERRIE 395 #define I2C_IT_TCI I2C_CR1_TCIE 396 #define I2C_IT_STOPI I2C_CR1_STOPIE 397 #define I2C_IT_NACKI I2C_CR1_NACKIE 398 #define I2C_IT_ADDRI I2C_CR1_ADDRIE 399 #define I2C_IT_RXI I2C_CR1_RXIE 400 #define I2C_IT_TXI I2C_CR1_TXIE 408 #define I2C_FLAG_TXE I2C_ISR_TXE 409 #define I2C_FLAG_TXIS I2C_ISR_TXIS 410 #define I2C_FLAG_RXNE I2C_ISR_RXNE 411 #define I2C_FLAG_ADDR I2C_ISR_ADDR 412 #define I2C_FLAG_AF I2C_ISR_NACKF 413 #define I2C_FLAG_STOPF I2C_ISR_STOPF 414 #define I2C_FLAG_TC I2C_ISR_TC 415 #define I2C_FLAG_TCR I2C_ISR_TCR 416 #define I2C_FLAG_BERR I2C_ISR_BERR 417 #define I2C_FLAG_ARLO I2C_ISR_ARLO 418 #define I2C_FLAG_OVR I2C_ISR_OVR 419 #define I2C_FLAG_PECERR I2C_ISR_PECERR 420 #define I2C_FLAG_TIMEOUT I2C_ISR_TIMEOUT 421 #define I2C_FLAG_ALERT I2C_ISR_ALERT 422 #define I2C_FLAG_BUSY I2C_ISR_BUSY 423 #define I2C_FLAG_DIR I2C_ISR_DIR 442 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) 443 #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) do{ \ 444 (__HANDLE__)->State = HAL_I2C_STATE_RESET; \ 445 (__HANDLE__)->MspInitCallback = NULL; \ 446 (__HANDLE__)->MspDeInitCallback = NULL; \ 449 #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET) 466 #define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__)) 482 #define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__))) 498 #define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 523 #define I2C_FLAG_MASK (0x0001FFFFU) 524 #define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) == (__FLAG__)) ? SET : RESET) 543 #define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == I2C_FLAG_TXE) ? ((__HANDLE__)->Instance->ISR |= (__FLAG__)) \ 544 : ((__HANDLE__)->Instance->ICR = (__FLAG__))) 550 #define __HAL_I2C_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)) 556 #define __HAL_I2C_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)) 562 #define __HAL_I2C_GENERATE_NACK(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR2, I2C_CR2_NACK)) 585 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) 605 HAL_StatusTypeDef
HAL_I2C_Mem_Write(
I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
606 HAL_StatusTypeDef
HAL_I2C_Mem_Read(
I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
691 #define IS_I2C_ADDRESSING_MODE(MODE) (((MODE) == I2C_ADDRESSINGMODE_7BIT) || \ 692 ((MODE) == I2C_ADDRESSINGMODE_10BIT)) 694 #define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \ 695 ((ADDRESS) == I2C_DUALADDRESS_ENABLE)) 697 #define IS_I2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == I2C_OA2_NOMASK) || \ 698 ((MASK) == I2C_OA2_MASK01) || \ 699 ((MASK) == I2C_OA2_MASK02) || \ 700 ((MASK) == I2C_OA2_MASK03) || \ 701 ((MASK) == I2C_OA2_MASK04) || \ 702 ((MASK) == I2C_OA2_MASK05) || \ 703 ((MASK) == I2C_OA2_MASK06) || \ 704 ((MASK) == I2C_OA2_MASK07)) 706 #define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \ 707 ((CALL) == I2C_GENERALCALL_ENABLE)) 709 #define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \ 710 ((STRETCH) == I2C_NOSTRETCH_ENABLE)) 712 #define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \ 713 ((SIZE) == I2C_MEMADD_SIZE_16BIT)) 715 #define IS_TRANSFER_MODE(MODE) (((MODE) == I2C_RELOAD_MODE) || \ 716 ((MODE) == I2C_AUTOEND_MODE) || \ 717 ((MODE) == I2C_SOFTEND_MODE)) 719 #define IS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == I2C_GENERATE_STOP) || \ 720 ((REQUEST) == I2C_GENERATE_START_READ) || \ 721 ((REQUEST) == I2C_GENERATE_START_WRITE) || \ 722 ((REQUEST) == I2C_NO_STARTSTOP)) 724 #define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_FIRST_FRAME) || \ 725 ((REQUEST) == I2C_FIRST_AND_NEXT_FRAME) || \ 726 ((REQUEST) == I2C_NEXT_FRAME) || \ 727 ((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \ 728 ((REQUEST) == I2C_LAST_FRAME) || \ 729 ((REQUEST) == I2C_LAST_FRAME_NO_STOP) || \ 730 IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST)) 732 #define IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_OTHER_FRAME) || \ 733 ((REQUEST) == I2C_OTHER_AND_LAST_FRAME)) 735 #define I2C_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_RD_WRN))) 737 #define I2C_GET_ADDR_MATCH(__HANDLE__) ((uint16_t)(((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) >> 16U)) 738 #define I2C_GET_DIR(__HANDLE__) ((uint8_t)(((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) >> 16U)) 739 #define I2C_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND) 740 #define I2C_GET_OWN_ADDRESS1(__HANDLE__) ((uint16_t)((__HANDLE__)->Instance->OAR1 & I2C_OAR1_OA1)) 741 #define I2C_GET_OWN_ADDRESS2(__HANDLE__) ((uint16_t)((__HANDLE__)->Instance->OAR2 & I2C_OAR2_OA2)) 743 #define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x000003FFU) 744 #define IS_I2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FFU) 746 #define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0xFF00U))) >> 8U))) 747 #define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU)))) 749 #define I2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == I2C_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)) : \ 750 (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_ADD10) | (I2C_CR2_START)) & (~I2C_CR2_RD_WRN))) 752 #define I2C_CHECK_FLAG(__ISR__, __FLAG__) ((((__ISR__) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET) 753 #define I2C_CHECK_IT_SOURCE(__CR1__, __IT__) ((((__CR1__) & (__IT__)) == (__IT__)) ? SET : RESET)
DMA_HandleTypeDef * hdmarx
HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress)
Abort a master I2C IT or DMA process communication with Interrupt.
void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c)
Slave Rx Transfer completed callback.
void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c)
I2C abort callback.
void(* SlaveRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c)
HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
Receive in slave mode an amount of data in non-blocking mode with Interrupt.
HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
Sequential receive in master I2C mode an amount of data in non-blocking mode with Interrupt...
void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c)
Master Rx Transfer completed callback.
void(* MspInitCallback)(struct __I2C_HandleTypeDef *hi2c)
DMA handle Structure definition.
void(* ErrorCallback)(struct __I2C_HandleTypeDef *hi2c)
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
Sequential receive in slave/device I2C mode an amount of data in non-blocking mode with DMA...
HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
Write an amount of data in blocking mode to a specific memory address.
HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c)
Returns the I2C Master, Slave, Memory or no mode.
void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c)
Slave Tx Transfer completed callback.
void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c)
I2C error callback.
HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
Transmit in slave mode an amount of data in non-blocking mode with DMA.
HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
Transmit in master mode an amount of data in non-blocking mode with Interrupt.
HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c)
Return the I2C handle state.
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
Sequential receive in slave/device I2C mode an amount of data in non-blocking mode with Interrupt...
__IO uint32_t AddrEventCount
HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
Transmits in master mode an amount of data in blocking mode.
HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
Transmit in slave mode an amount of data in non-blocking mode with Interrupt.
This file contains HAL common defines, enumeration, macros and structures definitions.
HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
Sequential transmit in master I2C mode an amount of data in non-blocking mode with DMA...
HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
Reads an amount of data in non-blocking mode with DMA from a specific memory address.
void(* pI2C_CallbackTypeDef)(I2C_HandleTypeDef *hi2c)
HAL I2C Callback pointer definition.
void(* ListenCpltCallback)(struct __I2C_HandleTypeDef *hi2c)
void(* MemTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c)
void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c)
Listen Complete callback.
void(* MemRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c)
HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
Sequential receive in master I2C mode an amount of data in non-blocking mode with DMA...
HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c)
Enable the Address listen mode with Interrupt.
HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
Checks if target device is ready for communication.
void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c)
Memory Tx Transfer completed callback.
void(* SlaveTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c)
uint32_t OwnAddress2Masks
HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c)
Disable the Address listen mode with Interrupt.
void(* MasterTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c)
void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c)
This function handles I2C error interrupt request.
void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c)
This function handles I2C event interrupt request.
void(* pI2C_AddrCallbackTypeDef)(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode)
void(* AbortCpltCallback)(struct __I2C_HandleTypeDef *hi2c)
__IO HAL_I2C_ModeTypeDef Mode
HAL_StatusTypeDef HAL_I2C_UnRegisterAddrCallback(I2C_HandleTypeDef *hi2c)
UnRegister the Slave Address Match I2C Callback Info Ready I2C Callback is redirected to the weak HAL...
HAL_StatusTypeDef HAL_I2C_RegisterAddrCallback(I2C_HandleTypeDef *hi2c, pI2C_AddrCallbackTypeDef pCallback)
Register the Slave Address Match I2C Callback To be used instead of the weak HAL_I2C_AddrCallback() p...
HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
Transmits in slave mode an amount of data in blocking mode.
__IO uint32_t PreviousState
DMA_HandleTypeDef * hdmatx
HAL_LockTypeDef
HAL Lock structures definition.
void(* MspDeInitCallback)(struct __I2C_HandleTypeDef *hi2c)
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
Sequential transmit in slave/device I2C mode an amount of data in non-blocking mode with Interrupt...
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
Sequential transmit in slave/device I2C mode an amount of data in non-blocking mode with DMA...
HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
Receive in slave mode an amount of data in non-blocking mode with DMA.
Header file of I2C HAL Extended module.
HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
Write an amount of data in non-blocking mode with Interrupt to a specific memory address.
HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
Receive in slave mode an amount of data in blocking mode.
HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
Receive in master mode an amount of data in non-blocking mode with Interrupt.
HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c)
DeInitialize the I2C peripheral.
__IO HAL_I2C_StateTypeDef State
HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
Read an amount of data in blocking mode from a specific memory address.
struct __I2C_HandleTypeDef I2C_HandleTypeDef
void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c)
DeInitialize the I2C MSP.
__IO uint32_t XferOptions
HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
Write an amount of data in non-blocking mode with DMA to a specific memory address.
HAL_StatusTypeDef HAL_I2C_UnRegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID)
Unregister an I2C Callback I2C callback is redirected to the weak predefined callback.
void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c)
Initialize the I2C MSP.
uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c)
Return the I2C error code.
void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode)
Slave Address Match callback.
HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
Read an amount of data in non-blocking mode with Interrupt from a specific memory address...
HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
Sequential transmit in master I2C mode an amount of data in non-blocking mode with Interrupt...
void(* AddrCallback)(struct __I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode)
HAL_StatusTypeDef HAL_I2C_RegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID, pI2C_CallbackTypeDef pCallback)
Register a User I2C Callback To be used instead of the weak predefined callback.
HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
Transmit in master mode an amount of data in non-blocking mode with DMA.
void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c)
Master Tx Transfer completed callback.
void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c)
Memory Rx Transfer completed callback.
HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
Receives in master mode an amount of data in blocking mode.
HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
Initializes the I2C according to the specified parameters in the I2C_InitTypeDef and initialize the a...
HAL_I2C_CallbackIDTypeDef
HAL I2C Callback ID enumeration definition.
HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
Receive in master mode an amount of data in non-blocking mode with DMA.
void(* MasterRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c)