stm32l4xx_hal_smbus.h

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/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef STM32L4xx_HAL_SMBUS_H
#define STM32L4xx_HAL_SMBUS_H

#ifdef __cplusplus
extern "C" {
#endif

/* Includes ------------------------------------------------------------------*/
#include "stm32l4xx_hal_def.h"

/* Exported types ------------------------------------------------------------*/
typedef struct
{
  uint32_t Timing;                 
  uint32_t AnalogFilter;           
  uint32_t OwnAddress1;            
  uint32_t AddressingMode;         
  uint32_t DualAddressMode;        
  uint32_t OwnAddress2;            
  uint32_t OwnAddress2Masks;       
  uint32_t GeneralCallMode;        
  uint32_t NoStretchMode;          
  uint32_t PacketErrorCheckMode;   
  uint32_t PeripheralMode;         
  uint32_t SMBusTimeout;           
} SMBUS_InitTypeDef;
#define HAL_SMBUS_STATE_RESET           (0x00000000U)  
#define HAL_SMBUS_STATE_READY           (0x00000001U)  
#define HAL_SMBUS_STATE_BUSY            (0x00000002U)  
#define HAL_SMBUS_STATE_MASTER_BUSY_TX  (0x00000012U)  
#define HAL_SMBUS_STATE_MASTER_BUSY_RX  (0x00000022U)  
#define HAL_SMBUS_STATE_SLAVE_BUSY_TX   (0x00000032U)  
#define HAL_SMBUS_STATE_SLAVE_BUSY_RX   (0x00000042U)  
#define HAL_SMBUS_STATE_TIMEOUT         (0x00000003U)  
#define HAL_SMBUS_STATE_ERROR           (0x00000004U)  
#define HAL_SMBUS_STATE_LISTEN          (0x00000008U)   
#define HAL_SMBUS_ERROR_NONE            (0x00000000U)    
#define HAL_SMBUS_ERROR_BERR            (0x00000001U)    
#define HAL_SMBUS_ERROR_ARLO            (0x00000002U)    
#define HAL_SMBUS_ERROR_ACKF            (0x00000004U)    
#define HAL_SMBUS_ERROR_OVR             (0x00000008U)    
#define HAL_SMBUS_ERROR_HALTIMEOUT      (0x00000010U)    
#define HAL_SMBUS_ERROR_BUSTIMEOUT      (0x00000020U)    
#define HAL_SMBUS_ERROR_ALERT           (0x00000040U)    
#define HAL_SMBUS_ERROR_PECERR          (0x00000080U)    
#if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1)
#define HAL_SMBUS_ERROR_INVALID_CALLBACK  (0x00000100U)    
#endif /* USE_HAL_SMBUS_REGISTER_CALLBACKS */
#define HAL_SMBUS_ERROR_INVALID_PARAM    (0x00000200U)   
typedef struct __SMBUS_HandleTypeDef
{
  I2C_TypeDef                  *Instance;       
  SMBUS_InitTypeDef            Init;            
  uint8_t                      *pBuffPtr;       
  uint16_t                     XferSize;        
  __IO uint16_t                XferCount;       
  __IO uint32_t                XferOptions;     
  __IO uint32_t                PreviousState;   
  HAL_LockTypeDef              Lock;            
  __IO uint32_t                State;           
  __IO uint32_t                ErrorCode;       
#if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1)
  void (* MasterTxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus);           
  void (* MasterRxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus);           
  void (* SlaveTxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus);            
  void (* SlaveRxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus);            
  void (* ListenCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus);             
  void (* ErrorCallback)(struct __SMBUS_HandleTypeDef *hsmbus);                  
  void (* AddrCallback)(struct __SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode);  
  void (* MspInitCallback)(struct __SMBUS_HandleTypeDef *hsmbus);                
  void (* MspDeInitCallback)(struct __SMBUS_HandleTypeDef *hsmbus);              
#endif  /* USE_HAL_SMBUS_REGISTER_CALLBACKS */
} SMBUS_HandleTypeDef;

#if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1)

typedef enum
{
  HAL_SMBUS_MASTER_TX_COMPLETE_CB_ID      = 0x00U,    
  HAL_SMBUS_MASTER_RX_COMPLETE_CB_ID      = 0x01U,    
  HAL_SMBUS_SLAVE_TX_COMPLETE_CB_ID       = 0x02U,    
  HAL_SMBUS_SLAVE_RX_COMPLETE_CB_ID       = 0x03U,    
  HAL_SMBUS_LISTEN_COMPLETE_CB_ID         = 0x04U,    
  HAL_SMBUS_ERROR_CB_ID                   = 0x05U,    
  HAL_SMBUS_MSPINIT_CB_ID                 = 0x06U,    
  HAL_SMBUS_MSPDEINIT_CB_ID               = 0x07U     
} HAL_SMBUS_CallbackIDTypeDef;

typedef  void (*pSMBUS_CallbackTypeDef)(SMBUS_HandleTypeDef *hsmbus); 
typedef  void (*pSMBUS_AddrCallbackTypeDef)(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode); 
#endif /* USE_HAL_SMBUS_REGISTER_CALLBACKS */

/* Exported constants --------------------------------------------------------*/

#define SMBUS_ANALOGFILTER_ENABLE               (0x00000000U)
#define SMBUS_ANALOGFILTER_DISABLE              I2C_CR1_ANFOFF

#define SMBUS_ADDRESSINGMODE_7BIT               (0x00000001U)
#define SMBUS_ADDRESSINGMODE_10BIT              (0x00000002U)

#define SMBUS_DUALADDRESS_DISABLE               (0x00000000U)
#define SMBUS_DUALADDRESS_ENABLE                I2C_OAR2_OA2EN

#define SMBUS_OA2_NOMASK                        ((uint8_t)0x00U)
#define SMBUS_OA2_MASK01                        ((uint8_t)0x01U)
#define SMBUS_OA2_MASK02                        ((uint8_t)0x02U)
#define SMBUS_OA2_MASK03                        ((uint8_t)0x03U)
#define SMBUS_OA2_MASK04                        ((uint8_t)0x04U)
#define SMBUS_OA2_MASK05                        ((uint8_t)0x05U)
#define SMBUS_OA2_MASK06                        ((uint8_t)0x06U)
#define SMBUS_OA2_MASK07                        ((uint8_t)0x07U)

#define SMBUS_GENERALCALL_DISABLE               (0x00000000U)
#define SMBUS_GENERALCALL_ENABLE                I2C_CR1_GCEN

#define SMBUS_NOSTRETCH_DISABLE                 (0x00000000U)
#define SMBUS_NOSTRETCH_ENABLE                  I2C_CR1_NOSTRETCH

#define SMBUS_PEC_DISABLE                       (0x00000000U)
#define SMBUS_PEC_ENABLE                        I2C_CR1_PECEN

#define SMBUS_PERIPHERAL_MODE_SMBUS_HOST        I2C_CR1_SMBHEN
#define SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE       (0x00000000U)
#define SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP   I2C_CR1_SMBDEN

#define  SMBUS_SOFTEND_MODE                     (0x00000000U)
#define  SMBUS_RELOAD_MODE                      I2C_CR2_RELOAD
#define  SMBUS_AUTOEND_MODE                     I2C_CR2_AUTOEND
#define  SMBUS_SENDPEC_MODE                     I2C_CR2_PECBYTE

#define  SMBUS_NO_STARTSTOP                     (0x00000000U)
#define  SMBUS_GENERATE_STOP                    (uint32_t)(0x80000000U | I2C_CR2_STOP)
#define  SMBUS_GENERATE_START_READ              (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN)
#define  SMBUS_GENERATE_START_WRITE             (uint32_t)(0x80000000U | I2C_CR2_START)

/* List of XferOptions in usage of :
 * 1- Restart condition when direction change
 * 2- No Restart condition in other use cases
 */
#define  SMBUS_FIRST_FRAME                      SMBUS_SOFTEND_MODE
#define  SMBUS_NEXT_FRAME                       ((uint32_t)(SMBUS_RELOAD_MODE | SMBUS_SOFTEND_MODE))
#define  SMBUS_FIRST_AND_LAST_FRAME_NO_PEC      SMBUS_AUTOEND_MODE
#define  SMBUS_LAST_FRAME_NO_PEC                SMBUS_AUTOEND_MODE
#define  SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC    ((uint32_t)(SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE))
#define  SMBUS_LAST_FRAME_WITH_PEC              ((uint32_t)(SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE))

/* List of XferOptions in usage of :
 * 1- Restart condition in all use cases (direction change or not)
 */
#define  SMBUS_OTHER_FRAME_NO_PEC               (0x000000AAU)
#define  SMBUS_OTHER_FRAME_WITH_PEC             (0x0000AA00U)
#define  SMBUS_OTHER_AND_LAST_FRAME_NO_PEC      (0x00AA0000U)
#define  SMBUS_OTHER_AND_LAST_FRAME_WITH_PEC    (0xAA000000U)

#define SMBUS_IT_ERRI                           I2C_CR1_ERRIE
#define SMBUS_IT_TCI                            I2C_CR1_TCIE
#define SMBUS_IT_STOPI                          I2C_CR1_STOPIE
#define SMBUS_IT_NACKI                          I2C_CR1_NACKIE
#define SMBUS_IT_ADDRI                          I2C_CR1_ADDRIE
#define SMBUS_IT_RXI                            I2C_CR1_RXIE
#define SMBUS_IT_TXI                            I2C_CR1_TXIE
#define SMBUS_IT_TX                             (SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_TXI)
#define SMBUS_IT_RX                             (SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_NACKI | SMBUS_IT_RXI)
#define SMBUS_IT_ALERT                          (SMBUS_IT_ERRI)
#define SMBUS_IT_ADDR                           (SMBUS_IT_ADDRI | SMBUS_IT_STOPI | SMBUS_IT_NACKI)

#define  SMBUS_FLAG_TXE                         I2C_ISR_TXE
#define  SMBUS_FLAG_TXIS                        I2C_ISR_TXIS
#define  SMBUS_FLAG_RXNE                        I2C_ISR_RXNE
#define  SMBUS_FLAG_ADDR                        I2C_ISR_ADDR
#define  SMBUS_FLAG_AF                          I2C_ISR_NACKF
#define  SMBUS_FLAG_STOPF                       I2C_ISR_STOPF
#define  SMBUS_FLAG_TC                          I2C_ISR_TC
#define  SMBUS_FLAG_TCR                         I2C_ISR_TCR
#define  SMBUS_FLAG_BERR                        I2C_ISR_BERR
#define  SMBUS_FLAG_ARLO                        I2C_ISR_ARLO
#define  SMBUS_FLAG_OVR                         I2C_ISR_OVR
#define  SMBUS_FLAG_PECERR                      I2C_ISR_PECERR
#define  SMBUS_FLAG_TIMEOUT                     I2C_ISR_TIMEOUT
#define  SMBUS_FLAG_ALERT                       I2C_ISR_ALERT
#define  SMBUS_FLAG_BUSY                        I2C_ISR_BUSY
#define  SMBUS_FLAG_DIR                         I2C_ISR_DIR

/* Exported macros ------------------------------------------------------------*/
#if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1)
#define __HAL_SMBUS_RESET_HANDLE_STATE(__HANDLE__)           do{                                                   \
                                                                (__HANDLE__)->State = HAL_SMBUS_STATE_RESET;       \
                                                                (__HANDLE__)->MspInitCallback = NULL;            \
                                                                (__HANDLE__)->MspDeInitCallback = NULL;          \
                                                             } while(0)
#else
#define __HAL_SMBUS_RESET_HANDLE_STATE(__HANDLE__)         ((__HANDLE__)->State = HAL_SMBUS_STATE_RESET)
#endif

#define __HAL_SMBUS_ENABLE_IT(__HANDLE__, __INTERRUPT__)   ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__))

#define __HAL_SMBUS_DISABLE_IT(__HANDLE__, __INTERRUPT__)  ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__)))

#define __HAL_SMBUS_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)

#define SMBUS_FLAG_MASK  (0x0001FFFFU)
#define __HAL_SMBUS_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & ((__FLAG__) & SMBUS_FLAG_MASK)) == ((__FLAG__) & SMBUS_FLAG_MASK)) ? SET : RESET)

#define __HAL_SMBUS_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))

#define __HAL_SMBUS_ENABLE(__HANDLE__)                  (SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))

#define __HAL_SMBUS_DISABLE(__HANDLE__)                 (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))

#define __HAL_SMBUS_GENERATE_NACK(__HANDLE__)           (SET_BIT((__HANDLE__)->Instance->CR2, I2C_CR2_NACK))

/* Private constants ---------------------------------------------------------*/

/* Private macros ------------------------------------------------------------*/
#define IS_SMBUS_ANALOG_FILTER(FILTER)                  (((FILTER) == SMBUS_ANALOGFILTER_ENABLE) || \
                                                          ((FILTER) == SMBUS_ANALOGFILTER_DISABLE))

#define IS_SMBUS_DIGITAL_FILTER(FILTER)                 ((FILTER) <= 0x0000000FU)

#define IS_SMBUS_ADDRESSING_MODE(MODE)                  (((MODE) == SMBUS_ADDRESSINGMODE_7BIT)  || \
                                                          ((MODE) == SMBUS_ADDRESSINGMODE_10BIT))

#define IS_SMBUS_DUAL_ADDRESS(ADDRESS)                  (((ADDRESS) == SMBUS_DUALADDRESS_DISABLE) || \
                                                          ((ADDRESS) == SMBUS_DUALADDRESS_ENABLE))

#define IS_SMBUS_OWN_ADDRESS2_MASK(MASK)                (((MASK) == SMBUS_OA2_NOMASK)    || \
                                                         ((MASK) == SMBUS_OA2_MASK01)    || \
                                                         ((MASK) == SMBUS_OA2_MASK02)    || \
                                                         ((MASK) == SMBUS_OA2_MASK03)    || \
                                                         ((MASK) == SMBUS_OA2_MASK04)    || \
                                                         ((MASK) == SMBUS_OA2_MASK05)    || \
                                                         ((MASK) == SMBUS_OA2_MASK06)    || \
                                                         ((MASK) == SMBUS_OA2_MASK07))

#define IS_SMBUS_GENERAL_CALL(CALL)                     (((CALL) == SMBUS_GENERALCALL_DISABLE) || \
                                                         ((CALL) == SMBUS_GENERALCALL_ENABLE))

#define IS_SMBUS_NO_STRETCH(STRETCH)                    (((STRETCH) == SMBUS_NOSTRETCH_DISABLE) || \
                                                         ((STRETCH) == SMBUS_NOSTRETCH_ENABLE))

#define IS_SMBUS_PEC(PEC)                               (((PEC) == SMBUS_PEC_DISABLE) || \
                                                          ((PEC) == SMBUS_PEC_ENABLE))

#define IS_SMBUS_PERIPHERAL_MODE(MODE)                  (((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_HOST)    || \
                                                          ((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE)  || \
                                                          ((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP))

#define IS_SMBUS_TRANSFER_MODE(MODE)                    (((MODE) == SMBUS_RELOAD_MODE)                           || \
                                                          ((MODE) == SMBUS_AUTOEND_MODE)                         || \
                                                          ((MODE) == SMBUS_SOFTEND_MODE)                         || \
                                                          ((MODE) == SMBUS_SENDPEC_MODE)                         || \
                                                          ((MODE) == (SMBUS_RELOAD_MODE | SMBUS_SENDPEC_MODE))   || \
                                                          ((MODE) == (SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE))  || \
                                                          ((MODE) == (SMBUS_AUTOEND_MODE | SMBUS_RELOAD_MODE))   || \
                                                          ((MODE) == (SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE | SMBUS_RELOAD_MODE )))


#define IS_SMBUS_TRANSFER_REQUEST(REQUEST)              (((REQUEST) == SMBUS_GENERATE_STOP)              || \
                                                          ((REQUEST) == SMBUS_GENERATE_START_READ)       || \
                                                          ((REQUEST) == SMBUS_GENERATE_START_WRITE)      || \
                                                          ((REQUEST) == SMBUS_NO_STARTSTOP))


#define IS_SMBUS_TRANSFER_OPTIONS_REQUEST(REQUEST)      (IS_SMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST)       || \
                                                          ((REQUEST) == SMBUS_FIRST_FRAME)                       || \
                                                          ((REQUEST) == SMBUS_NEXT_FRAME)                        || \
                                                          ((REQUEST) == SMBUS_FIRST_AND_LAST_FRAME_NO_PEC)       || \
                                                          ((REQUEST) == SMBUS_LAST_FRAME_NO_PEC)                 || \
                                                          ((REQUEST) == SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC)     || \
                                                          ((REQUEST) == SMBUS_LAST_FRAME_WITH_PEC))

#define IS_SMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == SMBUS_OTHER_FRAME_NO_PEC)                || \
                                                          ((REQUEST) == SMBUS_OTHER_AND_LAST_FRAME_NO_PEC)       || \
                                                          ((REQUEST) == SMBUS_OTHER_FRAME_WITH_PEC)              || \
                                                          ((REQUEST) == SMBUS_OTHER_AND_LAST_FRAME_WITH_PEC))

#define SMBUS_RESET_CR1(__HANDLE__)                       ((__HANDLE__)->Instance->CR1 &= (uint32_t)~((uint32_t)(I2C_CR1_SMBHEN | I2C_CR1_SMBDEN | I2C_CR1_PECEN)))
#define SMBUS_RESET_CR2(__HANDLE__)                       ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_RD_WRN)))

#define SMBUS_GENERATE_START(__ADDMODE__,__ADDRESS__)     (((__ADDMODE__) == SMBUS_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)) : \
                                                                  (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_ADD10) | (I2C_CR2_START)) & (~I2C_CR2_RD_WRN)))

#define SMBUS_GET_ADDR_MATCH(__HANDLE__)                  (((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) >> 17U)
#define SMBUS_GET_DIR(__HANDLE__)                         (((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) >> 16U)
#define SMBUS_GET_STOP_MODE(__HANDLE__)                   ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND)
#define SMBUS_GET_PEC_MODE(__HANDLE__)                    ((__HANDLE__)->Instance->CR2 & I2C_CR2_PECBYTE)
#define SMBUS_GET_ALERT_ENABLED(__HANDLE__)                ((__HANDLE__)->Instance->CR1 & I2C_CR1_ALERTEN)

#define SMBUS_CHECK_FLAG(__ISR__, __FLAG__)             ((((__ISR__) & ((__FLAG__) & SMBUS_FLAG_MASK)) == ((__FLAG__) & SMBUS_FLAG_MASK)) ? SET : RESET)
#define SMBUS_CHECK_IT_SOURCE(__CR1__, __IT__)          ((((__CR1__) & (__IT__)) == (__IT__)) ? SET : RESET)

#define IS_SMBUS_OWN_ADDRESS1(ADDRESS1)                         ((ADDRESS1) <= 0x000003FFU)
#define IS_SMBUS_OWN_ADDRESS2(ADDRESS2)                         ((ADDRESS2) <= (uint16_t)0x00FFU)

/* Exported functions --------------------------------------------------------*/
/* Initialization and de-initialization functions  ****************************/
HAL_StatusTypeDef HAL_SMBUS_Init(SMBUS_HandleTypeDef *hsmbus);
HAL_StatusTypeDef HAL_SMBUS_DeInit(SMBUS_HandleTypeDef *hsmbus);
void HAL_SMBUS_MspInit(SMBUS_HandleTypeDef *hsmbus);
void HAL_SMBUS_MspDeInit(SMBUS_HandleTypeDef *hsmbus);
HAL_StatusTypeDef HAL_SMBUS_ConfigAnalogFilter(SMBUS_HandleTypeDef *hsmbus, uint32_t AnalogFilter);
HAL_StatusTypeDef HAL_SMBUS_ConfigDigitalFilter(SMBUS_HandleTypeDef *hsmbus, uint32_t DigitalFilter);

/* Callbacks Register/UnRegister functions  ***********************************/
#if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1)
HAL_StatusTypeDef HAL_SMBUS_RegisterCallback(SMBUS_HandleTypeDef *hsmbus, HAL_SMBUS_CallbackIDTypeDef CallbackID, pSMBUS_CallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_SMBUS_UnRegisterCallback(SMBUS_HandleTypeDef *hsmbus, HAL_SMBUS_CallbackIDTypeDef CallbackID);

HAL_StatusTypeDef HAL_SMBUS_RegisterAddrCallback(SMBUS_HandleTypeDef *hsmbus, pSMBUS_AddrCallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_SMBUS_UnRegisterAddrCallback(SMBUS_HandleTypeDef *hsmbus);
#endif /* USE_HAL_SMBUS_REGISTER_CALLBACKS */

/* IO operation functions  *****************************************************/
/******* Blocking mode: Polling */
HAL_StatusTypeDef HAL_SMBUS_IsDeviceReady(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout);
/******* Non-Blocking mode: Interrupt */
HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
HAL_StatusTypeDef HAL_SMBUS_Master_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
HAL_StatusTypeDef HAL_SMBUS_Master_Abort_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress);
HAL_StatusTypeDef HAL_SMBUS_Slave_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
HAL_StatusTypeDef HAL_SMBUS_Slave_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions);

HAL_StatusTypeDef HAL_SMBUS_EnableAlert_IT(SMBUS_HandleTypeDef *hsmbus);
HAL_StatusTypeDef HAL_SMBUS_DisableAlert_IT(SMBUS_HandleTypeDef *hsmbus);
HAL_StatusTypeDef HAL_SMBUS_EnableListen_IT(SMBUS_HandleTypeDef *hsmbus);
HAL_StatusTypeDef HAL_SMBUS_DisableListen_IT(SMBUS_HandleTypeDef *hsmbus);
/******* SMBUS IRQHandler and Callbacks used in non blocking modes (Interrupt) */
void HAL_SMBUS_EV_IRQHandler(SMBUS_HandleTypeDef *hsmbus);
void HAL_SMBUS_ER_IRQHandler(SMBUS_HandleTypeDef *hsmbus);
void HAL_SMBUS_MasterTxCpltCallback(SMBUS_HandleTypeDef *hsmbus);
void HAL_SMBUS_MasterRxCpltCallback(SMBUS_HandleTypeDef *hsmbus);
void HAL_SMBUS_SlaveTxCpltCallback(SMBUS_HandleTypeDef *hsmbus);
void HAL_SMBUS_SlaveRxCpltCallback(SMBUS_HandleTypeDef *hsmbus);
void HAL_SMBUS_AddrCallback(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode);
void HAL_SMBUS_ListenCpltCallback(SMBUS_HandleTypeDef *hsmbus);
void HAL_SMBUS_ErrorCallback(SMBUS_HandleTypeDef *hsmbus);

/* Peripheral State and Errors functions  **************************************************/
uint32_t HAL_SMBUS_GetState(SMBUS_HandleTypeDef *hsmbus);
uint32_t HAL_SMBUS_GetError(SMBUS_HandleTypeDef *hsmbus);

/* Private Functions ---------------------------------------------------------*/
/* Private functions are defined in stm32l4xx_hal_smbus.c file */
#ifdef __cplusplus
}
#endif


#endif /* STM32L4xx_HAL_SMBUS_H */

/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/