STM32L4xx_HAL_Driver  1.14.0
stm32l4xx_ll_usart.h
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1 
20 /* Define to prevent recursive inclusion -------------------------------------*/
21 #ifndef STM32L4xx_LL_USART_H
22 #define STM32L4xx_LL_USART_H
23 
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27 
28 /* Includes ------------------------------------------------------------------*/
29 #include "stm32l4xx.h"
30 
35 #if defined (USART1) || defined (USART2) || defined (USART3) || defined (UART4) || defined (UART5)
36 
41 /* Private types -------------------------------------------------------------*/
42 /* Private variables ---------------------------------------------------------*/
43 #if defined(USART_PRESC_PRESCALER)
44 
47 /* Array used to get the USART prescaler division decimal values versus @ref USART_LL_EC_PRESCALER values */
48 static const uint32_t USART_PRESCALER_TAB[] =
49 {
50  1UL,
51  2UL,
52  4UL,
53  6UL,
54  8UL,
55  10UL,
56  12UL,
57  16UL,
58  32UL,
59  64UL,
60  128UL,
61  256UL
62 };
66 #endif /* USART_PRESC_PRESCALER */
67 
68 /* Private constants ---------------------------------------------------------*/
76 /* Private macros ------------------------------------------------------------*/
77 #if defined(USE_FULL_LL_DRIVER)
78 
84 #endif /*USE_FULL_LL_DRIVER*/
85 
86 /* Exported types ------------------------------------------------------------*/
87 #if defined(USE_FULL_LL_DRIVER)
88 
95 typedef struct
96 {
97 #if defined(USART_PRESC_PRESCALER)
98  uint32_t PrescalerValue;
102 #endif /* USART_PRESC_PRESCALER */
103 
104  uint32_t BaudRate;
108  uint32_t DataWidth;
113  uint32_t StopBits;
118  uint32_t Parity;
123  uint32_t TransferDirection;
133  uint32_t OverSampling;
139 
143 typedef struct
144 {
145  uint32_t ClockOutput;
152  uint32_t ClockPolarity;
158  uint32_t ClockPhase;
164  uint32_t LastBitClockPulse;
172 
176 #endif /* USE_FULL_LL_DRIVER */
177 
178 /* Exported constants --------------------------------------------------------*/
187 #define LL_USART_ICR_PECF USART_ICR_PECF
188 #define LL_USART_ICR_FECF USART_ICR_FECF
189 #define LL_USART_ICR_NECF USART_ICR_NECF
190 #define LL_USART_ICR_ORECF USART_ICR_ORECF
191 #define LL_USART_ICR_IDLECF USART_ICR_IDLECF
192 #if defined(USART_CR1_FIFOEN)
193 #define LL_USART_ICR_TXFECF USART_ICR_TXFECF
194 #endif /* USART_CR1_FIFOEN */
195 #define LL_USART_ICR_TCCF USART_ICR_TCCF
196 #if defined(USART_TCBGT_SUPPORT)
197 #define LL_USART_ICR_TCBGTCF USART_ICR_TCBGTCF
198 #endif /* USART_TCBGT_SUPPORT */
199 #define LL_USART_ICR_LBDCF USART_ICR_LBDCF
200 #define LL_USART_ICR_CTSCF USART_ICR_CTSCF
201 #define LL_USART_ICR_RTOCF USART_ICR_RTOCF
202 #define LL_USART_ICR_EOBCF USART_ICR_EOBCF
203 #if defined(USART_CR2_SLVEN)
204 #define LL_USART_ICR_UDRCF USART_ICR_UDRCF
205 #endif /* USART_CR2_SLVEN */
206 #define LL_USART_ICR_CMCF USART_ICR_CMCF
207 #define LL_USART_ICR_WUCF USART_ICR_WUCF
216 #define LL_USART_ISR_PE USART_ISR_PE
217 #define LL_USART_ISR_FE USART_ISR_FE
218 #define LL_USART_ISR_NE USART_ISR_NE
219 #define LL_USART_ISR_ORE USART_ISR_ORE
220 #define LL_USART_ISR_IDLE USART_ISR_IDLE
221 #if defined(USART_CR1_FIFOEN)
222 #define LL_USART_ISR_RXNE_RXFNE USART_ISR_RXNE_RXFNE
223 #else
224 #define LL_USART_ISR_RXNE USART_ISR_RXNE
225 #endif /* USART_CR1_FIFOEN */
226 #define LL_USART_ISR_TC USART_ISR_TC
227 #if defined(USART_CR1_FIFOEN)
228 #define LL_USART_ISR_TXE_TXFNF USART_ISR_TXE_TXFNF
229 #else
230 #define LL_USART_ISR_TXE USART_ISR_TXE
231 #endif /* USART_CR1_FIFOEN */
232 #define LL_USART_ISR_LBDF USART_ISR_LBDF
233 #define LL_USART_ISR_CTSIF USART_ISR_CTSIF
234 #define LL_USART_ISR_CTS USART_ISR_CTS
235 #define LL_USART_ISR_RTOF USART_ISR_RTOF
236 #define LL_USART_ISR_EOBF USART_ISR_EOBF
237 #if defined(USART_CR2_SLVEN)
238 #define LL_USART_ISR_UDR USART_ISR_UDR
239 #endif /* USART_CR2_SLVEN */
240 #define LL_USART_ISR_ABRE USART_ISR_ABRE
241 #define LL_USART_ISR_ABRF USART_ISR_ABRF
242 #define LL_USART_ISR_BUSY USART_ISR_BUSY
243 #define LL_USART_ISR_CMF USART_ISR_CMF
244 #define LL_USART_ISR_SBKF USART_ISR_SBKF
245 #define LL_USART_ISR_RWU USART_ISR_RWU
246 #define LL_USART_ISR_WUF USART_ISR_WUF
247 #define LL_USART_ISR_TEACK USART_ISR_TEACK
248 #define LL_USART_ISR_REACK USART_ISR_REACK
249 #if defined(USART_CR1_FIFOEN)
250 #define LL_USART_ISR_TXFE USART_ISR_TXFE
251 #define LL_USART_ISR_RXFF USART_ISR_RXFF
252 #endif /* USART_CR1_FIFOEN */
253 #if defined(USART_TCBGT_SUPPORT)
254 #define LL_USART_ISR_TCBGT USART_ISR_TCBGT
255 #endif /* USART_TCBGT_SUPPORT */
256 #if defined(USART_CR1_FIFOEN)
257 #define LL_USART_ISR_RXFT USART_ISR_RXFT
258 #define LL_USART_ISR_TXFT USART_ISR_TXFT
259 #endif /* USART_CR1_FIFOEN */
260 
268 #define LL_USART_CR1_IDLEIE USART_CR1_IDLEIE
269 #if defined(USART_CR1_FIFOEN)
270 #define LL_USART_CR1_RXNEIE_RXFNEIE USART_CR1_RXNEIE_RXFNEIE
271 #else
272 #define LL_USART_CR1_RXNEIE USART_CR1_RXNEIE
273 #endif /* USART_CR1_FIFOEN */
274 #define LL_USART_CR1_TCIE USART_CR1_TCIE
275 #if defined(USART_CR1_FIFOEN)
276 #define LL_USART_CR1_TXEIE_TXFNFIE USART_CR1_TXEIE_TXFNFIE
277 #else
278 #define LL_USART_CR1_TXEIE USART_CR1_TXEIE
279 #endif /* USART_CR1_FIFOEN */
280 #define LL_USART_CR1_PEIE USART_CR1_PEIE
281 #define LL_USART_CR1_CMIE USART_CR1_CMIE
282 #define LL_USART_CR1_RTOIE USART_CR1_RTOIE
283 #define LL_USART_CR1_EOBIE USART_CR1_EOBIE
284 #if defined(USART_CR1_FIFOEN)
285 #define LL_USART_CR1_TXFEIE USART_CR1_TXFEIE
286 #define LL_USART_CR1_RXFFIE USART_CR1_RXFFIE
287 #endif /* USART_CR1_FIFOEN */
288 #define LL_USART_CR2_LBDIE USART_CR2_LBDIE
289 #define LL_USART_CR3_EIE USART_CR3_EIE
290 #define LL_USART_CR3_CTSIE USART_CR3_CTSIE
291 #define LL_USART_CR3_WUFIE USART_CR3_WUFIE
292 #if defined(USART_CR1_FIFOEN)
293 #define LL_USART_CR3_TXFTIE USART_CR3_TXFTIE
294 #endif /* USART_CR1_FIFOEN */
295 #if defined(USART_TCBGT_SUPPORT)
296 #define LL_USART_CR3_TCBGTIE USART_CR3_TCBGTIE
297 #endif /* USART_TCBGT_SUPPORT */
298 #if defined(USART_CR1_FIFOEN)
299 #define LL_USART_CR3_RXFTIE USART_CR3_RXFTIE
300 #endif /* USART_CR1_FIFOEN */
301 
305 #if defined(USART_CR1_FIFOEN)
306 
309 #define LL_USART_FIFOTHRESHOLD_1_8 0x00000000U
310 #define LL_USART_FIFOTHRESHOLD_1_4 0x00000001U
311 #define LL_USART_FIFOTHRESHOLD_1_2 0x00000002U
312 #define LL_USART_FIFOTHRESHOLD_3_4 0x00000003U
313 #define LL_USART_FIFOTHRESHOLD_7_8 0x00000004U
314 #define LL_USART_FIFOTHRESHOLD_8_8 0x00000005U
319 #endif /* USART_CR1_FIFOEN */
320 
323 #define LL_USART_DIRECTION_NONE 0x00000000U
324 #define LL_USART_DIRECTION_RX USART_CR1_RE
325 #define LL_USART_DIRECTION_TX USART_CR1_TE
326 #define LL_USART_DIRECTION_TX_RX (USART_CR1_TE |USART_CR1_RE)
334 #define LL_USART_PARITY_NONE 0x00000000U
335 #define LL_USART_PARITY_EVEN USART_CR1_PCE
336 #define LL_USART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS)
344 #define LL_USART_WAKEUP_IDLELINE 0x00000000U
345 #define LL_USART_WAKEUP_ADDRESSMARK USART_CR1_WAKE
353 #define LL_USART_DATAWIDTH_7B USART_CR1_M1
354 #define LL_USART_DATAWIDTH_8B 0x00000000U
355 #define LL_USART_DATAWIDTH_9B USART_CR1_M0
363 #define LL_USART_OVERSAMPLING_16 0x00000000U
364 #define LL_USART_OVERSAMPLING_8 USART_CR1_OVER8
369 #if defined(USE_FULL_LL_DRIVER)
370 
374 #define LL_USART_CLOCK_DISABLE 0x00000000U
375 #define LL_USART_CLOCK_ENABLE USART_CR2_CLKEN
379 #endif /*USE_FULL_LL_DRIVER*/
380 
384 #define LL_USART_LASTCLKPULSE_NO_OUTPUT 0x00000000U
385 #define LL_USART_LASTCLKPULSE_OUTPUT USART_CR2_LBCL
393 #define LL_USART_PHASE_1EDGE 0x00000000U
394 #define LL_USART_PHASE_2EDGE USART_CR2_CPHA
402 #define LL_USART_POLARITY_LOW 0x00000000U
403 #define LL_USART_POLARITY_HIGH USART_CR2_CPOL
408 #if defined(USART_PRESC_PRESCALER)
409 
412 #define LL_USART_PRESCALER_DIV1 0x00000000U
413 #define LL_USART_PRESCALER_DIV2 (USART_PRESC_PRESCALER_0)
414 #define LL_USART_PRESCALER_DIV4 (USART_PRESC_PRESCALER_1)
415 #define LL_USART_PRESCALER_DIV6 (USART_PRESC_PRESCALER_1 | USART_PRESC_PRESCALER_0)
416 #define LL_USART_PRESCALER_DIV8 (USART_PRESC_PRESCALER_2)
417 #define LL_USART_PRESCALER_DIV10 (USART_PRESC_PRESCALER_2 | USART_PRESC_PRESCALER_0)
418 #define LL_USART_PRESCALER_DIV12 (USART_PRESC_PRESCALER_2 | USART_PRESC_PRESCALER_1)
419 #define LL_USART_PRESCALER_DIV16 (USART_PRESC_PRESCALER_2 | USART_PRESC_PRESCALER_1 | USART_PRESC_PRESCALER_0)
420 #define LL_USART_PRESCALER_DIV32 (USART_PRESC_PRESCALER_3)
421 #define LL_USART_PRESCALER_DIV64 (USART_PRESC_PRESCALER_3 | USART_PRESC_PRESCALER_0)
422 #define LL_USART_PRESCALER_DIV128 (USART_PRESC_PRESCALER_3 | USART_PRESC_PRESCALER_1)
423 #define LL_USART_PRESCALER_DIV256 (USART_PRESC_PRESCALER_3 | USART_PRESC_PRESCALER_1 | USART_PRESC_PRESCALER_0)
428 #endif /* USART_PRESC_PRESCALER */
429 
432 #define LL_USART_STOPBITS_0_5 USART_CR2_STOP_0
433 #define LL_USART_STOPBITS_1 0x00000000U
434 #define LL_USART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1)
435 #define LL_USART_STOPBITS_2 USART_CR2_STOP_1
443 #define LL_USART_TXRX_STANDARD 0x00000000U
444 #define LL_USART_TXRX_SWAPPED (USART_CR2_SWAP)
452 #define LL_USART_RXPIN_LEVEL_STANDARD 0x00000000U
453 #define LL_USART_RXPIN_LEVEL_INVERTED (USART_CR2_RXINV)
461 #define LL_USART_TXPIN_LEVEL_STANDARD 0x00000000U
462 #define LL_USART_TXPIN_LEVEL_INVERTED (USART_CR2_TXINV)
470 #define LL_USART_BINARY_LOGIC_POSITIVE 0x00000000U
471 #define LL_USART_BINARY_LOGIC_NEGATIVE USART_CR2_DATAINV
479 #define LL_USART_BITORDER_LSBFIRST 0x00000000U
480 #define LL_USART_BITORDER_MSBFIRST USART_CR2_MSBFIRST
488 #define LL_USART_AUTOBAUD_DETECT_ON_STARTBIT 0x00000000U
489 #define LL_USART_AUTOBAUD_DETECT_ON_FALLINGEDGE USART_CR2_ABRMODE_0
490 #define LL_USART_AUTOBAUD_DETECT_ON_7F_FRAME USART_CR2_ABRMODE_1
491 #define LL_USART_AUTOBAUD_DETECT_ON_55_FRAME (USART_CR2_ABRMODE_1 | USART_CR2_ABRMODE_0)
499 #define LL_USART_ADDRESS_DETECT_4B 0x00000000U
500 #define LL_USART_ADDRESS_DETECT_7B USART_CR2_ADDM7
508 #define LL_USART_HWCONTROL_NONE 0x00000000U
509 #define LL_USART_HWCONTROL_RTS USART_CR3_RTSE
510 #define LL_USART_HWCONTROL_CTS USART_CR3_CTSE
511 #define LL_USART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE)
519 #define LL_USART_WAKEUP_ON_ADDRESS 0x00000000U
520 #define LL_USART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1
521 #define LL_USART_WAKEUP_ON_RXNE (USART_CR3_WUS_0 | USART_CR3_WUS_1)
529 #define LL_USART_IRDA_POWER_NORMAL 0x00000000U
530 #define LL_USART_IRDA_POWER_LOW USART_CR3_IRLP
538 #define LL_USART_LINBREAK_DETECT_10B 0x00000000U
539 #define LL_USART_LINBREAK_DETECT_11B USART_CR2_LBDL
547 #define LL_USART_DE_POLARITY_HIGH 0x00000000U
548 #define LL_USART_DE_POLARITY_LOW USART_CR3_DEP
556 #define LL_USART_DMA_REG_DATA_TRANSMIT 0x00000000U
557 #define LL_USART_DMA_REG_DATA_RECEIVE 0x00000001U
566 /* Exported macro ------------------------------------------------------------*/
567 
582 #define LL_USART_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
583 
590 #define LL_USART_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
591 
621 #if defined(USART_PRESC_PRESCALER)
622 #define __LL_USART_DIV_SAMPLING8(__PERIPHCLK__, __PRESCALER__, __BAUDRATE__) (((((__PERIPHCLK__)/(USART_PRESCALER_TAB[(__PRESCALER__)]))*2U)\
623  + ((__BAUDRATE__)/2U))/(__BAUDRATE__))
624 #else
625 #define __LL_USART_DIV_SAMPLING8(__PERIPHCLK__, __BAUDRATE__) ((((__PERIPHCLK__)*2U)\
626  + ((__BAUDRATE__)/2U))/(__BAUDRATE__))
627 #endif /* USART_PRESC_PRESCALER */
628 
651 #if defined(USART_PRESC_PRESCALER)
652 #define __LL_USART_DIV_SAMPLING16(__PERIPHCLK__, __PRESCALER__, __BAUDRATE__) ((((__PERIPHCLK__)/(USART_PRESCALER_TAB[(__PRESCALER__)]))\
653  + ((__BAUDRATE__)/2U))/(__BAUDRATE__))
654 #else
655 #define __LL_USART_DIV_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) (((__PERIPHCLK__) + ((__BAUDRATE__)/2U))/(__BAUDRATE__))
656 #endif /* USART_PRESC_PRESCALER */
657 
666 /* Exported functions --------------------------------------------------------*/
667 
682 __STATIC_INLINE void LL_USART_Enable(USART_TypeDef *USARTx)
683 {
684  SET_BIT(USARTx->CR1, USART_CR1_UE);
685 }
686 
696 __STATIC_INLINE void LL_USART_Disable(USART_TypeDef *USARTx)
697 {
698  CLEAR_BIT(USARTx->CR1, USART_CR1_UE);
699 }
700 
707 __STATIC_INLINE uint32_t LL_USART_IsEnabled(USART_TypeDef *USARTx)
708 {
709  return ((READ_BIT(USARTx->CR1, USART_CR1_UE) == (USART_CR1_UE)) ? 1UL : 0UL);
710 }
711 
712 #if defined(USART_CR1_FIFOEN)
713 
721 __STATIC_INLINE void LL_USART_EnableFIFO(USART_TypeDef *USARTx)
722 {
723  SET_BIT(USARTx->CR1, USART_CR1_FIFOEN);
724 }
725 
734 __STATIC_INLINE void LL_USART_DisableFIFO(USART_TypeDef *USARTx)
735 {
736  CLEAR_BIT(USARTx->CR1, USART_CR1_FIFOEN);
737 }
738 
747 __STATIC_INLINE uint32_t LL_USART_IsEnabledFIFO(USART_TypeDef *USARTx)
748 {
749  return ((READ_BIT(USARTx->CR1, USART_CR1_FIFOEN) == (USART_CR1_FIFOEN)) ? 1UL : 0UL);
750 }
751 
767 __STATIC_INLINE void LL_USART_SetTXFIFOThreshold(USART_TypeDef *USARTx, uint32_t Threshold)
768 {
769  MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG, Threshold << USART_CR3_TXFTCFG_Pos);
770 }
771 
786 __STATIC_INLINE uint32_t LL_USART_GetTXFIFOThreshold(USART_TypeDef *USARTx)
787 {
788  return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos);
789 }
790 
806 __STATIC_INLINE void LL_USART_SetRXFIFOThreshold(USART_TypeDef *USARTx, uint32_t Threshold)
807 {
808  MODIFY_REG(USARTx->CR3, USART_CR3_RXFTCFG, Threshold << USART_CR3_RXFTCFG_Pos);
809 }
810 
825 __STATIC_INLINE uint32_t LL_USART_GetRXFIFOThreshold(USART_TypeDef *USARTx)
826 {
827  return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos);
828 }
829 
853 __STATIC_INLINE void LL_USART_ConfigFIFOsThreshold(USART_TypeDef *USARTx, uint32_t TXThreshold, uint32_t RXThreshold)
854 {
855  MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG | USART_CR3_RXFTCFG, (TXThreshold << USART_CR3_TXFTCFG_Pos) | (RXThreshold << USART_CR3_RXFTCFG_Pos));
856 }
857 
858 #endif /* USART_CR1_FIFOEN */
859 
869 __STATIC_INLINE void LL_USART_EnableInStopMode(USART_TypeDef *USARTx)
870 {
871  SET_BIT(USARTx->CR1, USART_CR1_UESM);
872 }
873 
883 __STATIC_INLINE void LL_USART_DisableInStopMode(USART_TypeDef *USARTx)
884 {
885  CLEAR_BIT(USARTx->CR1, USART_CR1_UESM);
886 }
887 
896 __STATIC_INLINE uint32_t LL_USART_IsEnabledInStopMode(USART_TypeDef *USARTx)
897 {
898  return ((READ_BIT(USARTx->CR1, USART_CR1_UESM) == (USART_CR1_UESM)) ? 1UL : 0UL);
899 }
900 
901 #if defined(USART_CR3_UCESM)
902 
909 __STATIC_INLINE void LL_USART_EnableClockInStopMode(USART_TypeDef *USARTx)
910 {
911  SET_BIT(USARTx->CR3, USART_CR3_UCESM);
912 }
913 
921 __STATIC_INLINE void LL_USART_DisableClockInStopMode(USART_TypeDef *USARTx)
922 {
923  CLEAR_BIT(USARTx->CR3, USART_CR3_UCESM);
924 }
925 
932 __STATIC_INLINE uint32_t LL_USART_IsClockEnabledInStopMode(USART_TypeDef *USARTx)
933 {
934  return (READ_BIT(USARTx->CR3, USART_CR3_UCESM) == (USART_CR3_UCESM));
935 }
936 
937 #endif /* USART_CR3_UCESM */
938 
944 __STATIC_INLINE void LL_USART_EnableDirectionRx(USART_TypeDef *USARTx)
945 {
946  SET_BIT(USARTx->CR1, USART_CR1_RE);
947 }
948 
955 __STATIC_INLINE void LL_USART_DisableDirectionRx(USART_TypeDef *USARTx)
956 {
957  CLEAR_BIT(USARTx->CR1, USART_CR1_RE);
958 }
959 
966 __STATIC_INLINE void LL_USART_EnableDirectionTx(USART_TypeDef *USARTx)
967 {
968  SET_BIT(USARTx->CR1, USART_CR1_TE);
969 }
970 
977 __STATIC_INLINE void LL_USART_DisableDirectionTx(USART_TypeDef *USARTx)
978 {
979  CLEAR_BIT(USARTx->CR1, USART_CR1_TE);
980 }
981 
995 __STATIC_INLINE void LL_USART_SetTransferDirection(USART_TypeDef *USARTx, uint32_t TransferDirection)
996 {
997  MODIFY_REG(USARTx->CR1, USART_CR1_RE | USART_CR1_TE, TransferDirection);
998 }
999 
1011 __STATIC_INLINE uint32_t LL_USART_GetTransferDirection(USART_TypeDef *USARTx)
1012 {
1013  return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_RE | USART_CR1_TE));
1014 }
1015 
1030 __STATIC_INLINE void LL_USART_SetParity(USART_TypeDef *USARTx, uint32_t Parity)
1031 {
1032  MODIFY_REG(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE, Parity);
1033 }
1034 
1045 __STATIC_INLINE uint32_t LL_USART_GetParity(USART_TypeDef *USARTx)
1046 {
1047  return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE));
1048 }
1049 
1059 __STATIC_INLINE void LL_USART_SetWakeUpMethod(USART_TypeDef *USARTx, uint32_t Method)
1060 {
1061  MODIFY_REG(USARTx->CR1, USART_CR1_WAKE, Method);
1062 }
1063 
1072 __STATIC_INLINE uint32_t LL_USART_GetWakeUpMethod(USART_TypeDef *USARTx)
1073 {
1074  return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_WAKE));
1075 }
1076 
1088 __STATIC_INLINE void LL_USART_SetDataWidth(USART_TypeDef *USARTx, uint32_t DataWidth)
1089 {
1090  MODIFY_REG(USARTx->CR1, USART_CR1_M, DataWidth);
1091 }
1092 
1103 __STATIC_INLINE uint32_t LL_USART_GetDataWidth(USART_TypeDef *USARTx)
1104 {
1105  return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_M));
1106 }
1107 
1114 __STATIC_INLINE void LL_USART_EnableMuteMode(USART_TypeDef *USARTx)
1115 {
1116  SET_BIT(USARTx->CR1, USART_CR1_MME);
1117 }
1118 
1125 __STATIC_INLINE void LL_USART_DisableMuteMode(USART_TypeDef *USARTx)
1126 {
1127  CLEAR_BIT(USARTx->CR1, USART_CR1_MME);
1128 }
1129 
1136 __STATIC_INLINE uint32_t LL_USART_IsEnabledMuteMode(USART_TypeDef *USARTx)
1137 {
1138  return ((READ_BIT(USARTx->CR1, USART_CR1_MME) == (USART_CR1_MME)) ? 1UL : 0UL);
1139 }
1140 
1150 __STATIC_INLINE void LL_USART_SetOverSampling(USART_TypeDef *USARTx, uint32_t OverSampling)
1151 {
1152  MODIFY_REG(USARTx->CR1, USART_CR1_OVER8, OverSampling);
1153 }
1154 
1163 __STATIC_INLINE uint32_t LL_USART_GetOverSampling(USART_TypeDef *USARTx)
1164 {
1165  return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_OVER8));
1166 }
1167 
1179 __STATIC_INLINE void LL_USART_SetLastClkPulseOutput(USART_TypeDef *USARTx, uint32_t LastBitClockPulse)
1180 {
1181  MODIFY_REG(USARTx->CR2, USART_CR2_LBCL, LastBitClockPulse);
1182 }
1183 
1195 __STATIC_INLINE uint32_t LL_USART_GetLastClkPulseOutput(USART_TypeDef *USARTx)
1196 {
1197  return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_LBCL));
1198 }
1199 
1211 __STATIC_INLINE void LL_USART_SetClockPhase(USART_TypeDef *USARTx, uint32_t ClockPhase)
1212 {
1213  MODIFY_REG(USARTx->CR2, USART_CR2_CPHA, ClockPhase);
1214 }
1215 
1226 __STATIC_INLINE uint32_t LL_USART_GetClockPhase(USART_TypeDef *USARTx)
1227 {
1228  return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_CPHA));
1229 }
1230 
1242 __STATIC_INLINE void LL_USART_SetClockPolarity(USART_TypeDef *USARTx, uint32_t ClockPolarity)
1243 {
1244  MODIFY_REG(USARTx->CR2, USART_CR2_CPOL, ClockPolarity);
1245 }
1246 
1257 __STATIC_INLINE uint32_t LL_USART_GetClockPolarity(USART_TypeDef *USARTx)
1258 {
1259  return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_CPOL));
1260 }
1261 
1285 __STATIC_INLINE void LL_USART_ConfigClock(USART_TypeDef *USARTx, uint32_t Phase, uint32_t Polarity, uint32_t LBCPOutput)
1286 {
1287  MODIFY_REG(USARTx->CR2, USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL, Phase | Polarity | LBCPOutput);
1288 }
1289 
1290 #if defined(USART_PRESC_PRESCALER)
1291 
1312 __STATIC_INLINE void LL_USART_SetPrescaler(USART_TypeDef *USARTx, uint32_t PrescalerValue)
1313 {
1314  MODIFY_REG(USARTx->PRESC, USART_PRESC_PRESCALER, (uint16_t)PrescalerValue);
1315 }
1316 
1337 __STATIC_INLINE uint32_t LL_USART_GetPrescaler(USART_TypeDef *USARTx)
1338 {
1339  return (uint32_t)(READ_BIT(USARTx->PRESC, USART_PRESC_PRESCALER));
1340 }
1341 
1342 #endif /* USART_PRESC_PRESCALER */
1343 
1351 __STATIC_INLINE void LL_USART_EnableSCLKOutput(USART_TypeDef *USARTx)
1352 {
1353  SET_BIT(USARTx->CR2, USART_CR2_CLKEN);
1354 }
1355 
1364 __STATIC_INLINE void LL_USART_DisableSCLKOutput(USART_TypeDef *USARTx)
1365 {
1366  CLEAR_BIT(USARTx->CR2, USART_CR2_CLKEN);
1367 }
1368 
1377 __STATIC_INLINE uint32_t LL_USART_IsEnabledSCLKOutput(USART_TypeDef *USARTx)
1378 {
1379  return ((READ_BIT(USARTx->CR2, USART_CR2_CLKEN) == (USART_CR2_CLKEN)) ? 1UL : 0UL);
1380 }
1381 
1393 __STATIC_INLINE void LL_USART_SetStopBitsLength(USART_TypeDef *USARTx, uint32_t StopBits)
1394 {
1395  MODIFY_REG(USARTx->CR2, USART_CR2_STOP, StopBits);
1396 }
1397 
1408 __STATIC_INLINE uint32_t LL_USART_GetStopBitsLength(USART_TypeDef *USARTx)
1409 {
1410  return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_STOP));
1411 }
1412 
1440 __STATIC_INLINE void LL_USART_ConfigCharacter(USART_TypeDef *USARTx, uint32_t DataWidth, uint32_t Parity,
1441  uint32_t StopBits)
1442 {
1443  MODIFY_REG(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE | USART_CR1_M, Parity | DataWidth);
1444  MODIFY_REG(USARTx->CR2, USART_CR2_STOP, StopBits);
1445 }
1446 
1456 __STATIC_INLINE void LL_USART_SetTXRXSwap(USART_TypeDef *USARTx, uint32_t SwapConfig)
1457 {
1458  MODIFY_REG(USARTx->CR2, USART_CR2_SWAP, SwapConfig);
1459 }
1460 
1469 __STATIC_INLINE uint32_t LL_USART_GetTXRXSwap(USART_TypeDef *USARTx)
1470 {
1471  return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_SWAP));
1472 }
1473 
1483 __STATIC_INLINE void LL_USART_SetRXPinLevel(USART_TypeDef *USARTx, uint32_t PinInvMethod)
1484 {
1485  MODIFY_REG(USARTx->CR2, USART_CR2_RXINV, PinInvMethod);
1486 }
1487 
1496 __STATIC_INLINE uint32_t LL_USART_GetRXPinLevel(USART_TypeDef *USARTx)
1497 {
1498  return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_RXINV));
1499 }
1500 
1510 __STATIC_INLINE void LL_USART_SetTXPinLevel(USART_TypeDef *USARTx, uint32_t PinInvMethod)
1511 {
1512  MODIFY_REG(USARTx->CR2, USART_CR2_TXINV, PinInvMethod);
1513 }
1514 
1523 __STATIC_INLINE uint32_t LL_USART_GetTXPinLevel(USART_TypeDef *USARTx)
1524 {
1525  return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_TXINV));
1526 }
1527 
1539 __STATIC_INLINE void LL_USART_SetBinaryDataLogic(USART_TypeDef *USARTx, uint32_t DataLogic)
1540 {
1541  MODIFY_REG(USARTx->CR2, USART_CR2_DATAINV, DataLogic);
1542 }
1543 
1552 __STATIC_INLINE uint32_t LL_USART_GetBinaryDataLogic(USART_TypeDef *USARTx)
1553 {
1554  return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_DATAINV));
1555 }
1556 
1568 __STATIC_INLINE void LL_USART_SetTransferBitOrder(USART_TypeDef *USARTx, uint32_t BitOrder)
1569 {
1570  MODIFY_REG(USARTx->CR2, USART_CR2_MSBFIRST, BitOrder);
1571 }
1572 
1583 __STATIC_INLINE uint32_t LL_USART_GetTransferBitOrder(USART_TypeDef *USARTx)
1584 {
1585  return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_MSBFIRST));
1586 }
1587 
1596 __STATIC_INLINE void LL_USART_EnableAutoBaudRate(USART_TypeDef *USARTx)
1597 {
1598  SET_BIT(USARTx->CR2, USART_CR2_ABREN);
1599 }
1600 
1609 __STATIC_INLINE void LL_USART_DisableAutoBaudRate(USART_TypeDef *USARTx)
1610 {
1611  CLEAR_BIT(USARTx->CR2, USART_CR2_ABREN);
1612 }
1613 
1622 __STATIC_INLINE uint32_t LL_USART_IsEnabledAutoBaud(USART_TypeDef *USARTx)
1623 {
1624  return ((READ_BIT(USARTx->CR2, USART_CR2_ABREN) == (USART_CR2_ABREN)) ? 1UL : 0UL);
1625 }
1626 
1640 __STATIC_INLINE void LL_USART_SetAutoBaudRateMode(USART_TypeDef *USARTx, uint32_t AutoBaudRateMode)
1641 {
1642  MODIFY_REG(USARTx->CR2, USART_CR2_ABRMODE, AutoBaudRateMode);
1643 }
1644 
1657 __STATIC_INLINE uint32_t LL_USART_GetAutoBaudRateMode(USART_TypeDef *USARTx)
1658 {
1659  return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_ABRMODE));
1660 }
1661 
1668 __STATIC_INLINE void LL_USART_EnableRxTimeout(USART_TypeDef *USARTx)
1669 {
1670  SET_BIT(USARTx->CR2, USART_CR2_RTOEN);
1671 }
1672 
1679 __STATIC_INLINE void LL_USART_DisableRxTimeout(USART_TypeDef *USARTx)
1680 {
1681  CLEAR_BIT(USARTx->CR2, USART_CR2_RTOEN);
1682 }
1683 
1690 __STATIC_INLINE uint32_t LL_USART_IsEnabledRxTimeout(USART_TypeDef *USARTx)
1691 {
1692  return ((READ_BIT(USARTx->CR2, USART_CR2_RTOEN) == (USART_CR2_RTOEN)) ? 1UL : 0UL);
1693 }
1694 
1718 __STATIC_INLINE void LL_USART_ConfigNodeAddress(USART_TypeDef *USARTx, uint32_t AddressLen, uint32_t NodeAddress)
1719 {
1720  MODIFY_REG(USARTx->CR2, USART_CR2_ADD | USART_CR2_ADDM7,
1721  (uint32_t)(AddressLen | (NodeAddress << USART_CR2_ADD_Pos)));
1722 }
1723 
1734 __STATIC_INLINE uint32_t LL_USART_GetNodeAddress(USART_TypeDef *USARTx)
1735 {
1736  return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_ADD) >> USART_CR2_ADD_Pos);
1737 }
1738 
1747 __STATIC_INLINE uint32_t LL_USART_GetNodeAddressLen(USART_TypeDef *USARTx)
1748 {
1749  return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_ADDM7));
1750 }
1751 
1760 __STATIC_INLINE void LL_USART_EnableRTSHWFlowCtrl(USART_TypeDef *USARTx)
1761 {
1762  SET_BIT(USARTx->CR3, USART_CR3_RTSE);
1763 }
1764 
1773 __STATIC_INLINE void LL_USART_DisableRTSHWFlowCtrl(USART_TypeDef *USARTx)
1774 {
1775  CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE);
1776 }
1777 
1786 __STATIC_INLINE void LL_USART_EnableCTSHWFlowCtrl(USART_TypeDef *USARTx)
1787 {
1788  SET_BIT(USARTx->CR3, USART_CR3_CTSE);
1789 }
1790 
1799 __STATIC_INLINE void LL_USART_DisableCTSHWFlowCtrl(USART_TypeDef *USARTx)
1800 {
1801  CLEAR_BIT(USARTx->CR3, USART_CR3_CTSE);
1802 }
1803 
1818 __STATIC_INLINE void LL_USART_SetHWFlowCtrl(USART_TypeDef *USARTx, uint32_t HardwareFlowControl)
1819 {
1820  MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl);
1821 }
1822 
1836 __STATIC_INLINE uint32_t LL_USART_GetHWFlowCtrl(USART_TypeDef *USARTx)
1837 {
1838  return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE));
1839 }
1840 
1847 __STATIC_INLINE void LL_USART_EnableOneBitSamp(USART_TypeDef *USARTx)
1848 {
1849  SET_BIT(USARTx->CR3, USART_CR3_ONEBIT);
1850 }
1851 
1858 __STATIC_INLINE void LL_USART_DisableOneBitSamp(USART_TypeDef *USARTx)
1859 {
1860  CLEAR_BIT(USARTx->CR3, USART_CR3_ONEBIT);
1861 }
1862 
1869 __STATIC_INLINE uint32_t LL_USART_IsEnabledOneBitSamp(USART_TypeDef *USARTx)
1870 {
1871  return ((READ_BIT(USARTx->CR3, USART_CR3_ONEBIT) == (USART_CR3_ONEBIT)) ? 1UL : 0UL);
1872 }
1873 
1880 __STATIC_INLINE void LL_USART_EnableOverrunDetect(USART_TypeDef *USARTx)
1881 {
1882  CLEAR_BIT(USARTx->CR3, USART_CR3_OVRDIS);
1883 }
1884 
1891 __STATIC_INLINE void LL_USART_DisableOverrunDetect(USART_TypeDef *USARTx)
1892 {
1893  SET_BIT(USARTx->CR3, USART_CR3_OVRDIS);
1894 }
1895 
1902 __STATIC_INLINE uint32_t LL_USART_IsEnabledOverrunDetect(USART_TypeDef *USARTx)
1903 {
1904  return ((READ_BIT(USARTx->CR3, USART_CR3_OVRDIS) != USART_CR3_OVRDIS) ? 1UL : 0UL);
1905 }
1906 
1919 __STATIC_INLINE void LL_USART_SetWKUPType(USART_TypeDef *USARTx, uint32_t Type)
1920 {
1921  MODIFY_REG(USARTx->CR3, USART_CR3_WUS, Type);
1922 }
1923 
1935 __STATIC_INLINE uint32_t LL_USART_GetWKUPType(USART_TypeDef *USARTx)
1936 {
1937  return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_WUS));
1938 }
1939 
1971 #if defined(USART_PRESC_PRESCALER)
1972 __STATIC_INLINE void LL_USART_SetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t PrescalerValue,
1973  uint32_t OverSampling,
1974  uint32_t BaudRate)
1975 #else
1976 __STATIC_INLINE void LL_USART_SetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t OverSampling,
1977  uint32_t BaudRate)
1978 #endif /* USART_PRESC_PRESCALER */
1980  uint32_t usartdiv;
1981  register uint32_t brrtemp;
1982 
1983 #if defined(USART_PRESC_PRESCALER)
1984  if (PrescalerValue > LL_USART_PRESCALER_DIV256)
1985  {
1986  /* Do not overstep the size of USART_PRESCALER_TAB */
1987  }
1988  else if (OverSampling == LL_USART_OVERSAMPLING_8)
1989 #else
1990  if (OverSampling == LL_USART_OVERSAMPLING_8)
1991 #endif /* USART_PRESC_PRESCALER */
1992  {
1993 #if defined(USART_PRESC_PRESCALER)
1994  usartdiv = (uint16_t)(__LL_USART_DIV_SAMPLING8(PeriphClk, (uint8_t)PrescalerValue, BaudRate));
1995 #else
1996  usartdiv = (uint16_t)(__LL_USART_DIV_SAMPLING8(PeriphClk, BaudRate));
1997 #endif /* USART_PRESC_PRESCALER */
1998  brrtemp = usartdiv & 0xFFF0U;
1999  brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U);
2000  USARTx->BRR = brrtemp;
2001  }
2002  else
2003  {
2004 #if defined(USART_PRESC_PRESCALER)
2005  USARTx->BRR = (uint16_t)(__LL_USART_DIV_SAMPLING16(PeriphClk, (uint8_t)PrescalerValue, BaudRate));
2006 #else
2007  USARTx->BRR = (uint16_t)(__LL_USART_DIV_SAMPLING16(PeriphClk, BaudRate));
2008 #endif /* USART_PRESC_PRESCALER */
2009  }
2010 }
2011 
2040 #if defined(USART_PRESC_PRESCALER)
2041 __STATIC_INLINE uint32_t LL_USART_GetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t PrescalerValue,
2042  uint32_t OverSampling)
2043 #else
2044 __STATIC_INLINE uint32_t LL_USART_GetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t OverSampling)
2045 #endif /* USART_PRESC_PRESCALER */
2046 {
2047  register uint32_t usartdiv;
2048  register uint32_t brrresult = 0x0U;
2049 #if defined(USART_PRESC_PRESCALER)
2050  register uint32_t periphclkpresc = (uint32_t)(PeriphClk / (USART_PRESCALER_TAB[(uint8_t)PrescalerValue]));
2051 #endif /* USART_PRESC_PRESCALER */
2052 
2053  usartdiv = USARTx->BRR;
2054 
2055  if (usartdiv == 0U)
2056  {
2057  /* Do not perform a division by 0 */
2058  }
2059  else if (OverSampling == LL_USART_OVERSAMPLING_8)
2060  {
2061  usartdiv = (uint16_t)((usartdiv & 0xFFF0U) | ((usartdiv & 0x0007U) << 1U)) ;
2062  if (usartdiv != 0U)
2063  {
2064 #if defined(USART_PRESC_PRESCALER)
2065  brrresult = (periphclkpresc * 2U) / usartdiv;
2066 #else
2067  brrresult = (PeriphClk * 2U) / usartdiv;
2068 #endif /* USART_PRESC_PRESCALER */
2069  }
2070  }
2071  else
2072  {
2073  if ((usartdiv & 0xFFFFU) != 0U)
2074  {
2075 #if defined(USART_PRESC_PRESCALER)
2076  brrresult = periphclkpresc / usartdiv;
2077 #else
2078  brrresult = PeriphClk / usartdiv;
2079 #endif /* USART_PRESC_PRESCALER */
2080  }
2081  }
2082  return (brrresult);
2083 }
2084 
2092 __STATIC_INLINE void LL_USART_SetRxTimeout(USART_TypeDef *USARTx, uint32_t Timeout)
2093 {
2094  MODIFY_REG(USARTx->RTOR, USART_RTOR_RTO, Timeout);
2095 }
2096 
2103 __STATIC_INLINE uint32_t LL_USART_GetRxTimeout(USART_TypeDef *USARTx)
2104 {
2105  return (uint32_t)(READ_BIT(USARTx->RTOR, USART_RTOR_RTO));
2106 }
2107 
2115 __STATIC_INLINE void LL_USART_SetBlockLength(USART_TypeDef *USARTx, uint32_t BlockLength)
2116 {
2117  MODIFY_REG(USARTx->RTOR, USART_RTOR_BLEN, BlockLength << USART_RTOR_BLEN_Pos);
2118 }
2119 
2126 __STATIC_INLINE uint32_t LL_USART_GetBlockLength(USART_TypeDef *USARTx)
2127 {
2128  return (uint32_t)(READ_BIT(USARTx->RTOR, USART_RTOR_BLEN) >> USART_RTOR_BLEN_Pos);
2129 }
2130 
2147 __STATIC_INLINE void LL_USART_EnableIrda(USART_TypeDef *USARTx)
2148 {
2149  SET_BIT(USARTx->CR3, USART_CR3_IREN);
2150 }
2151 
2160 __STATIC_INLINE void LL_USART_DisableIrda(USART_TypeDef *USARTx)
2161 {
2162  CLEAR_BIT(USARTx->CR3, USART_CR3_IREN);
2163 }
2164 
2173 __STATIC_INLINE uint32_t LL_USART_IsEnabledIrda(USART_TypeDef *USARTx)
2174 {
2175  return ((READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN)) ? 1UL : 0UL);
2176 }
2177 
2189 __STATIC_INLINE void LL_USART_SetIrdaPowerMode(USART_TypeDef *USARTx, uint32_t PowerMode)
2190 {
2191  MODIFY_REG(USARTx->CR3, USART_CR3_IRLP, PowerMode);
2192 }
2193 
2204 __STATIC_INLINE uint32_t LL_USART_GetIrdaPowerMode(USART_TypeDef *USARTx)
2205 {
2206  return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_IRLP));
2207 }
2208 
2219 __STATIC_INLINE void LL_USART_SetIrdaPrescaler(USART_TypeDef *USARTx, uint32_t PrescalerValue)
2220 {
2221  MODIFY_REG(USARTx->GTPR, (uint16_t)USART_GTPR_PSC, (uint16_t)PrescalerValue);
2222 }
2223 
2233 __STATIC_INLINE uint32_t LL_USART_GetIrdaPrescaler(USART_TypeDef *USARTx)
2234 {
2235  return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_PSC));
2236 }
2237 
2254 __STATIC_INLINE void LL_USART_EnableSmartcardNACK(USART_TypeDef *USARTx)
2255 {
2256  SET_BIT(USARTx->CR3, USART_CR3_NACK);
2257 }
2258 
2267 __STATIC_INLINE void LL_USART_DisableSmartcardNACK(USART_TypeDef *USARTx)
2268 {
2269  CLEAR_BIT(USARTx->CR3, USART_CR3_NACK);
2270 }
2271 
2280 __STATIC_INLINE uint32_t LL_USART_IsEnabledSmartcardNACK(USART_TypeDef *USARTx)
2281 {
2282  return ((READ_BIT(USARTx->CR3, USART_CR3_NACK) == (USART_CR3_NACK)) ? 1UL : 0UL);
2283 }
2284 
2293 __STATIC_INLINE void LL_USART_EnableSmartcard(USART_TypeDef *USARTx)
2294 {
2295  SET_BIT(USARTx->CR3, USART_CR3_SCEN);
2296 }
2297 
2306 __STATIC_INLINE void LL_USART_DisableSmartcard(USART_TypeDef *USARTx)
2307 {
2308  CLEAR_BIT(USARTx->CR3, USART_CR3_SCEN);
2309 }
2310 
2319 __STATIC_INLINE uint32_t LL_USART_IsEnabledSmartcard(USART_TypeDef *USARTx)
2320 {
2321  return ((READ_BIT(USARTx->CR3, USART_CR3_SCEN) == (USART_CR3_SCEN)) ? 1UL : 0UL);
2322 }
2323 
2338 __STATIC_INLINE void LL_USART_SetSmartcardAutoRetryCount(USART_TypeDef *USARTx, uint32_t AutoRetryCount)
2339 {
2340  MODIFY_REG(USARTx->CR3, USART_CR3_SCARCNT, AutoRetryCount << USART_CR3_SCARCNT_Pos);
2341 }
2342 
2351 __STATIC_INLINE uint32_t LL_USART_GetSmartcardAutoRetryCount(USART_TypeDef *USARTx)
2352 {
2353  return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_SCARCNT) >> USART_CR3_SCARCNT_Pos);
2354 }
2355 
2366 __STATIC_INLINE void LL_USART_SetSmartcardPrescaler(USART_TypeDef *USARTx, uint32_t PrescalerValue)
2367 {
2368  MODIFY_REG(USARTx->GTPR, (uint16_t)USART_GTPR_PSC, (uint16_t)PrescalerValue);
2369 }
2370 
2380 __STATIC_INLINE uint32_t LL_USART_GetSmartcardPrescaler(USART_TypeDef *USARTx)
2381 {
2382  return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_PSC));
2383 }
2384 
2395 __STATIC_INLINE void LL_USART_SetSmartcardGuardTime(USART_TypeDef *USARTx, uint32_t GuardTime)
2396 {
2397  MODIFY_REG(USARTx->GTPR, (uint16_t)USART_GTPR_GT, (uint16_t)(GuardTime << USART_GTPR_GT_Pos));
2398 }
2399 
2409 __STATIC_INLINE uint32_t LL_USART_GetSmartcardGuardTime(USART_TypeDef *USARTx)
2410 {
2411  return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_GT) >> USART_GTPR_GT_Pos);
2412 }
2413 
2430 __STATIC_INLINE void LL_USART_EnableHalfDuplex(USART_TypeDef *USARTx)
2431 {
2432  SET_BIT(USARTx->CR3, USART_CR3_HDSEL);
2433 }
2434 
2443 __STATIC_INLINE void LL_USART_DisableHalfDuplex(USART_TypeDef *USARTx)
2444 {
2445  CLEAR_BIT(USARTx->CR3, USART_CR3_HDSEL);
2446 }
2447 
2456 __STATIC_INLINE uint32_t LL_USART_IsEnabledHalfDuplex(USART_TypeDef *USARTx)
2457 {
2458  return ((READ_BIT(USARTx->CR3, USART_CR3_HDSEL) == (USART_CR3_HDSEL)) ? 1UL : 0UL);
2459 }
2460 
2465 #if defined(USART_CR2_SLVEN)
2466 
2477 __STATIC_INLINE void LL_USART_EnableSPISlave(USART_TypeDef *USARTx)
2478 {
2479  SET_BIT(USARTx->CR2, USART_CR2_SLVEN);
2480 }
2481 
2490 __STATIC_INLINE void LL_USART_DisableSPISlave(USART_TypeDef *USARTx)
2491 {
2492  CLEAR_BIT(USARTx->CR2, USART_CR2_SLVEN);
2493 }
2494 
2503 __STATIC_INLINE uint32_t LL_USART_IsEnabledSPISlave(USART_TypeDef *USARTx)
2504 {
2505  return ((READ_BIT(USARTx->CR2, USART_CR2_SLVEN) == (USART_CR2_SLVEN)) ? 1UL : 0UL);
2506 }
2507 
2518 __STATIC_INLINE void LL_USART_EnableSPISlaveSelect(USART_TypeDef *USARTx)
2519 {
2520  CLEAR_BIT(USARTx->CR2, USART_CR2_DIS_NSS);
2521 }
2522 
2532 __STATIC_INLINE void LL_USART_DisableSPISlaveSelect(USART_TypeDef *USARTx)
2533 {
2534  SET_BIT(USARTx->CR2, USART_CR2_DIS_NSS);
2535 }
2536 
2545 __STATIC_INLINE uint32_t LL_USART_IsEnabledSPISlaveSelect(USART_TypeDef *USARTx)
2546 {
2547  return ((READ_BIT(USARTx->CR2, USART_CR2_DIS_NSS) != (USART_CR2_DIS_NSS)) ? 1UL : 0UL);
2548 }
2549 
2554 #endif /* USART_CR2_SLVEN */
2555 
2570 __STATIC_INLINE void LL_USART_SetLINBrkDetectionLen(USART_TypeDef *USARTx, uint32_t LINBDLength)
2571 {
2572  MODIFY_REG(USARTx->CR2, USART_CR2_LBDL, LINBDLength);
2573 }
2574 
2585 __STATIC_INLINE uint32_t LL_USART_GetLINBrkDetectionLen(USART_TypeDef *USARTx)
2586 {
2587  return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_LBDL));
2588 }
2589 
2598 __STATIC_INLINE void LL_USART_EnableLIN(USART_TypeDef *USARTx)
2599 {
2600  SET_BIT(USARTx->CR2, USART_CR2_LINEN);
2601 }
2602 
2611 __STATIC_INLINE void LL_USART_DisableLIN(USART_TypeDef *USARTx)
2612 {
2613  CLEAR_BIT(USARTx->CR2, USART_CR2_LINEN);
2614 }
2615 
2624 __STATIC_INLINE uint32_t LL_USART_IsEnabledLIN(USART_TypeDef *USARTx)
2625 {
2626  return ((READ_BIT(USARTx->CR2, USART_CR2_LINEN) == (USART_CR2_LINEN)) ? 1UL : 0UL);
2627 }
2628 
2646 __STATIC_INLINE void LL_USART_SetDEDeassertionTime(USART_TypeDef *USARTx, uint32_t Time)
2647 {
2648  MODIFY_REG(USARTx->CR1, USART_CR1_DEDT, Time << USART_CR1_DEDT_Pos);
2649 }
2650 
2659 __STATIC_INLINE uint32_t LL_USART_GetDEDeassertionTime(USART_TypeDef *USARTx)
2660 {
2661  return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_DEDT) >> USART_CR1_DEDT_Pos);
2662 }
2663 
2673 __STATIC_INLINE void LL_USART_SetDEAssertionTime(USART_TypeDef *USARTx, uint32_t Time)
2674 {
2675  MODIFY_REG(USARTx->CR1, USART_CR1_DEAT, Time << USART_CR1_DEAT_Pos);
2676 }
2677 
2686 __STATIC_INLINE uint32_t LL_USART_GetDEAssertionTime(USART_TypeDef *USARTx)
2687 {
2688  return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_DEAT) >> USART_CR1_DEAT_Pos);
2689 }
2690 
2699 __STATIC_INLINE void LL_USART_EnableDEMode(USART_TypeDef *USARTx)
2700 {
2701  SET_BIT(USARTx->CR3, USART_CR3_DEM);
2702 }
2703 
2712 __STATIC_INLINE void LL_USART_DisableDEMode(USART_TypeDef *USARTx)
2713 {
2714  CLEAR_BIT(USARTx->CR3, USART_CR3_DEM);
2715 }
2716 
2725 __STATIC_INLINE uint32_t LL_USART_IsEnabledDEMode(USART_TypeDef *USARTx)
2726 {
2727  return ((READ_BIT(USARTx->CR3, USART_CR3_DEM) == (USART_CR3_DEM)) ? 1UL : 0UL);
2728 }
2729 
2741 __STATIC_INLINE void LL_USART_SetDESignalPolarity(USART_TypeDef *USARTx, uint32_t Polarity)
2742 {
2743  MODIFY_REG(USARTx->CR3, USART_CR3_DEP, Polarity);
2744 }
2745 
2756 __STATIC_INLINE uint32_t LL_USART_GetDESignalPolarity(USART_TypeDef *USARTx)
2757 {
2758  return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_DEP));
2759 }
2760 
2794 __STATIC_INLINE void LL_USART_ConfigAsyncMode(USART_TypeDef *USARTx)
2795 {
2796  /* In Asynchronous mode, the following bits must be kept cleared:
2797  - LINEN, CLKEN bits in the USART_CR2 register,
2798  - SCEN, IREN and HDSEL bits in the USART_CR3 register.*/
2799  CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
2800  CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL));
2801 }
2802 
2830 __STATIC_INLINE void LL_USART_ConfigSyncMode(USART_TypeDef *USARTx)
2831 {
2832  /* In Synchronous mode, the following bits must be kept cleared:
2833  - LINEN bit in the USART_CR2 register,
2834  - SCEN, IREN and HDSEL bits in the USART_CR3 register.*/
2835  CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN));
2836  CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL));
2837  /* set the UART/USART in Synchronous mode */
2838  SET_BIT(USARTx->CR2, USART_CR2_CLKEN);
2839 }
2840 
2870 __STATIC_INLINE void LL_USART_ConfigLINMode(USART_TypeDef *USARTx)
2871 {
2872  /* In LIN mode, the following bits must be kept cleared:
2873  - STOP and CLKEN bits in the USART_CR2 register,
2874  - IREN, SCEN and HDSEL bits in the USART_CR3 register.*/
2875  CLEAR_BIT(USARTx->CR2, (USART_CR2_CLKEN | USART_CR2_STOP));
2876  CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL));
2877  /* Set the UART/USART in LIN mode */
2878  SET_BIT(USARTx->CR2, USART_CR2_LINEN);
2879 }
2880 
2908 __STATIC_INLINE void LL_USART_ConfigHalfDuplexMode(USART_TypeDef *USARTx)
2909 {
2910  /* In Half Duplex mode, the following bits must be kept cleared:
2911  - LINEN and CLKEN bits in the USART_CR2 register,
2912  - SCEN and IREN bits in the USART_CR3 register.*/
2913  CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
2914  CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN));
2915  /* set the UART/USART in Half Duplex mode */
2916  SET_BIT(USARTx->CR3, USART_CR3_HDSEL);
2917 }
2918 
2948 __STATIC_INLINE void LL_USART_ConfigSmartcardMode(USART_TypeDef *USARTx)
2949 {
2950  /* In Smartcard mode, the following bits must be kept cleared:
2951  - LINEN bit in the USART_CR2 register,
2952  - IREN and HDSEL bits in the USART_CR3 register.*/
2953  CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN));
2954  CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL));
2955  /* Configure Stop bits to 1.5 bits */
2956  /* Synchronous mode is activated by default */
2957  SET_BIT(USARTx->CR2, (USART_CR2_STOP_0 | USART_CR2_STOP_1 | USART_CR2_CLKEN));
2958  /* set the UART/USART in Smartcard mode */
2959  SET_BIT(USARTx->CR3, USART_CR3_SCEN);
2960 }
2961 
2991 __STATIC_INLINE void LL_USART_ConfigIrdaMode(USART_TypeDef *USARTx)
2992 {
2993  /* In IRDA mode, the following bits must be kept cleared:
2994  - LINEN, STOP and CLKEN bits in the USART_CR2 register,
2995  - SCEN and HDSEL bits in the USART_CR3 register.*/
2996  CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN | USART_CR2_STOP));
2997  CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL));
2998  /* set the UART/USART in IRDA mode */
2999  SET_BIT(USARTx->CR3, USART_CR3_IREN);
3000 }
3001 
3029 __STATIC_INLINE void LL_USART_ConfigMultiProcessMode(USART_TypeDef *USARTx)
3030 {
3031  /* In Multi Processor mode, the following bits must be kept cleared:
3032  - LINEN and CLKEN bits in the USART_CR2 register,
3033  - IREN, SCEN and HDSEL bits in the USART_CR3 register.*/
3034  CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
3035  CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
3036 }
3037 
3052 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_PE(USART_TypeDef *USARTx)
3053 {
3054  return ((READ_BIT(USARTx->ISR, USART_ISR_PE) == (USART_ISR_PE)) ? 1UL : 0UL);
3055 }
3056 
3063 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_FE(USART_TypeDef *USARTx)
3064 {
3065  return ((READ_BIT(USARTx->ISR, USART_ISR_FE) == (USART_ISR_FE)) ? 1UL : 0UL);
3066 }
3067 
3074 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_NE(USART_TypeDef *USARTx)
3075 {
3076  return ((READ_BIT(USARTx->ISR, USART_ISR_NE) == (USART_ISR_NE)) ? 1UL : 0UL);
3077 }
3078 
3085 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ORE(USART_TypeDef *USARTx)
3086 {
3087  return ((READ_BIT(USARTx->ISR, USART_ISR_ORE) == (USART_ISR_ORE)) ? 1UL : 0UL);
3088 }
3089 
3096 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_IDLE(USART_TypeDef *USARTx)
3097 {
3098  return ((READ_BIT(USARTx->ISR, USART_ISR_IDLE) == (USART_ISR_IDLE)) ? 1UL : 0UL);
3099 }
3100 
3101 #if defined(USART_CR1_FIFOEN)
3102 /* Legacy define */
3103 #define LL_USART_IsActiveFlag_RXNE LL_USART_IsActiveFlag_RXNE_RXFNE
3104 
3113 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RXNE_RXFNE(USART_TypeDef *USARTx)
3114 {
3115  return ((READ_BIT(USARTx->ISR, USART_ISR_RXNE_RXFNE) == (USART_ISR_RXNE_RXFNE)) ? 1UL : 0UL);
3116 }
3117 
3118 #else
3119 
3125 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RXNE(USART_TypeDef *USARTx)
3126 {
3127  return ((READ_BIT(USARTx->ISR, USART_ISR_RXNE) == (USART_ISR_RXNE)) ? 1UL : 0UL);
3128 }
3129 
3130 #endif /* USART_CR1_FIFOEN */
3131 
3137 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TC(USART_TypeDef *USARTx)
3138 {
3139  return ((READ_BIT(USARTx->ISR, USART_ISR_TC) == (USART_ISR_TC)) ? 1UL : 0UL);
3140 }
3141 
3142 #if defined(USART_CR1_FIFOEN)
3143 /* Legacy define */
3144 #define LL_USART_IsActiveFlag_TXE LL_USART_IsActiveFlag_TXE_TXFNF
3145 
3154 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TXE_TXFNF(USART_TypeDef *USARTx)
3155 {
3156  return ((READ_BIT(USARTx->ISR, USART_ISR_TXE_TXFNF) == (USART_ISR_TXE_TXFNF)) ? 1UL : 0UL);
3157 }
3158 
3159 #else
3160 
3166 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TXE(USART_TypeDef *USARTx)
3167 {
3168  return ((READ_BIT(USARTx->ISR, USART_ISR_TXE) == (USART_ISR_TXE)) ? 1UL : 0UL);
3169 }
3170 
3171 #endif /* USART_CR1_FIFOEN */
3172 
3180 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_LBD(USART_TypeDef *USARTx)
3181 {
3182  return ((READ_BIT(USARTx->ISR, USART_ISR_LBDF) == (USART_ISR_LBDF)) ? 1UL : 0UL);
3183 }
3184 
3193 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_nCTS(USART_TypeDef *USARTx)
3194 {
3195  return ((READ_BIT(USARTx->ISR, USART_ISR_CTSIF) == (USART_ISR_CTSIF)) ? 1UL : 0UL);
3196 }
3197 
3206 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_CTS(USART_TypeDef *USARTx)
3207 {
3208  return ((READ_BIT(USARTx->ISR, USART_ISR_CTS) == (USART_ISR_CTS)) ? 1UL : 0UL);
3209 }
3210 
3217 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RTO(USART_TypeDef *USARTx)
3218 {
3219  return ((READ_BIT(USARTx->ISR, USART_ISR_RTOF) == (USART_ISR_RTOF)) ? 1UL : 0UL);
3220 }
3221 
3230 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_EOB(USART_TypeDef *USARTx)
3231 {
3232  return ((READ_BIT(USARTx->ISR, USART_ISR_EOBF) == (USART_ISR_EOBF)) ? 1UL : 0UL);
3233 }
3234 
3235 #if defined(USART_CR2_SLVEN)
3236 
3244 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_UDR(USART_TypeDef *USARTx)
3245 {
3246  return ((READ_BIT(USARTx->ISR, USART_ISR_UDR) == (USART_ISR_UDR)) ? 1UL : 0UL);
3247 }
3248 
3249 #endif /* USART_CR2_SLVEN */
3250 
3258 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ABRE(USART_TypeDef *USARTx)
3259 {
3260  return ((READ_BIT(USARTx->ISR, USART_ISR_ABRE) == (USART_ISR_ABRE)) ? 1UL : 0UL);
3261 }
3262 
3271 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ABR(USART_TypeDef *USARTx)
3272 {
3273  return ((READ_BIT(USARTx->ISR, USART_ISR_ABRF) == (USART_ISR_ABRF)) ? 1UL : 0UL);
3274 }
3275 
3282 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_BUSY(USART_TypeDef *USARTx)
3283 {
3284  return ((READ_BIT(USARTx->ISR, USART_ISR_BUSY) == (USART_ISR_BUSY)) ? 1UL : 0UL);
3285 }
3286 
3293 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_CM(USART_TypeDef *USARTx)
3294 {
3295  return ((READ_BIT(USARTx->ISR, USART_ISR_CMF) == (USART_ISR_CMF)) ? 1UL : 0UL);
3296 }
3297 
3304 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_SBK(USART_TypeDef *USARTx)
3305 {
3306  return ((READ_BIT(USARTx->ISR, USART_ISR_SBKF) == (USART_ISR_SBKF)) ? 1UL : 0UL);
3307 }
3308 
3315 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RWU(USART_TypeDef *USARTx)
3316 {
3317  return ((READ_BIT(USARTx->ISR, USART_ISR_RWU) == (USART_ISR_RWU)) ? 1UL : 0UL);
3318 }
3319 
3328 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_WKUP(USART_TypeDef *USARTx)
3329 {
3330  return ((READ_BIT(USARTx->ISR, USART_ISR_WUF) == (USART_ISR_WUF)) ? 1UL : 0UL);
3331 }
3332 
3339 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TEACK(USART_TypeDef *USARTx)
3340 {
3341  return ((READ_BIT(USARTx->ISR, USART_ISR_TEACK) == (USART_ISR_TEACK)) ? 1UL : 0UL);
3342 }
3343 
3350 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_REACK(USART_TypeDef *USARTx)
3351 {
3352  return ((READ_BIT(USARTx->ISR, USART_ISR_REACK) == (USART_ISR_REACK)) ? 1UL : 0UL);
3353 }
3354 
3355 #if defined(USART_CR1_FIFOEN)
3356 
3364 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TXFE(USART_TypeDef *USARTx)
3365 {
3366  return ((READ_BIT(USARTx->ISR, USART_ISR_TXFE) == (USART_ISR_TXFE)) ? 1UL : 0UL);
3367 }
3368 
3377 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RXFF(USART_TypeDef *USARTx)
3378 {
3379  return ((READ_BIT(USARTx->ISR, USART_ISR_RXFF) == (USART_ISR_RXFF)) ? 1UL : 0UL);
3380 }
3381 
3382 #endif /* USART_CR1_FIFOEN */
3383 #if defined(USART_TCBGT_SUPPORT)
3384 /* Function available only on devices supporting Transmit Complete before Guard Time feature */
3391 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TCBGT(USART_TypeDef *USARTx)
3392 {
3393  return ((READ_BIT(USARTx->ISR, USART_ISR_TCBGT) == (USART_ISR_TCBGT)) ? 1UL : 0UL);
3394 }
3395 #endif /* USART_TCBGT_SUPPORT */
3396 
3397 #if defined(USART_CR1_FIFOEN)
3398 
3406 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TXFT(USART_TypeDef *USARTx)
3407 {
3408  return ((READ_BIT(USARTx->ISR, USART_ISR_TXFT) == (USART_ISR_TXFT)) ? 1UL : 0UL);
3409 }
3410 
3419 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RXFT(USART_TypeDef *USARTx)
3420 {
3421  return ((READ_BIT(USARTx->ISR, USART_ISR_RXFT) == (USART_ISR_RXFT)) ? 1UL : 0UL);
3422 }
3423 
3424 #endif /* USART_CR1_FIFOEN */
3425 
3431 __STATIC_INLINE void LL_USART_ClearFlag_PE(USART_TypeDef *USARTx)
3432 {
3433  WRITE_REG(USARTx->ICR, USART_ICR_PECF);
3434 }
3435 
3442 __STATIC_INLINE void LL_USART_ClearFlag_FE(USART_TypeDef *USARTx)
3443 {
3444  WRITE_REG(USARTx->ICR, USART_ICR_FECF);
3445 }
3446 
3453 __STATIC_INLINE void LL_USART_ClearFlag_NE(USART_TypeDef *USARTx)
3454 {
3455  WRITE_REG(USARTx->ICR, USART_ICR_NECF);
3456 }
3457 
3464 __STATIC_INLINE void LL_USART_ClearFlag_ORE(USART_TypeDef *USARTx)
3465 {
3466  WRITE_REG(USARTx->ICR, USART_ICR_ORECF);
3467 }
3468 
3475 __STATIC_INLINE void LL_USART_ClearFlag_IDLE(USART_TypeDef *USARTx)
3476 {
3477  WRITE_REG(USARTx->ICR, USART_ICR_IDLECF);
3478 }
3479 
3480 #if defined(USART_CR1_FIFOEN)
3481 
3489 __STATIC_INLINE void LL_USART_ClearFlag_TXFE(USART_TypeDef *USARTx)
3490 {
3491  WRITE_REG(USARTx->ICR, USART_ICR_TXFECF);
3492 }
3493 
3494 #endif /* USART_CR1_FIFOEN */
3495 
3501 __STATIC_INLINE void LL_USART_ClearFlag_TC(USART_TypeDef *USARTx)
3502 {
3503  WRITE_REG(USARTx->ICR, USART_ICR_TCCF);
3504 }
3505 
3506 #if defined(USART_TCBGT_SUPPORT)
3507 /* Function available only on devices supporting Transmit Complete before Guard Time feature */
3514 __STATIC_INLINE void LL_USART_ClearFlag_TCBGT(USART_TypeDef *USARTx)
3515 {
3516  WRITE_REG(USARTx->ICR, USART_ICR_TCBGTCF);
3517 }
3518 #endif /* USART_TCBGT_SUPPORT */
3519 
3528 __STATIC_INLINE void LL_USART_ClearFlag_LBD(USART_TypeDef *USARTx)
3529 {
3530  WRITE_REG(USARTx->ICR, USART_ICR_LBDCF);
3531 }
3532 
3541 __STATIC_INLINE void LL_USART_ClearFlag_nCTS(USART_TypeDef *USARTx)
3542 {
3543  WRITE_REG(USARTx->ICR, USART_ICR_CTSCF);
3544 }
3545 
3552 __STATIC_INLINE void LL_USART_ClearFlag_RTO(USART_TypeDef *USARTx)
3553 {
3554  WRITE_REG(USARTx->ICR, USART_ICR_RTOCF);
3555 }
3556 
3565 __STATIC_INLINE void LL_USART_ClearFlag_EOB(USART_TypeDef *USARTx)
3566 {
3567  WRITE_REG(USARTx->ICR, USART_ICR_EOBCF);
3568 }
3569 
3570 #if defined(USART_CR2_SLVEN)
3571 
3579 __STATIC_INLINE void LL_USART_ClearFlag_UDR(USART_TypeDef *USARTx)
3580 {
3581  WRITE_REG(USARTx->ICR, USART_ICR_UDRCF);
3582 }
3583 
3584 #endif /* USART_CR2_SLVEN */
3585 
3591 __STATIC_INLINE void LL_USART_ClearFlag_CM(USART_TypeDef *USARTx)
3592 {
3593  WRITE_REG(USARTx->ICR, USART_ICR_CMCF);
3594 }
3595 
3604 __STATIC_INLINE void LL_USART_ClearFlag_WKUP(USART_TypeDef *USARTx)
3605 {
3606  WRITE_REG(USARTx->ICR, USART_ICR_WUCF);
3607 }
3608 
3623 __STATIC_INLINE void LL_USART_EnableIT_IDLE(USART_TypeDef *USARTx)
3624 {
3625  SET_BIT(USARTx->CR1, USART_CR1_IDLEIE);
3626 }
3627 
3628 #if defined(USART_CR1_FIFOEN)
3629 /* Legacy define */
3630 #define LL_USART_EnableIT_RXNE LL_USART_EnableIT_RXNE_RXFNE
3631 
3640 __STATIC_INLINE void LL_USART_EnableIT_RXNE_RXFNE(USART_TypeDef *USARTx)
3641 {
3642  SET_BIT(USARTx->CR1, USART_CR1_RXNEIE_RXFNEIE);
3643 }
3644 
3645 #else
3646 
3652 __STATIC_INLINE void LL_USART_EnableIT_RXNE(USART_TypeDef *USARTx)
3653 {
3654  SET_BIT(USARTx->CR1, USART_CR1_RXNEIE);
3655 }
3656 
3657 #endif /* USART_CR1_FIFOEN */
3658 
3664 __STATIC_INLINE void LL_USART_EnableIT_TC(USART_TypeDef *USARTx)
3665 {
3666  SET_BIT(USARTx->CR1, USART_CR1_TCIE);
3667 }
3668 
3669 #if defined(USART_CR1_FIFOEN)
3670 /* Legacy define */
3671 #define LL_USART_EnableIT_TXE LL_USART_EnableIT_TXE_TXFNF
3672 
3681 __STATIC_INLINE void LL_USART_EnableIT_TXE_TXFNF(USART_TypeDef *USARTx)
3682 {
3683  SET_BIT(USARTx->CR1, USART_CR1_TXEIE_TXFNFIE);
3684 }
3685 
3686 #else
3687 
3693 __STATIC_INLINE void LL_USART_EnableIT_TXE(USART_TypeDef *USARTx)
3694 {
3695  SET_BIT(USARTx->CR1, USART_CR1_TXEIE);
3696 }
3697 
3698 #endif /* USART_CR1_FIFOEN */
3699 
3705 __STATIC_INLINE void LL_USART_EnableIT_PE(USART_TypeDef *USARTx)
3706 {
3707  SET_BIT(USARTx->CR1, USART_CR1_PEIE);
3708 }
3709 
3716 __STATIC_INLINE void LL_USART_EnableIT_CM(USART_TypeDef *USARTx)
3717 {
3718  SET_BIT(USARTx->CR1, USART_CR1_CMIE);
3719 }
3720 
3727 __STATIC_INLINE void LL_USART_EnableIT_RTO(USART_TypeDef *USARTx)
3728 {
3729  SET_BIT(USARTx->CR1, USART_CR1_RTOIE);
3730 }
3731 
3740 __STATIC_INLINE void LL_USART_EnableIT_EOB(USART_TypeDef *USARTx)
3741 {
3742  SET_BIT(USARTx->CR1, USART_CR1_EOBIE);
3743 }
3744 
3745 #if defined(USART_CR1_FIFOEN)
3746 
3754 __STATIC_INLINE void LL_USART_EnableIT_TXFE(USART_TypeDef *USARTx)
3755 {
3756  SET_BIT(USARTx->CR1, USART_CR1_TXFEIE);
3757 }
3758 
3765 __STATIC_INLINE void LL_USART_EnableIT_RXFF(USART_TypeDef *USARTx)
3766 {
3767  SET_BIT(USARTx->CR1, USART_CR1_RXFFIE);
3768 }
3769 
3770 #endif /* USART_CR1_FIFOEN */
3771 
3779 __STATIC_INLINE void LL_USART_EnableIT_LBD(USART_TypeDef *USARTx)
3780 {
3781  SET_BIT(USARTx->CR2, USART_CR2_LBDIE);
3782 }
3783 
3794 __STATIC_INLINE void LL_USART_EnableIT_ERROR(USART_TypeDef *USARTx)
3795 {
3796  SET_BIT(USARTx->CR3, USART_CR3_EIE);
3797 }
3798 
3807 __STATIC_INLINE void LL_USART_EnableIT_CTS(USART_TypeDef *USARTx)
3808 {
3809  SET_BIT(USARTx->CR3, USART_CR3_CTSIE);
3810 }
3811 
3820 __STATIC_INLINE void LL_USART_EnableIT_WKUP(USART_TypeDef *USARTx)
3821 {
3822  SET_BIT(USARTx->CR3, USART_CR3_WUFIE);
3823 }
3824 
3825 #if defined(USART_CR1_FIFOEN)
3826 
3834 __STATIC_INLINE void LL_USART_EnableIT_TXFT(USART_TypeDef *USARTx)
3835 {
3836  SET_BIT(USARTx->CR3, USART_CR3_TXFTIE);
3837 }
3838 
3839 #endif /* USART_CR1_FIFOEN */
3840 #if defined(USART_TCBGT_SUPPORT)
3841 /* Function available only on devices supporting Transmit Complete before Guard Time feature */
3850 __STATIC_INLINE void LL_USART_EnableIT_TCBGT(USART_TypeDef *USARTx)
3851 {
3852  SET_BIT(USARTx->CR3, USART_CR3_TCBGTIE);
3853 }
3854 #endif /* USART_TCBGT_SUPPORT */
3855 
3856 #if defined(USART_CR1_FIFOEN)
3857 
3865 __STATIC_INLINE void LL_USART_EnableIT_RXFT(USART_TypeDef *USARTx)
3866 {
3867  SET_BIT(USARTx->CR3, USART_CR3_RXFTIE);
3868 }
3869 
3870 #endif /* USART_CR1_FIFOEN */
3871 
3877 __STATIC_INLINE void LL_USART_DisableIT_IDLE(USART_TypeDef *USARTx)
3878 {
3879  CLEAR_BIT(USARTx->CR1, USART_CR1_IDLEIE);
3880 }
3881 
3882 #if defined(USART_CR1_FIFOEN)
3883 /* Legacy define */
3884 #define LL_USART_DisableIT_RXNE LL_USART_DisableIT_RXNE_RXFNE
3885 
3894 __STATIC_INLINE void LL_USART_DisableIT_RXNE_RXFNE(USART_TypeDef *USARTx)
3895 {
3896  CLEAR_BIT(USARTx->CR1, USART_CR1_RXNEIE_RXFNEIE);
3897 }
3898 
3899 #else
3900 
3906 __STATIC_INLINE void LL_USART_DisableIT_RXNE(USART_TypeDef *USARTx)
3907 {
3908  CLEAR_BIT(USARTx->CR1, USART_CR1_RXNEIE);
3909 }
3910 
3911 #endif /* USART_CR1_FIFOEN */
3912 
3918 __STATIC_INLINE void LL_USART_DisableIT_TC(USART_TypeDef *USARTx)
3919 {
3920  CLEAR_BIT(USARTx->CR1, USART_CR1_TCIE);
3921 }
3922 
3923 #if defined(USART_CR1_FIFOEN)
3924 /* Legacy define */
3925 #define LL_USART_DisableIT_TXE LL_USART_DisableIT_TXE_TXFNF
3926 
3935 __STATIC_INLINE void LL_USART_DisableIT_TXE_TXFNF(USART_TypeDef *USARTx)
3936 {
3937  CLEAR_BIT(USARTx->CR1, USART_CR1_TXEIE_TXFNFIE);
3938 }
3939 
3940 #else
3941 
3947 __STATIC_INLINE void LL_USART_DisableIT_TXE(USART_TypeDef *USARTx)
3948 {
3949  CLEAR_BIT(USARTx->CR1, USART_CR1_TXEIE);
3950 }
3951 
3952 #endif /* USART_CR1_FIFOEN */
3953 
3959 __STATIC_INLINE void LL_USART_DisableIT_PE(USART_TypeDef *USARTx)
3960 {
3961  CLEAR_BIT(USARTx->CR1, USART_CR1_PEIE);
3962 }
3963 
3970 __STATIC_INLINE void LL_USART_DisableIT_CM(USART_TypeDef *USARTx)
3971 {
3972  CLEAR_BIT(USARTx->CR1, USART_CR1_CMIE);
3973 }
3974 
3981 __STATIC_INLINE void LL_USART_DisableIT_RTO(USART_TypeDef *USARTx)
3982 {
3983  CLEAR_BIT(USARTx->CR1, USART_CR1_RTOIE);
3984 }
3985 
3994 __STATIC_INLINE void LL_USART_DisableIT_EOB(USART_TypeDef *USARTx)
3995 {
3996  CLEAR_BIT(USARTx->CR1, USART_CR1_EOBIE);
3997 }
3998 
3999 #if defined(USART_CR1_FIFOEN)
4000 
4008 __STATIC_INLINE void LL_USART_DisableIT_TXFE(USART_TypeDef *USARTx)
4009 {
4010  CLEAR_BIT(USARTx->CR1, USART_CR1_TXFEIE);
4011 }
4012 
4021 __STATIC_INLINE void LL_USART_DisableIT_RXFF(USART_TypeDef *USARTx)
4022 {
4023  CLEAR_BIT(USARTx->CR1, USART_CR1_RXFFIE);
4024 }
4025 
4026 #endif /* USART_CR1_FIFOEN */
4027 
4035 __STATIC_INLINE void LL_USART_DisableIT_LBD(USART_TypeDef *USARTx)
4036 {
4037  CLEAR_BIT(USARTx->CR2, USART_CR2_LBDIE);
4038 }
4039 
4050 __STATIC_INLINE void LL_USART_DisableIT_ERROR(USART_TypeDef *USARTx)
4051 {
4052  CLEAR_BIT(USARTx->CR3, USART_CR3_EIE);
4053 }
4054 
4063 __STATIC_INLINE void LL_USART_DisableIT_CTS(USART_TypeDef *USARTx)
4064 {
4065  CLEAR_BIT(USARTx->CR3, USART_CR3_CTSIE);
4066 }
4067 
4076 __STATIC_INLINE void LL_USART_DisableIT_WKUP(USART_TypeDef *USARTx)
4077 {
4078  CLEAR_BIT(USARTx->CR3, USART_CR3_WUFIE);
4079 }
4080 
4081 #if defined(USART_CR1_FIFOEN)
4082 
4090 __STATIC_INLINE void LL_USART_DisableIT_TXFT(USART_TypeDef *USARTx)
4091 {
4092  CLEAR_BIT(USARTx->CR3, USART_CR3_TXFTIE);
4093 }
4094 
4095 #endif /* USART_CR1_FIFOEN */
4096 #if defined(USART_TCBGT_SUPPORT)
4097 /* Function available only on devices supporting Transmit Complete before Guard Time feature */
4106 __STATIC_INLINE void LL_USART_DisableIT_TCBGT(USART_TypeDef *USARTx)
4107 {
4108  CLEAR_BIT(USARTx->CR3, USART_CR3_TCBGTIE);
4109 }
4110 #endif /* USART_TCBGT_SUPPORT */
4111 
4112 #if defined(USART_CR1_FIFOEN)
4113 
4121 __STATIC_INLINE void LL_USART_DisableIT_RXFT(USART_TypeDef *USARTx)
4122 {
4123  CLEAR_BIT(USARTx->CR3, USART_CR3_RXFTIE);
4124 }
4125 
4126 #endif /* USART_CR1_FIFOEN */
4127 
4133 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_IDLE(USART_TypeDef *USARTx)
4134 {
4135  return ((READ_BIT(USARTx->CR1, USART_CR1_IDLEIE) == (USART_CR1_IDLEIE)) ? 1UL : 0UL);
4136 }
4137 
4138 #if defined(USART_CR1_FIFOEN)
4139 /* Legacy define */
4140 #define LL_USART_IsEnabledIT_RXNE LL_USART_IsEnabledIT_RXNE_RXFNE
4141 
4150 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_RXNE_RXFNE(USART_TypeDef *USARTx)
4151 {
4152  return ((READ_BIT(USARTx->CR1, USART_CR1_RXNEIE_RXFNEIE) == (USART_CR1_RXNEIE_RXFNEIE)) ? 1UL : 0UL);
4153 }
4154 
4155 #else
4156 
4162 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_RXNE(USART_TypeDef *USARTx)
4163 {
4164  return ((READ_BIT(USARTx->CR1, USART_CR1_RXNEIE) == (USART_CR1_RXNEIE)) ? 1U : 0U);
4165 }
4166 
4167 #endif /* USART_CR1_FIFOEN */
4168 
4174 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TC(USART_TypeDef *USARTx)
4175 {
4176  return ((READ_BIT(USARTx->CR1, USART_CR1_TCIE) == (USART_CR1_TCIE)) ? 1UL : 0UL);
4177 }
4178 
4179 #if defined(USART_CR1_FIFOEN)
4180 /* Legacy define */
4181 #define LL_USART_IsEnabledIT_TXE LL_USART_IsEnabledIT_TXE_TXFNF
4182 
4191 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TXE_TXFNF(USART_TypeDef *USARTx)
4192 {
4193  return ((READ_BIT(USARTx->CR1, USART_CR1_TXEIE_TXFNFIE) == (USART_CR1_TXEIE_TXFNFIE)) ? 1UL : 0UL);
4194 }
4195 
4196 #else
4197 
4203 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TXE(USART_TypeDef *USARTx)
4204 {
4205  return ((READ_BIT(USARTx->CR1, USART_CR1_TXEIE) == (USART_CR1_TXEIE)) ? 1U : 0U);
4206 }
4207 
4208 #endif /* USART_CR1_FIFOEN */
4209 
4215 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_PE(USART_TypeDef *USARTx)
4216 {
4217  return ((READ_BIT(USARTx->CR1, USART_CR1_PEIE) == (USART_CR1_PEIE)) ? 1UL : 0UL);
4218 }
4219 
4226 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_CM(USART_TypeDef *USARTx)
4227 {
4228  return ((READ_BIT(USARTx->CR1, USART_CR1_CMIE) == (USART_CR1_CMIE)) ? 1UL : 0UL);
4229 }
4230 
4237 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_RTO(USART_TypeDef *USARTx)
4238 {
4239  return ((READ_BIT(USARTx->CR1, USART_CR1_RTOIE) == (USART_CR1_RTOIE)) ? 1UL : 0UL);
4240 }
4241 
4250 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_EOB(USART_TypeDef *USARTx)
4251 {
4252  return ((READ_BIT(USARTx->CR1, USART_CR1_EOBIE) == (USART_CR1_EOBIE)) ? 1UL : 0UL);
4253 }
4254 
4255 #if defined(USART_CR1_FIFOEN)
4256 
4264 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TXFE(USART_TypeDef *USARTx)
4265 {
4266  return ((READ_BIT(USARTx->CR1, USART_CR1_TXFEIE) == (USART_CR1_TXFEIE)) ? 1UL : 0UL);
4267 }
4268 
4277 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_RXFF(USART_TypeDef *USARTx)
4278 {
4279  return ((READ_BIT(USARTx->CR1, USART_CR1_RXFFIE) == (USART_CR1_RXFFIE)) ? 1UL : 0UL);
4280 }
4281 
4282 #endif /* USART_CR1_FIFOEN */
4283 
4291 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_LBD(USART_TypeDef *USARTx)
4292 {
4293  return ((READ_BIT(USARTx->CR2, USART_CR2_LBDIE) == (USART_CR2_LBDIE)) ? 1UL : 0UL);
4294 }
4295 
4302 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_ERROR(USART_TypeDef *USARTx)
4303 {
4304  return ((READ_BIT(USARTx->CR3, USART_CR3_EIE) == (USART_CR3_EIE)) ? 1UL : 0UL);
4305 }
4306 
4315 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_CTS(USART_TypeDef *USARTx)
4316 {
4317  return ((READ_BIT(USARTx->CR3, USART_CR3_CTSIE) == (USART_CR3_CTSIE)) ? 1UL : 0UL);
4318 }
4319 
4328 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_WKUP(USART_TypeDef *USARTx)
4329 {
4330  return ((READ_BIT(USARTx->CR3, USART_CR3_WUFIE) == (USART_CR3_WUFIE)) ? 1UL : 0UL);
4331 }
4332 
4333 #if defined(USART_CR1_FIFOEN)
4334 
4342 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TXFT(USART_TypeDef *USARTx)
4343 {
4344  return ((READ_BIT(USARTx->CR3, USART_CR3_TXFTIE) == (USART_CR3_TXFTIE)) ? 1UL : 0UL);
4345 }
4346 
4347 #endif /* USART_CR1_FIFOEN */
4348 #if defined(USART_TCBGT_SUPPORT)
4349 /* Function available only on devices supporting Transmit Complete before Guard Time feature */
4358 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TCBGT(USART_TypeDef *USARTx)
4359 {
4360  return ((READ_BIT(USARTx->CR3, USART_CR3_TCBGTIE) == (USART_CR3_TCBGTIE)) ? 1UL : 0UL);
4361 }
4362 #endif /* USART_TCBGT_SUPPORT */
4363 
4364 #if defined(USART_CR1_FIFOEN)
4365 
4373 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_RXFT(USART_TypeDef *USARTx)
4374 {
4375  return ((READ_BIT(USARTx->CR3, USART_CR3_RXFTIE) == (USART_CR3_RXFTIE)) ? 1UL : 0UL);
4376 }
4377 
4378 #endif /* USART_CR1_FIFOEN */
4379 
4393 __STATIC_INLINE void LL_USART_EnableDMAReq_RX(USART_TypeDef *USARTx)
4394 {
4395  SET_BIT(USARTx->CR3, USART_CR3_DMAR);
4396 }
4397 
4404 __STATIC_INLINE void LL_USART_DisableDMAReq_RX(USART_TypeDef *USARTx)
4405 {
4406  CLEAR_BIT(USARTx->CR3, USART_CR3_DMAR);
4407 }
4408 
4415 __STATIC_INLINE uint32_t LL_USART_IsEnabledDMAReq_RX(USART_TypeDef *USARTx)
4416 {
4417  return ((READ_BIT(USARTx->CR3, USART_CR3_DMAR) == (USART_CR3_DMAR)) ? 1UL : 0UL);
4418 }
4419 
4426 __STATIC_INLINE void LL_USART_EnableDMAReq_TX(USART_TypeDef *USARTx)
4427 {
4428  SET_BIT(USARTx->CR3, USART_CR3_DMAT);
4429 }
4430 
4437 __STATIC_INLINE void LL_USART_DisableDMAReq_TX(USART_TypeDef *USARTx)
4438 {
4439  CLEAR_BIT(USARTx->CR3, USART_CR3_DMAT);
4440 }
4441 
4448 __STATIC_INLINE uint32_t LL_USART_IsEnabledDMAReq_TX(USART_TypeDef *USARTx)
4449 {
4450  return ((READ_BIT(USARTx->CR3, USART_CR3_DMAT) == (USART_CR3_DMAT)) ? 1UL : 0UL);
4451 }
4452 
4459 __STATIC_INLINE void LL_USART_EnableDMADeactOnRxErr(USART_TypeDef *USARTx)
4460 {
4461  SET_BIT(USARTx->CR3, USART_CR3_DDRE);
4462 }
4463 
4470 __STATIC_INLINE void LL_USART_DisableDMADeactOnRxErr(USART_TypeDef *USARTx)
4471 {
4472  CLEAR_BIT(USARTx->CR3, USART_CR3_DDRE);
4473 }
4474 
4481 __STATIC_INLINE uint32_t LL_USART_IsEnabledDMADeactOnRxErr(USART_TypeDef *USARTx)
4482 {
4483  return ((READ_BIT(USARTx->CR3, USART_CR3_DDRE) == (USART_CR3_DDRE)) ? 1UL : 0UL);
4484 }
4485 
4496 __STATIC_INLINE uint32_t LL_USART_DMA_GetRegAddr(USART_TypeDef *USARTx, uint32_t Direction)
4497 {
4498  register uint32_t data_reg_addr;
4499 
4500  if (Direction == LL_USART_DMA_REG_DATA_TRANSMIT)
4501  {
4502  /* return address of TDR register */
4503  data_reg_addr = (uint32_t) &(USARTx->TDR);
4504  }
4505  else
4506  {
4507  /* return address of RDR register */
4508  data_reg_addr = (uint32_t) &(USARTx->RDR);
4509  }
4510 
4511  return data_reg_addr;
4512 }
4513 
4528 __STATIC_INLINE uint8_t LL_USART_ReceiveData8(USART_TypeDef *USARTx)
4529 {
4530  return (uint8_t)(READ_BIT(USARTx->RDR, USART_RDR_RDR) & 0xFFU);
4531 }
4532 
4539 __STATIC_INLINE uint16_t LL_USART_ReceiveData9(USART_TypeDef *USARTx)
4540 {
4541  return (uint16_t)(READ_BIT(USARTx->RDR, USART_RDR_RDR));
4542 }
4543 
4551 __STATIC_INLINE void LL_USART_TransmitData8(USART_TypeDef *USARTx, uint8_t Value)
4552 {
4553  USARTx->TDR = Value;
4554 }
4555 
4563 __STATIC_INLINE void LL_USART_TransmitData9(USART_TypeDef *USARTx, uint16_t Value)
4564 {
4565  USARTx->TDR = (uint16_t)(Value & 0x1FFUL);
4566 }
4567 
4584 __STATIC_INLINE void LL_USART_RequestAutoBaudRate(USART_TypeDef *USARTx)
4585 {
4586  SET_BIT(USARTx->RQR, (uint16_t)USART_RQR_ABRRQ);
4587 }
4588 
4595 __STATIC_INLINE void LL_USART_RequestBreakSending(USART_TypeDef *USARTx)
4596 {
4597  SET_BIT(USARTx->RQR, (uint16_t)USART_RQR_SBKRQ);
4598 }
4599 
4606 __STATIC_INLINE void LL_USART_RequestEnterMuteMode(USART_TypeDef *USARTx)
4607 {
4608  SET_BIT(USARTx->RQR, (uint16_t)USART_RQR_MMRQ);
4609 }
4610 
4625 __STATIC_INLINE void LL_USART_RequestRxDataFlush(USART_TypeDef *USARTx)
4626 {
4627  SET_BIT(USARTx->RQR, (uint16_t)USART_RQR_RXFRQ);
4628 }
4629 
4642 __STATIC_INLINE void LL_USART_RequestTxDataFlush(USART_TypeDef *USARTx)
4643 {
4644  SET_BIT(USARTx->RQR, (uint16_t)USART_RQR_TXFRQ);
4645 }
4646 
4651 #if defined(USE_FULL_LL_DRIVER)
4652 
4655 ErrorStatus LL_USART_DeInit(USART_TypeDef *USARTx);
4656 ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, LL_USART_InitTypeDef *USART_InitStruct);
4657 void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct);
4658 ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, LL_USART_ClockInitTypeDef *USART_ClockInitStruct);
4659 void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct);
4663 #endif /* USE_FULL_LL_DRIVER */
4664 
4673 #endif /* USART1 || USART2 || USART3 || UART4 || UART5 */
4674 
4679 #ifdef __cplusplus
4680 }
4681 #endif
4682 
4683 #endif /* STM32L4xx_LL_USART_H */
4684 
4685 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
__STATIC_INLINE void LL_USART_DisableClockInStopMode(USART_TypeDef *USARTx)
USART clock disabled in STOP Mode.
__STATIC_INLINE void LL_USART_SetTXRXSwap(USART_TypeDef *USARTx, uint32_t SwapConfig)
Configure TX/RX pins swapping setting. CR2 SWAP LL_USART_SetTXRXSwap.
__STATIC_INLINE void LL_USART_SetDataWidth(USART_TypeDef *USARTx, uint32_t DataWidth)
Set Word length (i.e. nb of data bits, excluding start and stop bits) CR1 M0 LL_USART_SetDataWidth ...
__STATIC_INLINE void LL_USART_ConfigFIFOsThreshold(USART_TypeDef *USARTx, uint32_t TXThreshold, uint32_t RXThreshold)
Configure TX and RX FIFOs Threshold.
__STATIC_INLINE void LL_USART_SetBinaryDataLogic(USART_TypeDef *USARTx, uint32_t DataLogic)
Configure Binary data logic.
__STATIC_INLINE void LL_USART_DisableDirectionTx(USART_TypeDef *USARTx)
Transmitter Disable CR1 TE LL_USART_DisableDirectionTx.
LL USART Init Structure definition.
register uint32_t brrtemp
__STATIC_INLINE uint32_t LL_USART_GetNodeAddressLen(USART_TypeDef *USARTx)
Return Length of Node Address used in Address Detection mode (7-bit or 4-bit) CR2 ADDM7 LL_USART_Get...
__STATIC_INLINE uint32_t LL_USART_GetTransferDirection(USART_TypeDef *USARTx)
Return enabled/disabled states of Transmitter and Receiver CR1 RE LL_USART_GetTransferDirection CR1...
__STATIC_INLINE void LL_USART_EnableDirectionTx(USART_TypeDef *USARTx)
Transmitter Enable CR1 TE LL_USART_EnableDirectionTx.
__STATIC_INLINE void LL_USART_ConfigCharacter(USART_TypeDef *USARTx, uint32_t DataWidth, uint32_t Parity, uint32_t StopBits)
Configure Character frame format (Datawidth, Parity control, Stop Bits)
__STATIC_INLINE void LL_USART_ConfigNodeAddress(USART_TypeDef *USARTx, uint32_t AddressLen, uint32_t NodeAddress)
Set Address of the USART node.
__STATIC_INLINE uint32_t LL_USART_IsClockEnabledInStopMode(USART_TypeDef *USARTx)
Indicate if USART clock is enabled in STOP Mode CR3 UCESM LL_USART_IsClockEnabledInStopMode.
__STATIC_INLINE void LL_USART_SetWakeUpMethod(USART_TypeDef *USARTx, uint32_t Method)
Set Receiver Wake Up method from Mute mode. CR1 WAKE LL_USART_SetWakeUpMethod.
__STATIC_INLINE void LL_USART_SetTransferBitOrder(USART_TypeDef *USARTx, uint32_t BitOrder)
Configure transfer bit order (either Less or Most Significant Bit First)
__STATIC_INLINE void LL_USART_DisableAutoBaudRate(USART_TypeDef *USARTx)
Disable Auto Baud-Rate Detection.
__STATIC_INLINE uint32_t LL_USART_GetTXRXSwap(USART_TypeDef *USARTx)
Retrieve TX/RX pins swapping configuration. CR2 SWAP LL_USART_GetTXRXSwap.
__STATIC_INLINE void LL_USART_SetParity(USART_TypeDef *USARTx, uint32_t Parity)
Configure Parity (enabled/disabled and parity mode if enabled).
__STATIC_INLINE uint32_t LL_USART_GetPrescaler(USART_TypeDef *USARTx)
Retrieve the Clock source prescaler for baudrate generator and oversampling.
__STATIC_INLINE uint32_t LL_USART_GetClockPolarity(USART_TypeDef *USARTx)
Return polarity of the clock output on the SCLK pin in synchronous mode.
__STATIC_INLINE void LL_USART_SetPrescaler(USART_TypeDef *USARTx, uint32_t PrescalerValue)
Configure Clock source prescaler for baudrate generator and oversampling.
__STATIC_INLINE void LL_USART_EnableMuteMode(USART_TypeDef *USARTx)
Allow switch between Mute Mode and Active mode CR1 MME LL_USART_EnableMuteMode.
LL USART Clock Init Structure definition.
void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
Set each field of a LL_USART_ClockInitTypeDef type structure to default value.
__STATIC_INLINE void uint32_t uint32_t OverSampling
__STATIC_INLINE uint32_t LL_USART_GetParity(USART_TypeDef *USARTx)
Return Parity configuration (enabled/disabled and parity mode if enabled) CR1 PS LL_USART_GetParity ...
__STATIC_INLINE void LL_USART_EnableAutoBaudRate(USART_TypeDef *USARTx)
Enable Auto Baud-Rate Detection.
__STATIC_INLINE uint32_t LL_USART_IsEnabledOverrunDetect(USART_TypeDef *USARTx)
Indicate if Overrun detection is enabled CR3 OVRDIS LL_USART_IsEnabledOverrunDetect.
__STATIC_INLINE uint32_t LL_USART_GetClockPhase(USART_TypeDef *USARTx)
Return phase of the clock output on the SCLK pin in synchronous mode.
__STATIC_INLINE void uint32_t uint32_t uint32_t BaudRate
__STATIC_INLINE void LL_USART_EnableClockInStopMode(USART_TypeDef *USARTx)
USART Clock enabled in STOP Mode.
__STATIC_INLINE uint32_t LL_USART_GetWakeUpMethod(USART_TypeDef *USARTx)
Return Receiver Wake Up method from Mute mode CR1 WAKE LL_USART_GetWakeUpMethod. ...
__STATIC_INLINE void LL_USART_Disable(USART_TypeDef *USARTx)
USART Disable (all USART prescalers and outputs are disabled)
__STATIC_INLINE uint32_t LL_USART_GetDataWidth(USART_TypeDef *USARTx)
Return Word length (i.e. nb of data bits, excluding start and stop bits) CR1 M0 LL_USART_GetDataWidt...
__STATIC_INLINE uint32_t LL_USART_GetRXFIFOThreshold(USART_TypeDef *USARTx)
Return RX FIFO Threshold Configuration.
__STATIC_INLINE uint32_t LL_USART_IsEnabledOneBitSamp(USART_TypeDef *USARTx)
Indicate if One bit sampling method is enabled CR3 ONEBIT LL_USART_IsEnabledOneBitSamp.
void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct)
Set each LL_USART_InitTypeDef field to default value.
__STATIC_INLINE void LL_USART_DisableRxTimeout(USART_TypeDef *USARTx)
Disable Receiver Timeout CR2 RTOEN LL_USART_DisableRxTimeout.
register uint32_t periphclkpresc
__STATIC_INLINE void LL_USART_DisableMuteMode(USART_TypeDef *USARTx)
Prevent Mute Mode use. Set Receiver in active mode permanently. CR1 MME LL_USART_DisableMuteMode.
__STATIC_INLINE void LL_USART_SetWKUPType(USART_TypeDef *USARTx, uint32_t Type)
Select event type for Wake UP Interrupt Flag (WUS[1:0] bits)
__STATIC_INLINE void LL_USART_EnableSCLKOutput(USART_TypeDef *USARTx)
Enable Clock output on SCLK pin.
__STATIC_INLINE uint32_t LL_USART_IsEnabledSCLKOutput(USART_TypeDef *USARTx)
Indicate if Clock output on SCLK pin is enabled.
ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
Initialize USART Clock related settings according to the specified parameters in the USART_ClockInitS...
__STATIC_INLINE uint32_t LL_USART_GetWKUPType(USART_TypeDef *USARTx)
Return event type for Wake UP Interrupt Flag (WUS[1:0] bits)
CLEAR_BIT(hrtc->Instance->CR, RTC_CR_WUTE)
register uint32_t brrresult
__STATIC_INLINE void uint32_t PeriphClk
__STATIC_INLINE void LL_USART_EnableDirectionRx(USART_TypeDef *USARTx)
Receiver Enable (Receiver is enabled and begins searching for a start bit) CR1 RE LL_USART_EnableDir...
__STATIC_INLINE void LL_USART_SetRXPinLevel(USART_TypeDef *USARTx, uint32_t PinInvMethod)
Configure RX pin active level logic CR2 RXINV LL_USART_SetRXPinLevel.
__STATIC_INLINE void LL_USART_ConfigClock(USART_TypeDef *USARTx, uint32_t Phase, uint32_t Polarity, uint32_t LBCPOutput)
Configure Clock signal format (Phase Polarity and choice about output of last bit clock pulse) ...
__STATIC_INLINE void LL_USART_EnableOneBitSamp(USART_TypeDef *USARTx)
Enable One bit sampling method CR3 ONEBIT LL_USART_EnableOneBitSamp.
__STATIC_INLINE void LL_USART_SetClockPhase(USART_TypeDef *USARTx, uint32_t ClockPhase)
Select the phase of the clock output on the SCLK pin in synchronous mode.
__STATIC_INLINE uint32_t LL_USART_GetOverSampling(USART_TypeDef *USARTx)
Return Oversampling mode CR1 OVER8 LL_USART_GetOverSampling.
__STATIC_INLINE uint32_t LL_USART_GetNodeAddress(USART_TypeDef *USARTx)
Return 8 bit Address of the USART node as set in ADD field of CR2.
__STATIC_INLINE void LL_USART_EnableCTSHWFlowCtrl(USART_TypeDef *USARTx)
Enable CTS HW Flow Control.
__STATIC_INLINE void LL_USART_DisableSCLKOutput(USART_TypeDef *USARTx)
Disable Clock output on SCLK pin.
__STATIC_INLINE uint32_t LL_USART_IsEnabledAutoBaud(USART_TypeDef *USARTx)
Indicate if Auto Baud-Rate Detection mechanism is enabled.
__STATIC_INLINE void LL_USART_EnableRTSHWFlowCtrl(USART_TypeDef *USARTx)
Enable RTS HW Flow Control.
__STATIC_INLINE void LL_USART_SetStopBitsLength(USART_TypeDef *USARTx, uint32_t StopBits)
Set the length of the stop bits CR2 STOP LL_USART_SetStopBitsLength.
__STATIC_INLINE void LL_USART_DisableOverrunDetect(USART_TypeDef *USARTx)
Disable Overrun detection CR3 OVRDIS LL_USART_DisableOverrunDetect.
__STATIC_INLINE uint32_t LL_USART_IsEnabled(USART_TypeDef *USARTx)
Indicate if USART is enabled CR1 UE LL_USART_IsEnabled.
__STATIC_INLINE void LL_USART_SetHWFlowCtrl(USART_TypeDef *USARTx, uint32_t HardwareFlowControl)
Configure HW Flow Control mode (both CTS and RTS)
__STATIC_INLINE void LL_USART_DisableOneBitSamp(USART_TypeDef *USARTx)
Disable One bit sampling method CR3 ONEBIT LL_USART_DisableOneBitSamp.
__STATIC_INLINE uint32_t LL_USART_GetTXFIFOThreshold(USART_TypeDef *USARTx)
Return TX FIFO Threshold Configuration.
__STATIC_INLINE void LL_USART_SetTransferDirection(USART_TypeDef *USARTx, uint32_t TransferDirection)
Configure simultaneously enabled/disabled states of Transmitter and Receiver CR1 RE LL_USART_SetTran...
ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, LL_USART_InitTypeDef *USART_InitStruct)
Initialize USART registers according to the specified parameters in USART_InitStruct.
__STATIC_INLINE void LL_USART_SetRXFIFOThreshold(USART_TypeDef *USARTx, uint32_t Threshold)
Configure RX FIFO Threshold.
__STATIC_INLINE void LL_USART_EnableOverrunDetect(USART_TypeDef *USARTx)
Enable Overrun detection CR3 OVRDIS LL_USART_EnableOverrunDetect.
__STATIC_INLINE void LL_USART_DisableFIFO(USART_TypeDef *USARTx)
FIFO Mode Disable.
__STATIC_INLINE uint32_t LL_USART_IsEnabledInStopMode(USART_TypeDef *USARTx)
Indicate if USART is enabled in STOP Mode (able to wake up MCU from Stop mode or not) ...
__STATIC_INLINE void LL_USART_SetAutoBaudRateMode(USART_TypeDef *USARTx, uint32_t AutoBaudRateMode)
Set Auto Baud-Rate mode bits.
__STATIC_INLINE void LL_USART_SetLastClkPulseOutput(USART_TypeDef *USARTx, uint32_t LastBitClockPulse)
Configure if Clock pulse of the last data bit is output to the SCLK pin or not.
__STATIC_INLINE void LL_USART_DisableInStopMode(USART_TypeDef *USARTx)
USART disabled in STOP Mode.
__STATIC_INLINE uint32_t LL_USART_IsEnabledRxTimeout(USART_TypeDef *USARTx)
Indicate if Receiver Timeout feature is enabled CR2 RTOEN LL_USART_IsEnabledRxTimeout.
__STATIC_INLINE uint32_t LL_USART_GetStopBitsLength(USART_TypeDef *USARTx)
Retrieve the length of the stop bits CR2 STOP LL_USART_GetStopBitsLength.
__STATIC_INLINE uint32_t LL_USART_GetLastClkPulseOutput(USART_TypeDef *USARTx)
Retrieve Clock pulse of the last data bit output configuration (Last bit Clock pulse output to the SC...
__STATIC_INLINE void LL_USART_SetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t PrescalerValue, uint32_t OverSampling, uint32_t BaudRate) __STATIC_INLINE void LL_USART_SetBaudRate(USART_TypeDef *USARTx
Configure USART BRR register for achieving expected Baud Rate value.
__STATIC_INLINE uint32_t LL_USART_IsEnabledFIFO(USART_TypeDef *USARTx)
Indicate if FIFO Mode is enabled.
__STATIC_INLINE void LL_USART_SetTXPinLevel(USART_TypeDef *USARTx, uint32_t PinInvMethod)
Configure TX pin active level logic CR2 TXINV LL_USART_SetTXPinLevel.
__STATIC_INLINE uint32_t LL_USART_GetRXPinLevel(USART_TypeDef *USARTx)
Retrieve RX pin active level logic configuration CR2 RXINV LL_USART_GetRXPinLevel.
__STATIC_INLINE uint32_t LL_USART_GetTXPinLevel(USART_TypeDef *USARTx)
Retrieve TX pin active level logic configuration CR2 TXINV LL_USART_GetTXPinLevel.
__STATIC_INLINE void LL_USART_Enable(USART_TypeDef *USARTx)
USART Enable CR1 UE LL_USART_Enable.
__STATIC_INLINE uint32_t LL_USART_GetBinaryDataLogic(USART_TypeDef *USARTx)
Retrieve Binary data configuration CR2 DATAINV LL_USART_GetBinaryDataLogic.
static const uint32_t USART_PRESCALER_TAB[]
__STATIC_INLINE void LL_USART_EnableRxTimeout(USART_TypeDef *USARTx)
Enable Receiver Timeout CR2 RTOEN LL_USART_EnableRxTimeout.
MODIFY_REG(hrtc->Instance->CR, RTC_CR_WUCKSEL,(uint32_t) WakeUpClock)
__STATIC_INLINE void LL_USART_DisableCTSHWFlowCtrl(USART_TypeDef *USARTx)
Disable CTS HW Flow Control.
ErrorStatus LL_USART_DeInit(USART_TypeDef *USARTx)
De-initialize USART registers (Registers restored to their default values).
__STATIC_INLINE uint32_t LL_USART_GetHWFlowCtrl(USART_TypeDef *USARTx)
Return HW Flow Control configuration (both CTS and RTS)
__STATIC_INLINE uint32_t LL_USART_GetTransferBitOrder(USART_TypeDef *USARTx)
Return transfer bit order (either Less or Most Significant Bit First)
__STATIC_INLINE void LL_USART_SetClockPolarity(USART_TypeDef *USARTx, uint32_t ClockPolarity)
Select the polarity of the clock output on the SCLK pin in synchronous mode.
__STATIC_INLINE void LL_USART_DisableDirectionRx(USART_TypeDef *USARTx)
Receiver Disable CR1 RE LL_USART_DisableDirectionRx.
__STATIC_INLINE void LL_USART_SetTXFIFOThreshold(USART_TypeDef *USARTx, uint32_t Threshold)
Configure TX FIFO Threshold.
__STATIC_INLINE void LL_USART_DisableRTSHWFlowCtrl(USART_TypeDef *USARTx)
Disable RTS HW Flow Control.
__STATIC_INLINE void LL_USART_SetOverSampling(USART_TypeDef *USARTx, uint32_t OverSampling)
Set Oversampling to 8-bit or 16-bit mode CR1 OVER8 LL_USART_SetOverSampling.
__STATIC_INLINE uint32_t LL_USART_GetAutoBaudRateMode(USART_TypeDef *USARTx)
Return Auto Baud-Rate mode.
__STATIC_INLINE void LL_USART_EnableInStopMode(USART_TypeDef *USARTx)
USART enabled in STOP Mode.
__STATIC_INLINE uint32_t LL_USART_IsEnabledMuteMode(USART_TypeDef *USARTx)
Indicate if switch between Mute Mode and Active mode is allowed CR1 MME LL_USART_IsEnabledMuteMode.
__STATIC_INLINE void LL_USART_EnableFIFO(USART_TypeDef *USARTx)
FIFO Mode Enable.