Initialisation and deinitialisation functions

Functions
ErrorStatus	LL_LPTIM_DeInit (LPTIM_TypeDef *LPTIMx)
	Set LPTIMx registers to their reset values. More...
void	LL_LPTIM_StructInit (LL_LPTIM_InitTypeDef *LPTIM_InitStruct)
	Set each fields of the LPTIM_InitStruct structure to its default value. More...
ErrorStatus	LL_LPTIM_Init (LPTIM_TypeDef *LPTIMx, LL_LPTIM_InitTypeDef *LPTIM_InitStruct)
	Configure the LPTIMx peripheral according to the specified parameters. More...
void	LL_LPTIM_Disable (LPTIM_TypeDef *LPTIMx)
	Disable the LPTIM instance CR ENABLE LL_LPTIM_Disable. More...

Detailed Description

Function Documentation

LL_LPTIM_DeInit()

ErrorStatus LL_LPTIM_DeInit

(

LPTIM_TypeDef *

LPTIMx

)

Set LPTIMx registers to their reset values.

Parameters

LPTIMx

LP Timer instance

Return values

An	ErrorStatus enumeration value: SUCCESS: LPTIMx registers are de-initialized ERROR: invalid LPTIMx instance

Definition at line 96 of file stm32l4xx_ll_lptim.c.

{
  ErrorStatus result = SUCCESS;

  /* Check the parameters */
  assert_param(IS_LPTIM_INSTANCE(LPTIMx));

  if (LPTIMx == LPTIM1)
  {
    LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_LPTIM1);
    LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_LPTIM1);
  }
#if defined(LPTIM2)
  else if (LPTIMx == LPTIM2)
  {
    LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_LPTIM2);
    LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_LPTIM2);
  }
#endif /* LPTIM2 */
  else
  {
    result = ERROR;
  }

  return result;
}

LL_LPTIM_Disable()

void LL_LPTIM_Disable

(

LPTIM_TypeDef *

LPTIMx

)

Disable the LPTIM instance CR ENABLE LL_LPTIM_Disable.

Parameters

LPTIMx

Low-Power Timer instance

Note

The following sequence is required to solve LPTIM disable HW limitation. Please check Errata Sheet ES0335 for more details under "MCU may remain stuck in LPTIM interrupt when entering Stop mode" section.

Return values

None

Definition at line 199 of file stm32l4xx_ll_lptim.c.

{
  LL_RCC_ClocksTypeDef rcc_clock;
  uint32_t tmpclksource = 0;
  uint32_t tmpIER;
  uint32_t tmpCFGR;
  uint32_t tmpCMP;
  uint32_t tmpARR;
  uint32_t tmpOR;
#if defined(LPTIM_RCR_REP)
  uint32_t tmpRCR;
#endif

  /* Check the parameters */
  assert_param(IS_LPTIM_INSTANCE(LPTIMx));

  __disable_irq();

  /********** Save LPTIM Config *********/
  /* Save LPTIM source clock */
  switch ((uint32_t)LPTIMx)
  {
     case LPTIM1_BASE:
       tmpclksource = LL_RCC_GetLPTIMClockSource(LL_RCC_LPTIM1_CLKSOURCE);
       break;
#if defined(LPTIM2)
     case LPTIM2_BASE:
       tmpclksource = LL_RCC_GetLPTIMClockSource(LL_RCC_LPTIM2_CLKSOURCE);
       break;
#endif /* LPTIM2 */
     default:
       break;
  }

  /* Save LPTIM configuration registers */
  tmpIER = LPTIMx->IER;
  tmpCFGR = LPTIMx->CFGR;
  tmpCMP = LPTIMx->CMP;
  tmpARR = LPTIMx->ARR;
  tmpOR = LPTIMx->OR;
#if defined(LPTIM_RCR_REP)
  tmpRCR = LPTIMx->RCR;
#endif

  /************* Reset LPTIM ************/
  (void)LL_LPTIM_DeInit(LPTIMx);

  /********* Restore LPTIM Config *******/
  LL_RCC_GetSystemClocksFreq(&rcc_clock);

#if defined(LPTIM_RCR_REP)
  if ((tmpCMP != 0UL) || (tmpARR != 0UL) || (tmpRCR != 0UL))
#else
  if ((tmpCMP != 0UL) || (tmpARR != 0UL))
#endif
  {
    /* Force LPTIM source kernel clock from APB */
    switch ((uint32_t)LPTIMx)
    {
       case LPTIM1_BASE:
         LL_RCC_SetLPTIMClockSource(LL_RCC_LPTIM1_CLKSOURCE_PCLK1);
         break;
#if defined(LPTIM2)
       case LPTIM2_BASE:
         LL_RCC_SetLPTIMClockSource(LL_RCC_LPTIM2_CLKSOURCE_PCLK1);
         break;
#endif /* LPTIM2 */
       default:
         break;
    }

    if (tmpCMP != 0UL)
    {
      /* Restore CMP and ARR registers (LPTIM should be enabled first) */
      LPTIMx->CR |= LPTIM_CR_ENABLE;
      LPTIMx->CMP = tmpCMP;

      /* Polling on CMP write ok status after above restore operation */
      do
      {
        rcc_clock.SYSCLK_Frequency--; /* Used for timeout */
      } while (((LL_LPTIM_IsActiveFlag_CMPOK(LPTIMx) != 1UL)) && ((rcc_clock.SYSCLK_Frequency) > 0UL));

      LL_LPTIM_ClearFlag_CMPOK(LPTIMx);
    }

    if (tmpARR != 0UL)
    {
      LPTIMx->CR |= LPTIM_CR_ENABLE;
      LPTIMx->ARR = tmpARR;

      LL_RCC_GetSystemClocksFreq(&rcc_clock);
      /* Polling on ARR write ok status after above restore operation */
      do
      {
        rcc_clock.SYSCLK_Frequency--; /* Used for timeout */
      } while (((LL_LPTIM_IsActiveFlag_ARROK(LPTIMx) != 1UL)) && ((rcc_clock.SYSCLK_Frequency) > 0UL));

      LL_LPTIM_ClearFlag_ARROK(LPTIMx);
    }

#if defined(LPTIM_RCR_REP)
    if (tmpRCR != 0UL)
    {
      LPTIMx->CR |= LPTIM_CR_ENABLE;
      LPTIMx->RCR = tmpRCR;

      LL_RCC_GetSystemClocksFreq(&rcc_clock);
      /* Polling on RCR write ok status after above restore operation */
      do
      {
        rcc_clock.SYSCLK_Frequency--; /* Used for timeout */
      } while (((LL_LPTIM_IsActiveFlag_REPOK(LPTIMx) != 1UL)) && ((rcc_clock.SYSCLK_Frequency) > 0UL));

      LL_LPTIM_ClearFlag_REPOK(LPTIMx);
    }
#endif

    /* Restore LPTIM source kernel clock */
    LL_RCC_SetLPTIMClockSource(tmpclksource);
  }

  /* Restore configuration registers (LPTIM should be disabled first) */
  LPTIMx->CR &= ~(LPTIM_CR_ENABLE);
  LPTIMx->IER = tmpIER;
  LPTIMx->CFGR = tmpCFGR;
  LPTIMx->OR = tmpOR;

  __enable_irq();
}

LL_LPTIM_Init()

ErrorStatus LL_LPTIM_Init	(	LPTIM_TypeDef *	LPTIMx,
		LL_LPTIM_InitTypeDef *	LPTIM_InitStruct
	)

Configure the LPTIMx peripheral according to the specified parameters.

Note

LL_LPTIM_Init can only be called when the LPTIM instance is disabled.

LPTIMx can be disabled using unitary function LL_LPTIM_Disable().

Parameters

LPTIMx	LP Timer Instance
LPTIM_InitStruct	pointer to a LL_LPTIM_InitTypeDef structure

Return values

An	ErrorStatus enumeration value: SUCCESS: LPTIMx instance has been initialized ERROR: LPTIMx instance hasn't been initialized

Definition at line 148 of file stm32l4xx_ll_lptim.c.

{
  ErrorStatus result = SUCCESS;
  /* Check the parameters */
  assert_param(IS_LPTIM_INSTANCE(LPTIMx));
  assert_param(IS_LL_LPTIM_CLOCK_SOURCE(LPTIM_InitStruct->ClockSource));
  assert_param(IS_LL_LPTIM_CLOCK_PRESCALER(LPTIM_InitStruct->Prescaler));
  assert_param(IS_LL_LPTIM_WAVEFORM(LPTIM_InitStruct->Waveform));
  assert_param(IS_LL_LPTIM_OUTPUT_POLARITY(LPTIM_InitStruct->Polarity));

  /* The LPTIMx_CFGR register must only be modified when the LPTIM is disabled
     (ENABLE bit is reset to 0).
  */
  if (LL_LPTIM_IsEnabled(LPTIMx) == 1UL)
  {
    result = ERROR;
  }
  else
  {
    /* Set CKSEL bitfield according to ClockSource value */
    /* Set PRESC bitfield according to Prescaler value */
    /* Set WAVE bitfield according to Waveform value */
    /* Set WAVEPOL bitfield according to Polarity value */
    MODIFY_REG(LPTIMx->CFGR,
               (LPTIM_CFGR_CKSEL | LPTIM_CFGR_PRESC | LPTIM_CFGR_WAVE | LPTIM_CFGR_WAVPOL),
               LPTIM_InitStruct->ClockSource | \
               LPTIM_InitStruct->Prescaler | \
               LPTIM_InitStruct->Waveform | \
               LPTIM_InitStruct->Polarity);
  }

  return result;
}

LL_LPTIM_StructInit()

void LL_LPTIM_StructInit

(

LL_LPTIM_InitTypeDef *

LPTIM_InitStruct

)

Set each fields of the LPTIM_InitStruct structure to its default value.

Parameters

LPTIM_InitStruct

pointer to a LL_LPTIM_InitTypeDef structure

Return values

None

Definition at line 129 of file stm32l4xx_ll_lptim.c.

{
  /* Set the default configuration */
  LPTIM_InitStruct->ClockSource = LL_LPTIM_CLK_SOURCE_INTERNAL;
  LPTIM_InitStruct->Prescaler   = LL_LPTIM_PRESCALER_DIV1;
  LPTIM_InitStruct->Waveform    = LL_LPTIM_OUTPUT_WAVEFORM_PWM;
  LPTIM_InitStruct->Polarity    = LL_LPTIM_OUTPUT_POLARITY_REGULAR;
}