371 uint32_t tmpregisterGCR;
373 uint32_t syncen_bits;
399 #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 416 #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 424 if ((hsai->
Instance != SAI1_Block_A) ||
438 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 470 case SAI_SYNCEXT_DISABLE :
473 case SAI_SYNCEXT_OUTBLOCKA_ENABLE :
474 tmpregisterGCR = SAI_GCR_SYNCOUT_0;
476 case SAI_SYNCEXT_OUTBLOCKB_ENABLE :
477 tmpregisterGCR = SAI_GCR_SYNCOUT_1;
486 case SAI_ASYNCHRONOUS :
489 case SAI_SYNCHRONOUS :
490 syncen_bits = SAI_xCR1_SYNCEN_0;
492 case SAI_SYNCHRONOUS_EXT_SAI1 :
493 syncen_bits = SAI_xCR1_SYNCEN_1;
495 case SAI_SYNCHRONOUS_EXT_SAI2 :
496 syncen_bits = SAI_xCR1_SYNCEN_1;
497 tmpregisterGCR |= SAI_GCR_SYNCIN_0;
504 #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || \ 505 defined(STM32L496xx) || defined(STM32L4A6xx) || \ 506 defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 510 SAI1->GCR = tmpregisterGCR;
514 SAI2->GCR = tmpregisterGCR;
519 SAI1->GCR = tmpregisterGCR;
531 #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || \ 532 defined(STM32L496xx) || defined(STM32L4A6xx) || \ 533 defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 553 #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 576 if ((tmpval % 10U) > 8U)
590 if ((tmpval % 10U) > 8U)
603 ckstr_bits = (hsai->
Init.
ClockStrobing == SAI_CLOCKSTROBING_RISINGEDGE) ? 0U : SAI_xCR1_CKSTR;
608 ckstr_bits = (hsai->
Init.
ClockStrobing == SAI_CLOCKSTROBING_RISINGEDGE) ? SAI_xCR1_CKSTR : 0U;
613 #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 614 hsai->
Instance->CR1 &= ~(SAI_xCR1_MODE | SAI_xCR1_PRTCFG | SAI_xCR1_DS | \
615 SAI_xCR1_LSBFIRST | SAI_xCR1_CKSTR | SAI_xCR1_SYNCEN | \
616 SAI_xCR1_MONO | SAI_xCR1_OUTDRIV | SAI_xCR1_DMAEN | \
617 SAI_xCR1_NOMCK | SAI_xCR1_MCKDIV | SAI_xCR1_OSR);
621 ckstr_bits | syncen_bits | \
623 hsai->Init.NoDivider | (hsai->
Init.
Mckdiv << 20) | \
626 hsai->
Instance->CR1 &= ~(SAI_xCR1_MODE | SAI_xCR1_PRTCFG | SAI_xCR1_DS | \
627 SAI_xCR1_LSBFIRST | SAI_xCR1_CKSTR | SAI_xCR1_SYNCEN | \
628 SAI_xCR1_MONO | SAI_xCR1_OUTDRIV | SAI_xCR1_DMAEN | \
629 SAI_xCR1_NODIV | SAI_xCR1_MCKDIV);
633 ckstr_bits | syncen_bits | \
635 hsai->Init.NoDivider | (hsai->
Init.
Mckdiv << 20));
639 hsai->
Instance->CR2 &= ~(SAI_xCR2_FTH | SAI_xCR2_FFLUSH | SAI_xCR2_COMP | SAI_xCR2_CPL);
643 hsai->
Instance->FRCR &= (~(SAI_xFRCR_FRL | SAI_xFRCR_FSALL | SAI_xFRCR_FSDEF | \
644 SAI_xFRCR_FSPOL | SAI_xFRCR_FSOFF));
653 hsai->
Instance->SLOTR &= (~(SAI_xSLOTR_FBOFF | SAI_xSLOTR_SLOTSZ | \
654 SAI_xSLOTR_NBSLOT | SAI_xSLOTR_SLOTEN));
659 #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 664 SAI1->PDMCR &= ~(SAI_PDMCR_PDMEN);
670 SAI1->PDMCR |= SAI_PDMCR_PDMEN;
static HAL_StatusTypeDef SAI_Disable(SAI_HandleTypeDef *hsai)
Disable the SAI and wait for the disabling.
void(* TxCpltCallback)(struct __SAI_HandleTypeDef *hsai)
void(* RxHalfCpltCallback)(struct __SAI_HandleTypeDef *hsai)
void HAL_SAI_RxHalfCpltCallback(SAI_HandleTypeDef *hsai)
Rx Transfer half completed callback.
void(* RxCpltCallback)(struct __SAI_HandleTypeDef *hsai)
SAI_Block_TypeDef * Instance
__IO HAL_SAI_StateTypeDef State
void HAL_SAI_ErrorCallback(SAI_HandleTypeDef *hsai)
SAI error callback.
SAI_SlotInitTypeDef SlotInit
uint32_t ActiveFrameLength
FunctionalState Activation
void HAL_SAI_RxCpltCallback(SAI_HandleTypeDef *hsai)
Rx Transfer completed callback.
SAI_FrameInitTypeDef FrameInit
uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk)
Return the peripheral clock frequency for peripherals with clock source from PLLSAIs.
SAI_PdmInitTypeDef PdmInit
void HAL_SAI_MspInit(SAI_HandleTypeDef *hsai)
Initialize the SAI MSP.
void HAL_SAI_TxCpltCallback(SAI_HandleTypeDef *hsai)
Tx Transfer completed callback.
void(* TxHalfCpltCallback)(struct __SAI_HandleTypeDef *hsai)
void(* MspInitCallback)(struct __SAI_HandleTypeDef *hsai)
assert_param(IS_RTC_WAKEUP_CLOCK(WakeUpClock))
void HAL_SAI_TxHalfCpltCallback(SAI_HandleTypeDef *hsai)
Tx Transfer Half completed callback.
void(* ErrorCallback)(struct __SAI_HandleTypeDef *hsai)