STM32L4xx_HAL_Driver  1.14.0
Extended Peripheral Control functions

Peripheral Control functions. More...

Functions

HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent (TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
 Configure the TIM commutation event sequence. More...
 
HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT (TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
 Configure the TIM commutation event sequence with interrupt. More...
 
HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA (TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
 Configure the TIM commutation event sequence with DMA. More...
 
HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization (TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef *sMasterConfig)
 Configures the TIM in master mode. More...
 
HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime (TIM_HandleTypeDef *htim, TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig)
 Configures the Break feature, dead time, Lock level, OSSI/OSSR State and the AOE(automatic output enable). More...
 
HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput (TIM_HandleTypeDef *htim, uint32_t BreakInput, TIMEx_BreakInputConfigTypeDef *sBreakInputConfig)
 Configures the break input source. More...
 
HAL_StatusTypeDef HAL_TIMEx_GroupChannel5 (TIM_HandleTypeDef *htim, uint32_t Channels)
 Group channel 5 and channel 1, 2 or 3. More...
 
HAL_StatusTypeDef HAL_TIMEx_RemapConfig (TIM_HandleTypeDef *htim, uint32_t Remap)
 Configures the TIMx Remapping input capabilities. More...
 

Detailed Description

Peripheral Control functions.

  ==============================================================================
                    ##### Peripheral Control functions #####
  ==============================================================================
  [..]
    This section provides functions allowing to:
      (+) Configure the commutation event in case of use of the Hall sensor interface.
      (+) Configure Output channels for OC and PWM mode.

      (+) Configure Complementary channels, break features and dead time.
      (+) Configure Master synchronization.
      (+) Configure timer remapping capabilities.
      (+) Enable or disable channel grouping.

Function Documentation

◆ HAL_TIMEx_ConfigBreakDeadTime()

HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime ( TIM_HandleTypeDef htim,
TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig 
)

Configures the Break feature, dead time, Lock level, OSSI/OSSR State and the AOE(automatic output enable).

Parameters
htimTIM handle
sBreakDeadTimeConfigpointer to a TIM_ConfigBreakDeadConfigTypeDef structure that contains the BDTR Register configuration information for the TIM peripheral.
Return values
HALstatus

Definition at line 1699 of file stm32l4xx_hal_tim_ex.c.

1701 {
1702  /* Keep this variable initialized to 0 as it is used to configure BDTR register */
1703  uint32_t tmpbdtr = 0U;
1704 
1705  /* Check the parameters */
1706  assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance));
1707  assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode));
1708  assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode));
1709  assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel));
1710  assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime));
1711  assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState));
1712  assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity));
1713  assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->BreakFilter));
1714  assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput));
1715 
1716  /* Check input state */
1717  __HAL_LOCK(htim);
1718 
1719  /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State,
1720  the OSSI State, the dead time value and the Automatic Output Enable Bit */
1721 
1722  /* Set the BDTR bits */
1723  MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime);
1724  MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel);
1725  MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode);
1726  MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode);
1727  MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState);
1728  MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity);
1729  MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput);
1730  MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, (sBreakDeadTimeConfig->BreakFilter << TIM_BDTR_BKF_Pos));
1731 
1732  if (IS_TIM_BKIN2_INSTANCE(htim->Instance))
1733  {
1734  /* Check the parameters */
1735  assert_param(IS_TIM_BREAK2_STATE(sBreakDeadTimeConfig->Break2State));
1736  assert_param(IS_TIM_BREAK2_POLARITY(sBreakDeadTimeConfig->Break2Polarity));
1737  assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->Break2Filter));
1738 
1739  /* Set the BREAK2 input related BDTR bits */
1740  MODIFY_REG(tmpbdtr, TIM_BDTR_BK2F, (sBreakDeadTimeConfig->Break2Filter << TIM_BDTR_BK2F_Pos));
1741  MODIFY_REG(tmpbdtr, TIM_BDTR_BK2E, sBreakDeadTimeConfig->Break2State);
1742  MODIFY_REG(tmpbdtr, TIM_BDTR_BK2P, sBreakDeadTimeConfig->Break2Polarity);
1743  }
1744 
1745  /* Set TIMx_BDTR */
1746  htim->Instance->BDTR = tmpbdtr;
1747 
1748  __HAL_UNLOCK(htim);
1749 
1750  return HAL_OK;
1751 }
__HAL_UNLOCK(hrtc)
__HAL_LOCK(hrtc)
return HAL_OK
MODIFY_REG(hrtc->Instance->CR, RTC_CR_WUCKSEL,(uint32_t) WakeUpClock)
assert_param(IS_RTC_WAKEUP_CLOCK(WakeUpClock))

◆ HAL_TIMEx_ConfigBreakInput()

HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput ( TIM_HandleTypeDef htim,
uint32_t  BreakInput,
TIMEx_BreakInputConfigTypeDef sBreakInputConfig 
)

Configures the break input source.

Parameters
htimTIM handle.
BreakInputBreak input to configure This parameter can be one of the following values:
  • TIM_BREAKINPUT_BRK: Timer break input
  • TIM_BREAKINPUT_BRK2: Timer break 2 input
sBreakInputConfigBreak input source configuration
Return values
HALstatus

Definition at line 1763 of file stm32l4xx_hal_tim_ex.c.

1767 {
1768  uint32_t tmporx;
1769  uint32_t bkin_enable_mask = 0U;
1770  uint32_t bkin_polarity_mask = 0U;
1771  uint32_t bkin_enable_bitpos = 0U;
1772  uint32_t bkin_polarity_bitpos = 0U;
1773 
1774  /* Check the parameters */
1775  assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance));
1776  assert_param(IS_TIM_BREAKINPUT(BreakInput));
1777  assert_param(IS_TIM_BREAKINPUTSOURCE(sBreakInputConfig->Source));
1778  assert_param(IS_TIM_BREAKINPUTSOURCE_STATE(sBreakInputConfig->Enable));
1779 #if defined(DFSDM1_Channel0)
1780  if (sBreakInputConfig->Source != TIM_BREAKINPUTSOURCE_DFSDM1)
1781  {
1782  assert_param(IS_TIM_BREAKINPUTSOURCE_POLARITY(sBreakInputConfig->Polarity));
1783  }
1784 #else
1785  assert_param(IS_TIM_BREAKINPUTSOURCE_POLARITY(sBreakInputConfig->Polarity));
1786 #endif /* DFSDM1_Channel0 */
1787 
1788  /* Check input state */
1789  __HAL_LOCK(htim);
1790 
1791  switch (sBreakInputConfig->Source)
1792  {
1793  case TIM_BREAKINPUTSOURCE_BKIN:
1794  {
1795  bkin_enable_mask = TIM1_OR2_BKINE;
1796  bkin_enable_bitpos = TIM1_OR2_BKINE_Pos;
1797  bkin_polarity_mask = TIM1_OR2_BKINP;
1798  bkin_polarity_bitpos = TIM1_OR2_BKINP_Pos;
1799  break;
1800  }
1801  case TIM_BREAKINPUTSOURCE_COMP1:
1802  {
1803  bkin_enable_mask = TIM1_OR2_BKCMP1E;
1804  bkin_enable_bitpos = TIM1_OR2_BKCMP1E_Pos;
1805  bkin_polarity_mask = TIM1_OR2_BKCMP1P;
1806  bkin_polarity_bitpos = TIM1_OR2_BKCMP1P_Pos;
1807  break;
1808  }
1809  case TIM_BREAKINPUTSOURCE_COMP2:
1810  {
1811  bkin_enable_mask = TIM1_OR2_BKCMP2E;
1812  bkin_enable_bitpos = TIM1_OR2_BKCMP2E_Pos;
1813  bkin_polarity_mask = TIM1_OR2_BKCMP2P;
1814  bkin_polarity_bitpos = TIM1_OR2_BKCMP2P_Pos;
1815  break;
1816  }
1817 #if defined(DFSDM1_Channel0)
1818  case TIM_BREAKINPUTSOURCE_DFSDM1:
1819  {
1820  bkin_enable_mask = TIM1_OR2_BKDF1BK0E;
1821  bkin_enable_bitpos = 8U;
1822  break;
1823  }
1824 #endif /* DFSDM1_Channel0 */
1825 
1826  default:
1827  break;
1828  }
1829 
1830  switch (BreakInput)
1831  {
1832  case TIM_BREAKINPUT_BRK:
1833  {
1834  /* Get the TIMx_OR2 register value */
1835  tmporx = htim->Instance->OR2;
1836 
1837  /* Enable the break input */
1838  tmporx &= ~bkin_enable_mask;
1839  tmporx |= (sBreakInputConfig->Enable << bkin_enable_bitpos) & bkin_enable_mask;
1840 
1841  /* Set the break input polarity */
1842 #if defined(DFSDM1_Channel0)
1843  if (sBreakInputConfig->Source != TIM_BREAKINPUTSOURCE_DFSDM1)
1844 #endif /* DFSDM1_Channel0 */
1845  {
1846  tmporx &= ~bkin_polarity_mask;
1847  tmporx |= (sBreakInputConfig->Polarity << bkin_polarity_bitpos) & bkin_polarity_mask;
1848  }
1849 
1850  /* Set TIMx_OR2 */
1851  htim->Instance->OR2 = tmporx;
1852  break;
1853  }
1854  case TIM_BREAKINPUT_BRK2:
1855  {
1856  /* Get the TIMx_OR3 register value */
1857  tmporx = htim->Instance->OR3;
1858 
1859  /* Enable the break input */
1860  tmporx &= ~bkin_enable_mask;
1861  tmporx |= (sBreakInputConfig->Enable << bkin_enable_bitpos) & bkin_enable_mask;
1862 
1863  /* Set the break input polarity */
1864 #if defined(DFSDM1_Channel0)
1865  if (sBreakInputConfig->Source != TIM_BREAKINPUTSOURCE_DFSDM1)
1866 #endif /* DFSDM1_Channel0 */
1867  {
1868  tmporx &= ~bkin_polarity_mask;
1869  tmporx |= (sBreakInputConfig->Polarity << bkin_polarity_bitpos) & bkin_polarity_mask;
1870  }
1871 
1872  /* Set TIMx_OR3 */
1873  htim->Instance->OR3 = tmporx;
1874  break;
1875  }
1876  default:
1877  break;
1878  }
1879 
1880  __HAL_UNLOCK(htim);
1881 
1882  return HAL_OK;
1883 }
__HAL_UNLOCK(hrtc)
__HAL_LOCK(hrtc)
return HAL_OK
assert_param(IS_RTC_WAKEUP_CLOCK(WakeUpClock))

◆ HAL_TIMEx_ConfigCommutEvent()

HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent ( TIM_HandleTypeDef htim,
uint32_t  InputTrigger,
uint32_t  CommutationSource 
)

Configure the TIM commutation event sequence.

Note
This function is mandatory to use the commutation event in order to update the configuration at each commutation detection on the TRGI input of the Timer, the typical use of this feature is with the use of another Timer(interface Timer) configured in Hall sensor interface, this interface Timer will generate the commutation at its TRGO output (connected to Timer used in this function) each time the TI1 of the Interface Timer detect a commutation at its input TI1.
Parameters
htimTIM handle
InputTriggerthe Internal trigger corresponding to the Timer Interfacing with the Hall sensor This parameter can be one of the following values:
  • TIM_TS_ITR0: Internal trigger 0 selected
  • TIM_TS_ITR1: Internal trigger 1 selected
  • TIM_TS_ITR2: Internal trigger 2 selected
  • TIM_TS_ITR3: Internal trigger 3 selected
  • TIM_TS_NONE: No trigger is needed
CommutationSourcethe Commutation Event source This parameter can be one of the following values:
  • TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
  • TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
Return values
HALstatus

Definition at line 1470 of file stm32l4xx_hal_tim_ex.c.

1472 {
1473  /* Check the parameters */
1474  assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
1475  assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
1476 
1477  __HAL_LOCK(htim);
1478 
1479  if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
1480  (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
1481  {
1482  /* Select the Input trigger */
1483  htim->Instance->SMCR &= ~TIM_SMCR_TS;
1484  htim->Instance->SMCR |= InputTrigger;
1485  }
1486 
1487  /* Select the Capture Compare preload feature */
1488  htim->Instance->CR2 |= TIM_CR2_CCPC;
1489  /* Select the Commutation event source */
1490  htim->Instance->CR2 &= ~TIM_CR2_CCUS;
1491  htim->Instance->CR2 |= CommutationSource;
1492 
1493  /* Disable Commutation Interrupt */
1494  __HAL_TIM_DISABLE_IT(htim, TIM_IT_COM);
1495 
1496  /* Disable Commutation DMA request */
1497  __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_COM);
1498 
1499  __HAL_UNLOCK(htim);
1500 
1501  return HAL_OK;
1502 }
__HAL_UNLOCK(hrtc)
__HAL_LOCK(hrtc)
return HAL_OK
assert_param(IS_RTC_WAKEUP_CLOCK(WakeUpClock))

◆ HAL_TIMEx_ConfigCommutEvent_DMA()

HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA ( TIM_HandleTypeDef htim,
uint32_t  InputTrigger,
uint32_t  CommutationSource 
)

Configure the TIM commutation event sequence with DMA.

Note
This function is mandatory to use the commutation event in order to update the configuration at each commutation detection on the TRGI input of the Timer, the typical use of this feature is with the use of another Timer(interface Timer) configured in Hall sensor interface, this interface Timer will generate the commutation at its TRGO output (connected to Timer used in this function) each time the TI1 of the Interface Timer detect a commutation at its input TI1.
The user should configure the DMA in his own software, in This function only the COMDE bit is set
Parameters
htimTIM handle
InputTriggerthe Internal trigger corresponding to the Timer Interfacing with the Hall sensor This parameter can be one of the following values:
  • TIM_TS_ITR0: Internal trigger 0 selected
  • TIM_TS_ITR1: Internal trigger 1 selected
  • TIM_TS_ITR2: Internal trigger 2 selected
  • TIM_TS_ITR3: Internal trigger 3 selected
  • TIM_TS_NONE: No trigger is needed
CommutationSourcethe Commutation Event source This parameter can be one of the following values:
  • TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
  • TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
Return values
HALstatus

Definition at line 1583 of file stm32l4xx_hal_tim_ex.c.

1585 {
1586  /* Check the parameters */
1587  assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
1588  assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
1589 
1590  __HAL_LOCK(htim);
1591 
1592  if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
1593  (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
1594  {
1595  /* Select the Input trigger */
1596  htim->Instance->SMCR &= ~TIM_SMCR_TS;
1597  htim->Instance->SMCR |= InputTrigger;
1598  }
1599 
1600  /* Select the Capture Compare preload feature */
1601  htim->Instance->CR2 |= TIM_CR2_CCPC;
1602  /* Select the Commutation event source */
1603  htim->Instance->CR2 &= ~TIM_CR2_CCUS;
1604  htim->Instance->CR2 |= CommutationSource;
1605 
1606  /* Enable the Commutation DMA Request */
1607  /* Set the DMA Commutation Callback */
1608  htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt;
1609  htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt;
1610  /* Set the DMA error callback */
1611  htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError;
1612 
1613  /* Disable Commutation Interrupt */
1614  __HAL_TIM_DISABLE_IT(htim, TIM_IT_COM);
1615 
1616  /* Enable the Commutation DMA Request */
1617  __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_COM);
1618 
1619  __HAL_UNLOCK(htim);
1620 
1621  return HAL_OK;
1622 }
void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma)
TIM DMA Commutation half complete callback.
__HAL_UNLOCK(hrtc)
__HAL_LOCK(hrtc)
void TIM_DMAError(DMA_HandleTypeDef *hdma)
TIM DMA error callback.
return HAL_OK
void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma)
TIM DMA Commutation callback.
assert_param(IS_RTC_WAKEUP_CLOCK(WakeUpClock))

◆ HAL_TIMEx_ConfigCommutEvent_IT()

HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT ( TIM_HandleTypeDef htim,
uint32_t  InputTrigger,
uint32_t  CommutationSource 
)

Configure the TIM commutation event sequence with interrupt.

Note
This function is mandatory to use the commutation event in order to update the configuration at each commutation detection on the TRGI input of the Timer, the typical use of this feature is with the use of another Timer(interface Timer) configured in Hall sensor interface, this interface Timer will generate the commutation at its TRGO output (connected to Timer used in this function) each time the TI1 of the Interface Timer detect a commutation at its input TI1.
Parameters
htimTIM handle
InputTriggerthe Internal trigger corresponding to the Timer Interfacing with the Hall sensor This parameter can be one of the following values:
  • TIM_TS_ITR0: Internal trigger 0 selected
  • TIM_TS_ITR1: Internal trigger 1 selected
  • TIM_TS_ITR2: Internal trigger 2 selected
  • TIM_TS_ITR3: Internal trigger 3 selected
  • TIM_TS_NONE: No trigger is needed
CommutationSourcethe Commutation Event source This parameter can be one of the following values:
  • TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
  • TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
Return values
HALstatus

Definition at line 1526 of file stm32l4xx_hal_tim_ex.c.

1528 {
1529  /* Check the parameters */
1530  assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
1531  assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
1532 
1533  __HAL_LOCK(htim);
1534 
1535  if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
1536  (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
1537  {
1538  /* Select the Input trigger */
1539  htim->Instance->SMCR &= ~TIM_SMCR_TS;
1540  htim->Instance->SMCR |= InputTrigger;
1541  }
1542 
1543  /* Select the Capture Compare preload feature */
1544  htim->Instance->CR2 |= TIM_CR2_CCPC;
1545  /* Select the Commutation event source */
1546  htim->Instance->CR2 &= ~TIM_CR2_CCUS;
1547  htim->Instance->CR2 |= CommutationSource;
1548 
1549  /* Disable Commutation DMA request */
1550  __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_COM);
1551 
1552  /* Enable the Commutation Interrupt */
1553  __HAL_TIM_ENABLE_IT(htim, TIM_IT_COM);
1554 
1555  __HAL_UNLOCK(htim);
1556 
1557  return HAL_OK;
1558 }
__HAL_UNLOCK(hrtc)
__HAL_LOCK(hrtc)
return HAL_OK
assert_param(IS_RTC_WAKEUP_CLOCK(WakeUpClock))

◆ HAL_TIMEx_GroupChannel5()

HAL_StatusTypeDef HAL_TIMEx_GroupChannel5 ( TIM_HandleTypeDef htim,
uint32_t  Channels 
)

Group channel 5 and channel 1, 2 or 3.

Parameters
htimTIM handle.
Channelsspecifies the reference signal(s) the OC5REF is combined with. This parameter can be any combination of the following values: TIM_GROUPCH5_NONE: No effect of OC5REF on OC1REFC, OC2REFC and OC3REFC TIM_GROUPCH5_OC1REFC: OC1REFC is the logical AND of OC1REFC and OC5REF TIM_GROUPCH5_OC2REFC: OC2REFC is the logical AND of OC2REFC and OC5REF TIM_GROUPCH5_OC3REFC: OC3REFC is the logical AND of OC3REFC and OC5REF
Return values
HALstatus

Definition at line 2152 of file stm32l4xx_hal_tim_ex.c.

2153 {
2154  /* Check parameters */
2155  assert_param(IS_TIM_COMBINED3PHASEPWM_INSTANCE(htim->Instance));
2156  assert_param(IS_TIM_GROUPCH5(Channels));
2157 
2158  /* Process Locked */
2159  __HAL_LOCK(htim);
2160 
2161  htim->State = HAL_TIM_STATE_BUSY;
2162 
2163  /* Clear GC5Cx bit fields */
2164  htim->Instance->CCR5 &= ~(TIM_CCR5_GC5C3 | TIM_CCR5_GC5C2 | TIM_CCR5_GC5C1);
2165 
2166  /* Set GC5Cx bit fields */
2167  htim->Instance->CCR5 |= Channels;
2168 
2169  /* Change the htim state */
2170  htim->State = HAL_TIM_STATE_READY;
2171 
2172  __HAL_UNLOCK(htim);
2173 
2174  return HAL_OK;
2175 }
__HAL_UNLOCK(hrtc)
__HAL_LOCK(hrtc)
return HAL_OK
assert_param(IS_RTC_WAKEUP_CLOCK(WakeUpClock))

◆ HAL_TIMEx_MasterConfigSynchronization()

HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization ( TIM_HandleTypeDef htim,
TIM_MasterConfigTypeDef sMasterConfig 
)

Configures the TIM in master mode.

Parameters
htimTIM handle.
sMasterConfigpointer to a TIM_MasterConfigTypeDef structure that contains the selected trigger output (TRGO) and the Master/Slave mode.
Return values
HALstatus

Definition at line 1632 of file stm32l4xx_hal_tim_ex.c.

1634 {
1635  uint32_t tmpcr2;
1636  uint32_t tmpsmcr;
1637 
1638  /* Check the parameters */
1639  assert_param(IS_TIM_SYNCHRO_INSTANCE(htim->Instance));
1640  assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
1641  assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
1642 
1643  /* Check input state */
1644  __HAL_LOCK(htim);
1645 
1646  /* Change the handler state */
1647  htim->State = HAL_TIM_STATE_BUSY;
1648 
1649  /* Get the TIMx CR2 register value */
1650  tmpcr2 = htim->Instance->CR2;
1651 
1652  /* Get the TIMx SMCR register value */
1653  tmpsmcr = htim->Instance->SMCR;
1654 
1655  /* If the timer supports ADC synchronization through TRGO2, set the master mode selection 2 */
1656  if (IS_TIM_TRGO2_INSTANCE(htim->Instance))
1657  {
1658  /* Check the parameters */
1659  assert_param(IS_TIM_TRGO2_SOURCE(sMasterConfig->MasterOutputTrigger2));
1660 
1661  /* Clear the MMS2 bits */
1662  tmpcr2 &= ~TIM_CR2_MMS2;
1663  /* Select the TRGO2 source*/
1664  tmpcr2 |= sMasterConfig->MasterOutputTrigger2;
1665  }
1666 
1667  /* Reset the MMS Bits */
1668  tmpcr2 &= ~TIM_CR2_MMS;
1669  /* Select the TRGO source */
1670  tmpcr2 |= sMasterConfig->MasterOutputTrigger;
1671 
1672  /* Reset the MSM Bit */
1673  tmpsmcr &= ~TIM_SMCR_MSM;
1674  /* Set master mode */
1675  tmpsmcr |= sMasterConfig->MasterSlaveMode;
1676 
1677  /* Update TIMx CR2 */
1678  htim->Instance->CR2 = tmpcr2;
1679 
1680  /* Update TIMx SMCR */
1681  htim->Instance->SMCR = tmpsmcr;
1682 
1683  /* Change the htim state */
1684  htim->State = HAL_TIM_STATE_READY;
1685 
1686  __HAL_UNLOCK(htim);
1687 
1688  return HAL_OK;
1689 }
__HAL_UNLOCK(hrtc)
__HAL_LOCK(hrtc)
return HAL_OK
assert_param(IS_RTC_WAKEUP_CLOCK(WakeUpClock))

◆ HAL_TIMEx_RemapConfig()

HAL_StatusTypeDef HAL_TIMEx_RemapConfig ( TIM_HandleTypeDef htim,
uint32_t  Remap 
)

Configures the TIMx Remapping input capabilities.

Parameters
htimTIM handle.
Remapspecifies the TIM remapping source.
Return values
HALstatus

Definition at line 2107 of file stm32l4xx_hal_tim_ex.c.

2108 {
2109  uint32_t tmpor1 = 0U;
2110  uint32_t tmpor2 = 0U;
2111 
2112  __HAL_LOCK(htim);
2113 
2114  /* Check parameters */
2115  assert_param(IS_TIM_REMAP_INSTANCE(htim->Instance));
2116  assert_param(IS_TIM_REMAP(Remap));
2117 
2118  /* Set ETR_SEL bit field (if required) */
2119  if (IS_TIM_ETRSEL_INSTANCE(htim->Instance))
2120  {
2121  tmpor2 = htim->Instance->OR2;
2122  tmpor2 &= ~TIM1_OR2_ETRSEL_Msk;
2123  tmpor2 |= (Remap & TIM1_OR2_ETRSEL_Msk);
2124 
2125  /* Set TIMx_OR2 */
2126  htim->Instance->OR2 = tmpor2;
2127  }
2128 
2129  /* Set other remapping capabilities */
2130  tmpor1 = Remap;
2131  tmpor1 &= ~TIM1_OR2_ETRSEL_Msk;
2132 
2133  /* Set TIMx_OR1 */
2134  htim->Instance->OR1 = tmpor1;
2135 
2136  __HAL_UNLOCK(htim);
2137 
2138  return HAL_OK;
2139 }
__HAL_UNLOCK(hrtc)
__HAL_LOCK(hrtc)
return HAL_OK
assert_param(IS_RTC_WAKEUP_CLOCK(WakeUpClock))