Input and Output operation functions

QSPI Transmit/Receive functions. More...

Functions
void	HAL_QSPI_IRQHandler (QSPI_HandleTypeDef *hqspi)
	Handle QSPI interrupt request. More...
HAL_StatusTypeDef	HAL_QSPI_Command (QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, uint32_t Timeout)
	Set the command configuration. More...
HAL_StatusTypeDef	HAL_QSPI_Transmit (QSPI_HandleTypeDef *hqspi, uint8_t *pData, uint32_t Timeout)
	Transmit an amount of data in blocking mode. More...
HAL_StatusTypeDef	HAL_QSPI_Receive (QSPI_HandleTypeDef *hqspi, uint8_t *pData, uint32_t Timeout)
	Receive an amount of data in blocking mode. More...
HAL_StatusTypeDef	HAL_QSPI_Command_IT (QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd)
	Set the command configuration in interrupt mode. More...
HAL_StatusTypeDef	HAL_QSPI_Transmit_IT (QSPI_HandleTypeDef *hqspi, uint8_t *pData)
	Send an amount of data in non-blocking mode with interrupt. More...
HAL_StatusTypeDef	HAL_QSPI_Receive_IT (QSPI_HandleTypeDef *hqspi, uint8_t *pData)
	Receive an amount of data in non-blocking mode with interrupt. More...
HAL_StatusTypeDef	HAL_QSPI_Transmit_DMA (QSPI_HandleTypeDef *hqspi, uint8_t *pData)
	Send an amount of data in non-blocking mode with DMA. More...
HAL_StatusTypeDef	HAL_QSPI_Receive_DMA (QSPI_HandleTypeDef *hqspi, uint8_t *pData)
	Receive an amount of data in non-blocking mode with DMA. More...
HAL_StatusTypeDef	HAL_QSPI_AutoPolling (QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI_AutoPollingTypeDef *cfg, uint32_t Timeout)
	Configure the QSPI Automatic Polling Mode in blocking mode. More...
HAL_StatusTypeDef	HAL_QSPI_AutoPolling_IT (QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI_AutoPollingTypeDef *cfg)
	Configure the QSPI Automatic Polling Mode in non-blocking mode. More...
HAL_StatusTypeDef	HAL_QSPI_MemoryMapped (QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI_MemoryMappedTypeDef *cfg)
	Configure the Memory Mapped mode. More...
void	HAL_QSPI_ErrorCallback (QSPI_HandleTypeDef *hqspi)
	Transfer Error callback. More...
void	HAL_QSPI_AbortCpltCallback (QSPI_HandleTypeDef *hqspi)
	Abort completed callback. More...
void	HAL_QSPI_FifoThresholdCallback (QSPI_HandleTypeDef *hqspi)
	FIFO Threshold callback. More...
void	HAL_QSPI_CmdCpltCallback (QSPI_HandleTypeDef *hqspi)
	Command completed callback. More...
void	HAL_QSPI_RxCpltCallback (QSPI_HandleTypeDef *hqspi)
	Rx Transfer completed callback. More...
void	HAL_QSPI_TxCpltCallback (QSPI_HandleTypeDef *hqspi)
	Tx Transfer completed callback. More...
void	HAL_QSPI_RxHalfCpltCallback (QSPI_HandleTypeDef *hqspi)
	Rx Half Transfer completed callback. More...
void	HAL_QSPI_TxHalfCpltCallback (QSPI_HandleTypeDef *hqspi)
	Tx Half Transfer completed callback. More...
void	HAL_QSPI_StatusMatchCallback (QSPI_HandleTypeDef *hqspi)
	Status Match callback. More...
void	HAL_QSPI_TimeOutCallback (QSPI_HandleTypeDef *hqspi)
	Timeout callback. More...
HAL_StatusTypeDef	HAL_QSPI_RegisterCallback (QSPI_HandleTypeDef *hqspi, HAL_QSPI_CallbackIDTypeDef CallbackId, pQSPI_CallbackTypeDef pCallback)
	Register a User QSPI Callback To be used instead of the weak (surcharged) predefined callback. More...
HAL_StatusTypeDef	HAL_QSPI_UnRegisterCallback (QSPI_HandleTypeDef *hqspi, HAL_QSPI_CallbackIDTypeDef CallbackId)
	Unregister a User QSPI Callback QSPI Callback is redirected to the weak (surcharged) predefined callback. More...

Detailed Description

QSPI Transmit/Receive functions.

 ===============================================================================
                      ##### IO operation functions #####
 ===============================================================================
    [..]
    This subsection provides a set of functions allowing to :
      (+) Handle the interrupts.
      (+) Handle the command sequence.
      (+) Transmit data in blocking, interrupt or DMA mode.
      (+) Receive data in blocking, interrupt or DMA mode.
      (+) Manage the auto-polling functional mode.
      (+) Manage the memory-mapped functional mode.

Function Documentation

HAL_QSPI_AbortCpltCallback()

__weak void HAL_QSPI_AbortCpltCallback

(

QSPI_HandleTypeDef *

hqspi

)

Abort completed callback.

Parameters

hqspi

: QSPI handle

Return values

None

Definition at line 1886 of file stm32l4xx_hal_qspi.c.

{
  /* Prevent unused argument(s) compilation warning */
  UNUSED(hqspi);

  /* NOTE: This function should not be modified, when the callback is needed,
           the HAL_QSPI_AbortCpltCallback could be implemented in the user file
   */
}

HAL_QSPI_AutoPolling()

HAL_StatusTypeDef HAL_QSPI_AutoPolling	(	QSPI_HandleTypeDef *	hqspi,
		QSPI_CommandTypeDef *	cmd,
		QSPI_AutoPollingTypeDef *	cfg,
		uint32_t	Timeout
	)

Configure the QSPI Automatic Polling Mode in blocking mode.

Parameters

hqspi	: QSPI handle
cmd	: structure that contains the command configuration information.
cfg	: structure that contains the polling configuration information.
Timeout	: Timeout duration

Note

This function is used only in Automatic Polling Mode

Return values

HAL

status

Definition at line 1581 of file stm32l4xx_hal_qspi.c.

{
  HAL_StatusTypeDef status;
  uint32_t tickstart = HAL_GetTick();

  /* Check the parameters */
  assert_param(IS_QSPI_INSTRUCTION_MODE(cmd->InstructionMode));
  if (cmd->InstructionMode != QSPI_INSTRUCTION_NONE)
  {
    assert_param(IS_QSPI_INSTRUCTION(cmd->Instruction));
  }

  assert_param(IS_QSPI_ADDRESS_MODE(cmd->AddressMode));
  if (cmd->AddressMode != QSPI_ADDRESS_NONE)
  {
    assert_param(IS_QSPI_ADDRESS_SIZE(cmd->AddressSize));
  }

  assert_param(IS_QSPI_ALTERNATE_BYTES_MODE(cmd->AlternateByteMode));
  if (cmd->AlternateByteMode != QSPI_ALTERNATE_BYTES_NONE)
  {
    assert_param(IS_QSPI_ALTERNATE_BYTES_SIZE(cmd->AlternateBytesSize));
  }

  assert_param(IS_QSPI_DUMMY_CYCLES(cmd->DummyCycles));
  assert_param(IS_QSPI_DATA_MODE(cmd->DataMode));

  assert_param(IS_QSPI_DDR_MODE(cmd->DdrMode));
  assert_param(IS_QSPI_DDR_HHC(cmd->DdrHoldHalfCycle));
  assert_param(IS_QSPI_SIOO_MODE(cmd->SIOOMode));

  assert_param(IS_QSPI_INTERVAL(cfg->Interval));
  assert_param(IS_QSPI_STATUS_BYTES_SIZE(cfg->StatusBytesSize));
  assert_param(IS_QSPI_MATCH_MODE(cfg->MatchMode));

  /* Process locked */
  __HAL_LOCK(hqspi);

  if(hqspi->State == HAL_QSPI_STATE_READY)
  {
    hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;

    /* Update state */
    hqspi->State = HAL_QSPI_STATE_BUSY_AUTO_POLLING;

    /* Wait till BUSY flag reset */
    status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, tickstart, Timeout);

    if (status == HAL_OK)
    {
      /* Configure QSPI: PSMAR register with the status match value */
      WRITE_REG(hqspi->Instance->PSMAR, cfg->Match);

      /* Configure QSPI: PSMKR register with the status mask value */
      WRITE_REG(hqspi->Instance->PSMKR, cfg->Mask);

      /* Configure QSPI: PIR register with the interval value */
      WRITE_REG(hqspi->Instance->PIR, cfg->Interval);

      /* Configure QSPI: CR register with Match mode and Automatic stop enabled
      (otherwise there will be an infinite loop in blocking mode) */
      MODIFY_REG(hqspi->Instance->CR, (QUADSPI_CR_PMM | QUADSPI_CR_APMS),
               (cfg->MatchMode | QSPI_AUTOMATIC_STOP_ENABLE));

      /* Call the configuration function */
      cmd->NbData = cfg->StatusBytesSize;
      QSPI_Config(hqspi, cmd, QSPI_FUNCTIONAL_MODE_AUTO_POLLING);

      /* Wait until SM flag is set to go back in idle state */
      status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_SM, SET, tickstart, Timeout);

      if (status == HAL_OK)
      {
        __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_SM);

        /* Update state */
        hqspi->State = HAL_QSPI_STATE_READY;
      }
    }
  }
  else
  {
    status = HAL_BUSY;
  }

  /* Process unlocked */
  __HAL_UNLOCK(hqspi);

  /* Return function status */
  return status;
}

HAL_QSPI_AutoPolling_IT()

HAL_StatusTypeDef HAL_QSPI_AutoPolling_IT	(	QSPI_HandleTypeDef *	hqspi,
		QSPI_CommandTypeDef *	cmd,
		QSPI_AutoPollingTypeDef *	cfg
	)

Configure the QSPI Automatic Polling Mode in non-blocking mode.

Parameters

hqspi	: QSPI handle
cmd	: structure that contains the command configuration information.
cfg	: structure that contains the polling configuration information.

Note

This function is used only in Automatic Polling Mode

Return values

HAL

status

Definition at line 1681 of file stm32l4xx_hal_qspi.c.

{
  HAL_StatusTypeDef status;
  uint32_t tickstart = HAL_GetTick();

  /* Check the parameters */
  assert_param(IS_QSPI_INSTRUCTION_MODE(cmd->InstructionMode));
  if (cmd->InstructionMode != QSPI_INSTRUCTION_NONE)
  {
    assert_param(IS_QSPI_INSTRUCTION(cmd->Instruction));
  }

  assert_param(IS_QSPI_ADDRESS_MODE(cmd->AddressMode));
  if (cmd->AddressMode != QSPI_ADDRESS_NONE)
  {
    assert_param(IS_QSPI_ADDRESS_SIZE(cmd->AddressSize));
  }

  assert_param(IS_QSPI_ALTERNATE_BYTES_MODE(cmd->AlternateByteMode));
  if (cmd->AlternateByteMode != QSPI_ALTERNATE_BYTES_NONE)
  {
    assert_param(IS_QSPI_ALTERNATE_BYTES_SIZE(cmd->AlternateBytesSize));
  }

  assert_param(IS_QSPI_DUMMY_CYCLES(cmd->DummyCycles));
  assert_param(IS_QSPI_DATA_MODE(cmd->DataMode));

  assert_param(IS_QSPI_DDR_MODE(cmd->DdrMode));
  assert_param(IS_QSPI_DDR_HHC(cmd->DdrHoldHalfCycle));
  assert_param(IS_QSPI_SIOO_MODE(cmd->SIOOMode));

  assert_param(IS_QSPI_INTERVAL(cfg->Interval));
  assert_param(IS_QSPI_STATUS_BYTES_SIZE(cfg->StatusBytesSize));
  assert_param(IS_QSPI_MATCH_MODE(cfg->MatchMode));
  assert_param(IS_QSPI_AUTOMATIC_STOP(cfg->AutomaticStop));

  /* Process locked */
  __HAL_LOCK(hqspi);

  if(hqspi->State == HAL_QSPI_STATE_READY)
  {
    hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;

    /* Update state */
    hqspi->State = HAL_QSPI_STATE_BUSY_AUTO_POLLING;

    /* Wait till BUSY flag reset */
    status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, tickstart, hqspi->Timeout);

    if (status == HAL_OK)
    {
      /* Configure QSPI: PSMAR register with the status match value */
      WRITE_REG(hqspi->Instance->PSMAR, cfg->Match);

      /* Configure QSPI: PSMKR register with the status mask value */
      WRITE_REG(hqspi->Instance->PSMKR, cfg->Mask);

      /* Configure QSPI: PIR register with the interval value */
      WRITE_REG(hqspi->Instance->PIR, cfg->Interval);

      /* Configure QSPI: CR register with Match mode and Automatic stop mode */
      MODIFY_REG(hqspi->Instance->CR, (QUADSPI_CR_PMM | QUADSPI_CR_APMS),
               (cfg->MatchMode | cfg->AutomaticStop));

      /* Clear interrupt */
      __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TE | QSPI_FLAG_SM);

      /* Call the configuration function */
      cmd->NbData = cfg->StatusBytesSize;
      QSPI_Config(hqspi, cmd, QSPI_FUNCTIONAL_MODE_AUTO_POLLING);

      /* Process unlocked */
      __HAL_UNLOCK(hqspi);

      /* Enable the QSPI Transfer Error and status match Interrupt */
      __HAL_QSPI_ENABLE_IT(hqspi, (QSPI_IT_SM | QSPI_IT_TE));

    }
    else
    {
      /* Process unlocked */
      __HAL_UNLOCK(hqspi);
    }
  }
  else
  {
    status = HAL_BUSY;

    /* Process unlocked */
    __HAL_UNLOCK(hqspi);
  }

  /* Return function status */
  return status;
}

HAL_QSPI_CmdCpltCallback()

__weak void HAL_QSPI_CmdCpltCallback

(

QSPI_HandleTypeDef *

hqspi

)

Command completed callback.

Parameters

hqspi

: QSPI handle

Return values

None

Definition at line 1901 of file stm32l4xx_hal_qspi.c.

{
  /* Prevent unused argument(s) compilation warning */
  UNUSED(hqspi);

  /* NOTE: This function should not be modified, when the callback is needed,
           the HAL_QSPI_CmdCpltCallback could be implemented in the user file
   */
}

HAL_QSPI_Command()

HAL_StatusTypeDef HAL_QSPI_Command	(	QSPI_HandleTypeDef *	hqspi,
		QSPI_CommandTypeDef *	cmd,
		uint32_t	Timeout
	)

Set the command configuration.

Parameters

hqspi	: QSPI handle
cmd	: structure that contains the command configuration information
Timeout	: Timeout duration

Note

This function is used only in Indirect Read or Write Modes

Return values

HAL

status

Definition at line 798 of file stm32l4xx_hal_qspi.c.

{
  HAL_StatusTypeDef status;
  uint32_t tickstart = HAL_GetTick();

  /* Check the parameters */
  assert_param(IS_QSPI_INSTRUCTION_MODE(cmd->InstructionMode));
  if (cmd->InstructionMode != QSPI_INSTRUCTION_NONE)
  {
    assert_param(IS_QSPI_INSTRUCTION(cmd->Instruction));
  }

  assert_param(IS_QSPI_ADDRESS_MODE(cmd->AddressMode));
  if (cmd->AddressMode != QSPI_ADDRESS_NONE)
  {
    assert_param(IS_QSPI_ADDRESS_SIZE(cmd->AddressSize));
  }

  assert_param(IS_QSPI_ALTERNATE_BYTES_MODE(cmd->AlternateByteMode));
  if (cmd->AlternateByteMode != QSPI_ALTERNATE_BYTES_NONE)
  {
    assert_param(IS_QSPI_ALTERNATE_BYTES_SIZE(cmd->AlternateBytesSize));
  }

  assert_param(IS_QSPI_DUMMY_CYCLES(cmd->DummyCycles));
  assert_param(IS_QSPI_DATA_MODE(cmd->DataMode));

  assert_param(IS_QSPI_DDR_MODE(cmd->DdrMode));
  assert_param(IS_QSPI_DDR_HHC(cmd->DdrHoldHalfCycle));
  assert_param(IS_QSPI_SIOO_MODE(cmd->SIOOMode));

  /* Process locked */
  __HAL_LOCK(hqspi);

  if(hqspi->State == HAL_QSPI_STATE_READY)
  {
    hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;

    /* Update QSPI state */
    hqspi->State = HAL_QSPI_STATE_BUSY;

    /* Wait till BUSY flag reset */
    status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, tickstart, Timeout);

    if (status == HAL_OK)
    {
      /* Call the configuration function */
      QSPI_Config(hqspi, cmd, QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE);

      if (cmd->DataMode == QSPI_DATA_NONE)
      {
        /* When there is no data phase, the transfer start as soon as the configuration is done
        so wait until TC flag is set to go back in idle state */
        status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_TC, SET, tickstart, Timeout);

        if (status == HAL_OK)
        {
          __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC);

          /* Update QSPI state */
          hqspi->State = HAL_QSPI_STATE_READY;
        }
      }
      else
      {
        /* Update QSPI state */
        hqspi->State = HAL_QSPI_STATE_READY;
      }
    }
  }
  else
  {
    status = HAL_BUSY;
  }

  /* Process unlocked */
  __HAL_UNLOCK(hqspi);

  /* Return function status */
  return status;
}

HAL_QSPI_Command_IT()

HAL_StatusTypeDef HAL_QSPI_Command_IT	(	QSPI_HandleTypeDef *	hqspi,
		QSPI_CommandTypeDef *	cmd
	)

Set the command configuration in interrupt mode.

Parameters

hqspi	: QSPI handle
cmd	: structure that contains the command configuration information

Note

This function is used only in Indirect Read or Write Modes

Return values

HAL

status

Definition at line 887 of file stm32l4xx_hal_qspi.c.

{
  HAL_StatusTypeDef status;
  uint32_t tickstart = HAL_GetTick();

  /* Check the parameters */
  assert_param(IS_QSPI_INSTRUCTION_MODE(cmd->InstructionMode));
  if (cmd->InstructionMode != QSPI_INSTRUCTION_NONE)
  {
    assert_param(IS_QSPI_INSTRUCTION(cmd->Instruction));
  }

  assert_param(IS_QSPI_ADDRESS_MODE(cmd->AddressMode));
  if (cmd->AddressMode != QSPI_ADDRESS_NONE)
  {
    assert_param(IS_QSPI_ADDRESS_SIZE(cmd->AddressSize));
  }

  assert_param(IS_QSPI_ALTERNATE_BYTES_MODE(cmd->AlternateByteMode));
  if (cmd->AlternateByteMode != QSPI_ALTERNATE_BYTES_NONE)
  {
    assert_param(IS_QSPI_ALTERNATE_BYTES_SIZE(cmd->AlternateBytesSize));
  }

  assert_param(IS_QSPI_DUMMY_CYCLES(cmd->DummyCycles));
  assert_param(IS_QSPI_DATA_MODE(cmd->DataMode));

  assert_param(IS_QSPI_DDR_MODE(cmd->DdrMode));
  assert_param(IS_QSPI_DDR_HHC(cmd->DdrHoldHalfCycle));
  assert_param(IS_QSPI_SIOO_MODE(cmd->SIOOMode));

  /* Process locked */
  __HAL_LOCK(hqspi);

  if(hqspi->State == HAL_QSPI_STATE_READY)
  {
    hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;

    /* Update QSPI state */
    hqspi->State = HAL_QSPI_STATE_BUSY;

    /* Wait till BUSY flag reset */
    status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, tickstart, hqspi->Timeout);

    if (status == HAL_OK)
    {
      if (cmd->DataMode == QSPI_DATA_NONE)
      {
        /* Clear interrupt */
        __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TE | QSPI_FLAG_TC);
      }

      /* Call the configuration function */
      QSPI_Config(hqspi, cmd, QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE);

      if (cmd->DataMode == QSPI_DATA_NONE)
      {
        /* When there is no data phase, the transfer start as soon as the configuration is done
        so activate TC and TE interrupts */
        /* Process unlocked */
        __HAL_UNLOCK(hqspi);

        /* Enable the QSPI Transfer Error Interrupt */
        __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TE | QSPI_IT_TC);
      }
      else
      {
        /* Update QSPI state */
        hqspi->State = HAL_QSPI_STATE_READY;

        /* Process unlocked */
        __HAL_UNLOCK(hqspi);
      }
    }
    else
    {
      /* Process unlocked */
      __HAL_UNLOCK(hqspi);
    }
  }
  else
  {
    status = HAL_BUSY;

    /* Process unlocked */
    __HAL_UNLOCK(hqspi);
  }

  /* Return function status */
  return status;
}

HAL_QSPI_ErrorCallback()

__weak void HAL_QSPI_ErrorCallback

(

QSPI_HandleTypeDef *

hqspi

)

Transfer Error callback.

Parameters

hqspi

: QSPI handle

Return values

None

Definition at line 1871 of file stm32l4xx_hal_qspi.c.

{
  /* Prevent unused argument(s) compilation warning */
  UNUSED(hqspi);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_QSPI_ErrorCallback could be implemented in the user file
   */
}

HAL_QSPI_FifoThresholdCallback()

__weak void HAL_QSPI_FifoThresholdCallback

(

QSPI_HandleTypeDef *

hqspi

)

FIFO Threshold callback.

Parameters

hqspi

: QSPI handle

Return values

None

Definition at line 1976 of file stm32l4xx_hal_qspi.c.

{
  /* Prevent unused argument(s) compilation warning */
  UNUSED(hqspi);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_QSPI_FIFOThresholdCallback could be implemented in the user file
   */
}

HAL_QSPI_IRQHandler()

void HAL_QSPI_IRQHandler

(

QSPI_HandleTypeDef *

hqspi

)

Handle QSPI interrupt request.

Parameters

hqspi

: QSPI handle

Return values

None

Definition at line 501 of file stm32l4xx_hal_qspi.c.

{
  __IO uint32_t *data_reg;
  uint32_t flag = READ_REG(hqspi->Instance->SR);
  uint32_t itsource = READ_REG(hqspi->Instance->CR);

  /* QSPI Fifo Threshold interrupt occurred ----------------------------------*/
  if(((flag & QSPI_FLAG_FT) != 0U) && ((itsource & QSPI_IT_FT) != 0U))
  {
    data_reg = &hqspi->Instance->DR;

    if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_TX)
    {
      /* Transmission process */
      while(__HAL_QSPI_GET_FLAG(hqspi, QSPI_FLAG_FT) != RESET)
      {
        if (hqspi->TxXferCount > 0U)
        {
          /* Fill the FIFO until the threshold is reached */
          *((__IO uint8_t *)data_reg) = *hqspi->pTxBuffPtr;
          hqspi->pTxBuffPtr++;
          hqspi->TxXferCount--;
        }
        else
        {
          /* No more data available for the transfer */
          /* Disable the QSPI FIFO Threshold Interrupt */
          __HAL_QSPI_DISABLE_IT(hqspi, QSPI_IT_FT);
          break;
        }
      }
    }
    else if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_RX)
    {
      /* Receiving Process */
      while(__HAL_QSPI_GET_FLAG(hqspi, QSPI_FLAG_FT) != RESET)
      {
        if (hqspi->RxXferCount > 0U)
        {
          /* Read the FIFO until the threshold is reached */
          *hqspi->pRxBuffPtr = *((__IO uint8_t *)data_reg);
          hqspi->pRxBuffPtr++;
          hqspi->RxXferCount--;
        }
        else
        {
          /* All data have been received for the transfer */
          /* Disable the QSPI FIFO Threshold Interrupt */
          __HAL_QSPI_DISABLE_IT(hqspi, QSPI_IT_FT);
          break;
        }
      }
    }
    else
    {
      /* Nothing to do */
    }

    /* FIFO Threshold callback */
#if (USE_HAL_QSPI_REGISTER_CALLBACKS == 1)
    hqspi->FifoThresholdCallback(hqspi);
#else
    HAL_QSPI_FifoThresholdCallback(hqspi);
#endif
  }

  /* QSPI Transfer Complete interrupt occurred -------------------------------*/
  else if(((flag & QSPI_FLAG_TC) != 0U) && ((itsource & QSPI_IT_TC) != 0U))
  {
    /* Clear interrupt */
    WRITE_REG(hqspi->Instance->FCR, QSPI_FLAG_TC);

    /* Disable the QSPI FIFO Threshold, Transfer Error and Transfer complete Interrupts */
    __HAL_QSPI_DISABLE_IT(hqspi, QSPI_IT_TC | QSPI_IT_TE | QSPI_IT_FT);

    /* Transfer complete callback */
    if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_TX)
    {
      if ((hqspi->Instance->CR & QUADSPI_CR_DMAEN) != 0U)
      {
        /* Disable the DMA transfer by clearing the DMAEN bit in the QSPI CR register */
        CLEAR_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN);

        /* Disable the DMA channel */
        __HAL_DMA_DISABLE(hqspi->hdma);
      }

#if  (defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx))
      /* Clear Busy bit */
      HAL_QSPI_Abort_IT(hqspi);
#endif

      /* Change state of QSPI */
      hqspi->State = HAL_QSPI_STATE_READY;

      /* TX Complete callback */
#if (USE_HAL_QSPI_REGISTER_CALLBACKS == 1)
      hqspi->TxCpltCallback(hqspi);
#else
      HAL_QSPI_TxCpltCallback(hqspi);
#endif
    }
    else if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_RX)
    {
      if ((hqspi->Instance->CR & QUADSPI_CR_DMAEN) != 0U)
      {
        /* Disable the DMA transfer by clearing the DMAEN bit in the QSPI CR register */
        CLEAR_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN);

        /* Disable the DMA channel */
        __HAL_DMA_DISABLE(hqspi->hdma);
      }
      else
      {
        data_reg = &hqspi->Instance->DR;
        while(READ_BIT(hqspi->Instance->SR, QUADSPI_SR_FLEVEL) != 0U)
        {
          if (hqspi->RxXferCount > 0U)
          {
            /* Read the last data received in the FIFO until it is empty */
            *hqspi->pRxBuffPtr = *((__IO uint8_t *)data_reg);
            hqspi->pRxBuffPtr++;
            hqspi->RxXferCount--;
          }
          else
          {
            /* All data have been received for the transfer */
            break;
          }
        }
      }

#if  (defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx))
      /* Workaround - Extra data written in the FIFO at the end of a read transfer */
      HAL_QSPI_Abort_IT(hqspi);
#endif

      /* Change state of QSPI */
      hqspi->State = HAL_QSPI_STATE_READY;

      /* RX Complete callback */
#if (USE_HAL_QSPI_REGISTER_CALLBACKS == 1)
      hqspi->RxCpltCallback(hqspi);
#else
      HAL_QSPI_RxCpltCallback(hqspi);
#endif
    }
    else if(hqspi->State == HAL_QSPI_STATE_BUSY)
    {
      /* Change state of QSPI */
      hqspi->State = HAL_QSPI_STATE_READY;

      /* Command Complete callback */
#if (USE_HAL_QSPI_REGISTER_CALLBACKS == 1)
      hqspi->CmdCpltCallback(hqspi);
#else
      HAL_QSPI_CmdCpltCallback(hqspi);
#endif
    }
    else if(hqspi->State == HAL_QSPI_STATE_ABORT)
    {
      /* Reset functional mode configuration to indirect write mode by default */
      CLEAR_BIT(hqspi->Instance->CCR, QUADSPI_CCR_FMODE);

      /* Change state of QSPI */
      hqspi->State = HAL_QSPI_STATE_READY;

      if (hqspi->ErrorCode == HAL_QSPI_ERROR_NONE)
      {
        /* Abort called by the user */

        /* Abort Complete callback */
#if (USE_HAL_QSPI_REGISTER_CALLBACKS == 1)
        hqspi->AbortCpltCallback(hqspi);
#else
        HAL_QSPI_AbortCpltCallback(hqspi);
#endif
      }
      else
      {
        /* Abort due to an error (eg :  DMA error) */

        /* Error callback */
#if (USE_HAL_QSPI_REGISTER_CALLBACKS == 1)
        hqspi->ErrorCallback(hqspi);
#else
        HAL_QSPI_ErrorCallback(hqspi);
#endif
      }
    }
    else
    {
     /* Nothing to do */
    }
  }

  /* QSPI Status Match interrupt occurred ------------------------------------*/
  else if(((flag & QSPI_FLAG_SM) != 0U) && ((itsource & QSPI_IT_SM) != 0U))
  {
    /* Clear interrupt */
    WRITE_REG(hqspi->Instance->FCR, QSPI_FLAG_SM);

    /* Check if the automatic poll mode stop is activated */
    if(READ_BIT(hqspi->Instance->CR, QUADSPI_CR_APMS) != 0U)
    {
      /* Disable the QSPI Transfer Error and Status Match Interrupts */
      __HAL_QSPI_DISABLE_IT(hqspi, (QSPI_IT_SM | QSPI_IT_TE));

      /* Change state of QSPI */
      hqspi->State = HAL_QSPI_STATE_READY;
    }

    /* Status match callback */
#if (USE_HAL_QSPI_REGISTER_CALLBACKS == 1)
    hqspi->StatusMatchCallback(hqspi);
#else
    HAL_QSPI_StatusMatchCallback(hqspi);
#endif
  }

  /* QSPI Transfer Error interrupt occurred ----------------------------------*/
  else if(((flag & QSPI_FLAG_TE) != 0U) && ((itsource & QSPI_IT_TE) != 0U))
  {
    /* Clear interrupt */
    WRITE_REG(hqspi->Instance->FCR, QSPI_FLAG_TE);

    /* Disable all the QSPI Interrupts */
    __HAL_QSPI_DISABLE_IT(hqspi, QSPI_IT_SM | QSPI_IT_TC | QSPI_IT_TE | QSPI_IT_FT);

    /* Set error code */
    hqspi->ErrorCode |= HAL_QSPI_ERROR_TRANSFER;

    if ((hqspi->Instance->CR & QUADSPI_CR_DMAEN) != 0U)
    {
      /* Disable the DMA transfer by clearing the DMAEN bit in the QSPI CR register */
      CLEAR_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN);

      /* Disable the DMA channel */
      hqspi->hdma->XferAbortCallback = QSPI_DMAAbortCplt;
      if (HAL_DMA_Abort_IT(hqspi->hdma) != HAL_OK)
      {
        /* Set error code to DMA */
        hqspi->ErrorCode |= HAL_QSPI_ERROR_DMA;

        /* Change state of QSPI */
        hqspi->State = HAL_QSPI_STATE_READY;
        
        /* Error callback */
#if (USE_HAL_QSPI_REGISTER_CALLBACKS == 1)
        hqspi->ErrorCallback(hqspi);
#else
        HAL_QSPI_ErrorCallback(hqspi);
#endif
      }
    }
    else
    {
      /* Change state of QSPI */
      hqspi->State = HAL_QSPI_STATE_READY;

      /* Error callback */
#if (USE_HAL_QSPI_REGISTER_CALLBACKS == 1)
      hqspi->ErrorCallback(hqspi);
#else
      HAL_QSPI_ErrorCallback(hqspi);
#endif
    }
  }

  /* QSPI Timeout interrupt occurred -----------------------------------------*/
  else if(((flag & QSPI_FLAG_TO) != 0U) && ((itsource & QSPI_IT_TO) != 0U))
  {
    /* Clear interrupt */
    WRITE_REG(hqspi->Instance->FCR, QSPI_FLAG_TO);

    /* Timeout callback */
#if (USE_HAL_QSPI_REGISTER_CALLBACKS == 1)
    hqspi->TimeOutCallback(hqspi);
#else
    HAL_QSPI_TimeOutCallback(hqspi);
#endif
  }

   else
  {
   /* Nothing to do */
  }
}

HAL_QSPI_MemoryMapped()

HAL_StatusTypeDef HAL_QSPI_MemoryMapped	(	QSPI_HandleTypeDef *	hqspi,
		QSPI_CommandTypeDef *	cmd,
		QSPI_MemoryMappedTypeDef *	cfg
	)

Configure the Memory Mapped mode.

Parameters

hqspi	: QSPI handle
cmd	: structure that contains the command configuration information.
cfg	: structure that contains the memory mapped configuration information.

Note

This function is used only in Memory mapped Mode

Return values

HAL

status

Definition at line 1785 of file stm32l4xx_hal_qspi.c.

{
  HAL_StatusTypeDef status;
  uint32_t tickstart = HAL_GetTick();

  /* Check the parameters */
  assert_param(IS_QSPI_INSTRUCTION_MODE(cmd->InstructionMode));
  if (cmd->InstructionMode != QSPI_INSTRUCTION_NONE)
  {
  assert_param(IS_QSPI_INSTRUCTION(cmd->Instruction));
  }

  assert_param(IS_QSPI_ADDRESS_MODE(cmd->AddressMode));
  if (cmd->AddressMode != QSPI_ADDRESS_NONE)
  {
    assert_param(IS_QSPI_ADDRESS_SIZE(cmd->AddressSize));
  }

  assert_param(IS_QSPI_ALTERNATE_BYTES_MODE(cmd->AlternateByteMode));
  if (cmd->AlternateByteMode != QSPI_ALTERNATE_BYTES_NONE)
  {
    assert_param(IS_QSPI_ALTERNATE_BYTES_SIZE(cmd->AlternateBytesSize));
  }

  assert_param(IS_QSPI_DUMMY_CYCLES(cmd->DummyCycles));
  assert_param(IS_QSPI_DATA_MODE(cmd->DataMode));

  assert_param(IS_QSPI_DDR_MODE(cmd->DdrMode));
  assert_param(IS_QSPI_DDR_HHC(cmd->DdrHoldHalfCycle));
  assert_param(IS_QSPI_SIOO_MODE(cmd->SIOOMode));

  assert_param(IS_QSPI_TIMEOUT_ACTIVATION(cfg->TimeOutActivation));

  /* Process locked */
  __HAL_LOCK(hqspi);

  if(hqspi->State == HAL_QSPI_STATE_READY)
  {
    hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;

    /* Update state */
    hqspi->State = HAL_QSPI_STATE_BUSY_MEM_MAPPED;

    /* Wait till BUSY flag reset */
    status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, tickstart, hqspi->Timeout);

    if (status == HAL_OK)
    {
      /* Configure QSPI: CR register with timeout counter enable */
    MODIFY_REG(hqspi->Instance->CR, QUADSPI_CR_TCEN, cfg->TimeOutActivation);

    if (cfg->TimeOutActivation == QSPI_TIMEOUT_COUNTER_ENABLE)
      {
        assert_param(IS_QSPI_TIMEOUT_PERIOD(cfg->TimeOutPeriod));

        /* Configure QSPI: LPTR register with the low-power timeout value */
        WRITE_REG(hqspi->Instance->LPTR, cfg->TimeOutPeriod);

        /* Clear interrupt */
        __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TO);

        /* Enable the QSPI TimeOut Interrupt */
        __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TO);
      }

      /* Call the configuration function */
      QSPI_Config(hqspi, cmd, QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED);
    }
  }
  else
  {
    status = HAL_BUSY;
  }

  /* Process unlocked */
  __HAL_UNLOCK(hqspi);

  /* Return function status */
  return status;
}

HAL_QSPI_Receive()

HAL_StatusTypeDef HAL_QSPI_Receive	(	QSPI_HandleTypeDef *	hqspi,
		uint8_t *	pData,
		uint32_t	Timeout
	)

Receive an amount of data in blocking mode.

Parameters

hqspi	: QSPI handle
pData	: pointer to data buffer
Timeout	: Timeout duration

Note

This function is used only in Indirect Read Mode

Return values

HAL

status

Definition at line 1074 of file stm32l4xx_hal_qspi.c.

{
  HAL_StatusTypeDef status = HAL_OK;
  uint32_t tickstart = HAL_GetTick();
  uint32_t addr_reg = READ_REG(hqspi->Instance->AR);
  __IO uint32_t *data_reg = &hqspi->Instance->DR;

  /* Process locked */
  __HAL_LOCK(hqspi);

  if(hqspi->State == HAL_QSPI_STATE_READY)
  {
    hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;

    if(pData != NULL )
    {
      /* Update state */
      hqspi->State = HAL_QSPI_STATE_BUSY_INDIRECT_RX;

      /* Configure counters and size of the handle */
      hqspi->RxXferCount = READ_REG(hqspi->Instance->DLR) + 1U;
      hqspi->RxXferSize = READ_REG(hqspi->Instance->DLR) + 1U;
      hqspi->pRxBuffPtr = pData;

      /* Configure QSPI: CCR register with functional as indirect read */
      MODIFY_REG(hqspi->Instance->CCR, QUADSPI_CCR_FMODE, QSPI_FUNCTIONAL_MODE_INDIRECT_READ);

      /* Start the transfer by re-writing the address in AR register */
      WRITE_REG(hqspi->Instance->AR, addr_reg);

      while(hqspi->RxXferCount > 0U)
      {
        /* Wait until FT or TC flag is set to read received data */
        status = QSPI_WaitFlagStateUntilTimeout(hqspi, (QSPI_FLAG_FT | QSPI_FLAG_TC), SET, tickstart, Timeout);

        if  (status != HAL_OK)
        {
          break;
        }

        *hqspi->pRxBuffPtr = *((__IO uint8_t *)data_reg);
        hqspi->pRxBuffPtr++;
        hqspi->RxXferCount--;
      }

      if (status == HAL_OK)
      {
        /* Wait until TC flag is set to go back in idle state */
        status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_TC, SET, tickstart, Timeout);

        if  (status == HAL_OK)
        {
          /* Clear Transfer Complete bit */
          __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC);

#if  (defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx))
          /* Workaround - Extra data written in the FIFO at the end of a read transfer */
          status = HAL_QSPI_Abort(hqspi);
#endif
        }
      }

      /* Update QSPI state */
      hqspi->State = HAL_QSPI_STATE_READY;
    }
    else
    {
      hqspi->ErrorCode |= HAL_QSPI_ERROR_INVALID_PARAM;
      status = HAL_ERROR;
    }
  }
  else
  {
    status = HAL_BUSY;
  }

  /* Process unlocked */
  __HAL_UNLOCK(hqspi);

  return status;
}

HAL_QSPI_Receive_DMA()

HAL_StatusTypeDef HAL_QSPI_Receive_DMA	(	QSPI_HandleTypeDef *	hqspi,
		uint8_t *	pData
	)

Receive an amount of data in non-blocking mode with DMA.

Parameters

hqspi	: QSPI handle
pData	: pointer to data buffer.

Note

This function is used only in Indirect Read Mode

If DMA peripheral access is configured as halfword, the number of data and the fifo threshold should be aligned on halfword

If DMA peripheral access is configured as word, the number of data and the fifo threshold should be aligned on word

Return values

HAL

status

Definition at line 1435 of file stm32l4xx_hal_qspi.c.

{
  HAL_StatusTypeDef status = HAL_OK;
  uint32_t addr_reg = READ_REG(hqspi->Instance->AR);
  uint32_t data_size = (READ_REG(hqspi->Instance->DLR) + 1U);

  /* Process locked */
  __HAL_LOCK(hqspi);

  if(hqspi->State == HAL_QSPI_STATE_READY)
  {
    /* Clear the error code */
    hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;

    if(pData != NULL )
    {
      /* Configure counters of the handle */
      if (hqspi->hdma->Init.PeriphDataAlignment == DMA_PDATAALIGN_BYTE)
      {
        hqspi->RxXferCount = data_size;
      }
      else if (hqspi->hdma->Init.PeriphDataAlignment == DMA_PDATAALIGN_HALFWORD)
      {
        if (((data_size % 2U) != 0U) || ((hqspi->Init.FifoThreshold % 2U) != 0U))
        {
          /* The number of data or the fifo threshold is not aligned on halfword
             => no transfer possible with DMA peripheral access configured as halfword */
          hqspi->ErrorCode |= HAL_QSPI_ERROR_INVALID_PARAM;
          status = HAL_ERROR;

          /* Process unlocked */
          __HAL_UNLOCK(hqspi);
        }
        else
        {
          hqspi->RxXferCount = (data_size >> 1U);
        }
      }
      else if (hqspi->hdma->Init.PeriphDataAlignment == DMA_PDATAALIGN_WORD)
      {
        if (((data_size % 4U) != 0U) || ((hqspi->Init.FifoThreshold % 4U) != 0U))
        {
          /* The number of data or the fifo threshold is not aligned on word
             => no transfer possible with DMA peripheral access configured as word */
          hqspi->ErrorCode |= HAL_QSPI_ERROR_INVALID_PARAM;
          status = HAL_ERROR;

          /* Process unlocked */
          __HAL_UNLOCK(hqspi);
        }
        else
        {
          hqspi->RxXferCount = (data_size >> 2U);
        }
      }
      else
      {
        /* Nothing to do */
      }

      if (status == HAL_OK)
      {
        /* Update state */
        hqspi->State = HAL_QSPI_STATE_BUSY_INDIRECT_RX;

        /* Clear interrupt */
        __HAL_QSPI_CLEAR_FLAG(hqspi, (QSPI_FLAG_TE | QSPI_FLAG_TC));

        /* Configure size and pointer of the handle */
        hqspi->RxXferSize = hqspi->RxXferCount;
        hqspi->pRxBuffPtr = pData;

        /* Set the QSPI DMA transfer complete callback */
        hqspi->hdma->XferCpltCallback = QSPI_DMARxCplt;

        /* Set the QSPI DMA Half transfer complete callback */
        hqspi->hdma->XferHalfCpltCallback = QSPI_DMARxHalfCplt;

        /* Set the DMA error callback */
        hqspi->hdma->XferErrorCallback = QSPI_DMAError;

        /* Clear the DMA abort callback */
        hqspi->hdma->XferAbortCallback = NULL;

        /* Configure the direction of the DMA */
        hqspi->hdma->Init.Direction = DMA_PERIPH_TO_MEMORY;
        MODIFY_REG(hqspi->hdma->Instance->CCR, DMA_CCR_DIR, hqspi->hdma->Init.Direction);

        /* Enable the DMA Channel */
        if (HAL_DMA_Start_IT(hqspi->hdma, (uint32_t)&hqspi->Instance->DR, (uint32_t)pData, hqspi->RxXferSize) == HAL_OK)
        {
          /* Configure QSPI: CCR register with functional as indirect read */
          MODIFY_REG(hqspi->Instance->CCR, QUADSPI_CCR_FMODE, QSPI_FUNCTIONAL_MODE_INDIRECT_READ);

          /* Start the transfer by re-writing the address in AR register */
          WRITE_REG(hqspi->Instance->AR, addr_reg);

          /* Process unlocked */
          __HAL_UNLOCK(hqspi);
          
          /* Enable the QSPI transfer error Interrupt */
          __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TE);
          
          /* Enable the DMA transfer by setting the DMAEN bit in the QSPI CR register */
          SET_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN);
        }
        else
        {
          status = HAL_ERROR;
          hqspi->ErrorCode |= HAL_QSPI_ERROR_DMA;
          hqspi->State = HAL_QSPI_STATE_READY;

          /* Process unlocked */
          __HAL_UNLOCK(hqspi);
        }
      }
    }
    else
    {
      hqspi->ErrorCode |= HAL_QSPI_ERROR_INVALID_PARAM;
      status = HAL_ERROR;

      /* Process unlocked */
      __HAL_UNLOCK(hqspi);
    }
  }
  else
  {
    status = HAL_BUSY;

    /* Process unlocked */
    __HAL_UNLOCK(hqspi);
  }

  return status;
}

HAL_QSPI_Receive_IT()

HAL_StatusTypeDef HAL_QSPI_Receive_IT	(	QSPI_HandleTypeDef *	hqspi,
		uint8_t *	pData
	)

Receive an amount of data in non-blocking mode with interrupt.

Parameters

hqspi	: QSPI handle
pData	: pointer to data buffer

Note

This function is used only in Indirect Read Mode

Return values

HAL

status

Definition at line 1223 of file stm32l4xx_hal_qspi.c.

{
  HAL_StatusTypeDef status = HAL_OK;
  uint32_t addr_reg = READ_REG(hqspi->Instance->AR);

  /* Process locked */
  __HAL_LOCK(hqspi);

  if(hqspi->State == HAL_QSPI_STATE_READY)
  {
    hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;

    if(pData != NULL )
    {
      /* Update state */
      hqspi->State = HAL_QSPI_STATE_BUSY_INDIRECT_RX;

      /* Configure counters and size of the handle */
      hqspi->RxXferCount = READ_REG(hqspi->Instance->DLR) + 1U;
      hqspi->RxXferSize = READ_REG(hqspi->Instance->DLR) + 1U;
      hqspi->pRxBuffPtr = pData;

      /* Clear interrupt */
      __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TE | QSPI_FLAG_TC);

      /* Configure QSPI: CCR register with functional as indirect read */
      MODIFY_REG(hqspi->Instance->CCR, QUADSPI_CCR_FMODE, QSPI_FUNCTIONAL_MODE_INDIRECT_READ);

      /* Start the transfer by re-writing the address in AR register */
      WRITE_REG(hqspi->Instance->AR, addr_reg);

      /* Process unlocked */
      __HAL_UNLOCK(hqspi);

      /* Enable the QSPI transfer error, FIFO threshold and transfer complete Interrupts */
      __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TE | QSPI_IT_FT | QSPI_IT_TC);
    }
    else
    {
      hqspi->ErrorCode |= HAL_QSPI_ERROR_INVALID_PARAM;
      status = HAL_ERROR;

      /* Process unlocked */
      __HAL_UNLOCK(hqspi);
    }
  }
  else
  {
    status = HAL_BUSY;

    /* Process unlocked */
    __HAL_UNLOCK(hqspi);
  }

  return status;
}

HAL_QSPI_RegisterCallback()

HAL_StatusTypeDef HAL_QSPI_RegisterCallback	(	QSPI_HandleTypeDef *	hqspi,
		HAL_QSPI_CallbackIDTypeDef	CallbackId,
		pQSPI_CallbackTypeDef	pCallback
	)

Register a User QSPI Callback To be used instead of the weak (surcharged) predefined callback.

Parameters

hqspi	: QSPI handle
CallbackId	: ID of the callback to be registered This parameter can be one of the following values: HAL_QSPI_ERROR_CB_ID QSPI Error Callback ID HAL_QSPI_ABORT_CB_ID QSPI Abort Callback ID HAL_QSPI_FIFO_THRESHOLD_CB_ID QSPI FIFO Threshold Callback ID HAL_QSPI_CMD_CPLT_CB_ID QSPI Command Complete Callback ID HAL_QSPI_RX_CPLT_CB_ID QSPI Rx Complete Callback ID HAL_QSPI_TX_CPLT_CB_ID QSPI Tx Complete Callback ID HAL_QSPI_RX_HALF_CPLT_CB_ID QSPI Rx Half Complete Callback ID HAL_QSPI_TX_HALF_CPLT_CB_ID QSPI Tx Half Complete Callback ID HAL_QSPI_STATUS_MATCH_CB_ID QSPI Status Match Callback ID HAL_QSPI_TIMEOUT_CB_ID QSPI Timeout Callback ID HAL_QSPI_MSP_INIT_CB_ID QSPI MspInit callback ID HAL_QSPI_MSP_DEINIT_CB_ID QSPI MspDeInit callback ID
pCallback	: pointer to the Callback function

Return values

status

Definition at line 2037 of file stm32l4xx_hal_qspi.c.

{
  HAL_StatusTypeDef status = HAL_OK;

  if(pCallback == NULL)
  {
    /* Update the error code */
    hqspi->ErrorCode |= HAL_QSPI_ERROR_INVALID_CALLBACK;
    return HAL_ERROR;
  }

  /* Process locked */
  __HAL_LOCK(hqspi);

  if(hqspi->State == HAL_QSPI_STATE_READY)
  {
    switch (CallbackId)
    {
    case  HAL_QSPI_ERROR_CB_ID :
      hqspi->ErrorCallback = pCallback;
      break;
    case HAL_QSPI_ABORT_CB_ID :
      hqspi->AbortCpltCallback = pCallback;
      break;
    case HAL_QSPI_FIFO_THRESHOLD_CB_ID :
      hqspi->FifoThresholdCallback = pCallback;
      break;
    case HAL_QSPI_CMD_CPLT_CB_ID :
      hqspi->CmdCpltCallback = pCallback;
      break;
    case HAL_QSPI_RX_CPLT_CB_ID :
      hqspi->RxCpltCallback = pCallback;
      break;
    case HAL_QSPI_TX_CPLT_CB_ID :
      hqspi->TxCpltCallback = pCallback;
      break;
    case HAL_QSPI_RX_HALF_CPLT_CB_ID :
      hqspi->RxHalfCpltCallback = pCallback;
      break;
    case HAL_QSPI_TX_HALF_CPLT_CB_ID :
      hqspi->TxHalfCpltCallback = pCallback;
      break;
    case HAL_QSPI_STATUS_MATCH_CB_ID :
      hqspi->StatusMatchCallback = pCallback;
      break;
    case HAL_QSPI_TIMEOUT_CB_ID :
      hqspi->TimeOutCallback = pCallback;
      break;
    case HAL_QSPI_MSP_INIT_CB_ID :
      hqspi->MspInitCallback = pCallback;
      break;
    case HAL_QSPI_MSP_DEINIT_CB_ID :
      hqspi->MspDeInitCallback = pCallback;
      break;
    default :
      /* Update the error code */
      hqspi->ErrorCode |= HAL_QSPI_ERROR_INVALID_CALLBACK;
      /* update return status */
      status =  HAL_ERROR;
      break;
    }
  }
  else if (hqspi->State == HAL_QSPI_STATE_RESET)
  {
    switch (CallbackId)
    {
    case HAL_QSPI_MSP_INIT_CB_ID :
      hqspi->MspInitCallback = pCallback;
      break;
    case HAL_QSPI_MSP_DEINIT_CB_ID :
      hqspi->MspDeInitCallback = pCallback;
      break;
    default :
      /* Update the error code */
      hqspi->ErrorCode |= HAL_QSPI_ERROR_INVALID_CALLBACK;
      /* update return status */
      status =  HAL_ERROR;
      break;
    }
  }
  else
  {
    /* Update the error code */
    hqspi->ErrorCode |= HAL_QSPI_ERROR_INVALID_CALLBACK;
    /* update return status */
    status =  HAL_ERROR;
  }

  /* Release Lock */
  __HAL_UNLOCK(hqspi);
  return status;
}

HAL_QSPI_RxCpltCallback()

__weak void HAL_QSPI_RxCpltCallback

(

QSPI_HandleTypeDef *

hqspi

)

Rx Transfer completed callback.

Parameters

hqspi

: QSPI handle

Return values

None

Definition at line 1916 of file stm32l4xx_hal_qspi.c.

{
  /* Prevent unused argument(s) compilation warning */
  UNUSED(hqspi);

  /* NOTE: This function should not be modified, when the callback is needed,
           the HAL_QSPI_RxCpltCallback could be implemented in the user file
   */
}

HAL_QSPI_RxHalfCpltCallback()

__weak void HAL_QSPI_RxHalfCpltCallback

(

QSPI_HandleTypeDef *

hqspi

)

Rx Half Transfer completed callback.

Parameters

hqspi

: QSPI handle

Return values

None

Definition at line 1946 of file stm32l4xx_hal_qspi.c.

{
  /* Prevent unused argument(s) compilation warning */
  UNUSED(hqspi);

  /* NOTE: This function should not be modified, when the callback is needed,
           the HAL_QSPI_RxHalfCpltCallback could be implemented in the user file
   */
}

HAL_QSPI_StatusMatchCallback()

__weak void HAL_QSPI_StatusMatchCallback

(

QSPI_HandleTypeDef *

hqspi

)

Status Match callback.

Parameters

hqspi

: QSPI handle

Return values

None

Definition at line 1991 of file stm32l4xx_hal_qspi.c.

{
  /* Prevent unused argument(s) compilation warning */
  UNUSED(hqspi);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_QSPI_StatusMatchCallback could be implemented in the user file
   */
}

HAL_QSPI_TimeOutCallback()

__weak void HAL_QSPI_TimeOutCallback

(

QSPI_HandleTypeDef *

hqspi

)

Timeout callback.

Parameters

hqspi

: QSPI handle

Return values

None

Definition at line 2006 of file stm32l4xx_hal_qspi.c.

{
  /* Prevent unused argument(s) compilation warning */
  UNUSED(hqspi);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_QSPI_TimeOutCallback could be implemented in the user file
   */
}

HAL_QSPI_Transmit()

HAL_StatusTypeDef HAL_QSPI_Transmit	(	QSPI_HandleTypeDef *	hqspi,
		uint8_t *	pData,
		uint32_t	Timeout
	)

Transmit an amount of data in blocking mode.

Parameters

hqspi	: QSPI handle
pData	: pointer to data buffer
Timeout	: Timeout duration

Note

This function is used only in Indirect Write Mode

Return values

HAL

status

Definition at line 987 of file stm32l4xx_hal_qspi.c.

{
  HAL_StatusTypeDef status = HAL_OK;
  uint32_t tickstart = HAL_GetTick();
  __IO uint32_t *data_reg = &hqspi->Instance->DR;

  /* Process locked */
  __HAL_LOCK(hqspi);

  if(hqspi->State == HAL_QSPI_STATE_READY)
  {
    hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;

    if(pData != NULL )
    {
      /* Update state */
      hqspi->State = HAL_QSPI_STATE_BUSY_INDIRECT_TX;

      /* Configure counters and size of the handle */
      hqspi->TxXferCount = READ_REG(hqspi->Instance->DLR) + 1U;
      hqspi->TxXferSize = READ_REG(hqspi->Instance->DLR) + 1U;
      hqspi->pTxBuffPtr = pData;

      /* Configure QSPI: CCR register with functional as indirect write */
      MODIFY_REG(hqspi->Instance->CCR, QUADSPI_CCR_FMODE, QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE);

      while(hqspi->TxXferCount > 0U)
      {
        /* Wait until FT flag is set to send data */
        status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_FT, SET, tickstart, Timeout);

        if (status != HAL_OK)
        {
          break;
        }

        *((__IO uint8_t *)data_reg) = *hqspi->pTxBuffPtr;
        hqspi->pTxBuffPtr++;
        hqspi->TxXferCount--;
      }

      if (status == HAL_OK)
      {
        /* Wait until TC flag is set to go back in idle state */
        status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_TC, SET, tickstart, Timeout);

        if (status == HAL_OK)
        {
          /* Clear Transfer Complete bit */
          __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC);

#if  (defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx))
          /* Clear Busy bit */
          status = HAL_QSPI_Abort(hqspi);
#endif
        }
      }

      /* Update QSPI state */
      hqspi->State = HAL_QSPI_STATE_READY;
    }
    else
    {
      hqspi->ErrorCode |= HAL_QSPI_ERROR_INVALID_PARAM;
      status = HAL_ERROR;
    }
  }
  else
  {
    status = HAL_BUSY;
  }

  /* Process unlocked */
  __HAL_UNLOCK(hqspi);

  return status;
}

HAL_QSPI_Transmit_DMA()

HAL_StatusTypeDef HAL_QSPI_Transmit_DMA	(	QSPI_HandleTypeDef *	hqspi,
		uint8_t *	pData
	)

Send an amount of data in non-blocking mode with DMA.

Parameters

hqspi	: QSPI handle
pData	: pointer to data buffer

Note

This function is used only in Indirect Write Mode

If DMA peripheral access is configured as halfword, the number of data and the fifo threshold should be aligned on halfword

If DMA peripheral access is configured as word, the number of data and the fifo threshold should be aligned on word

Return values

HAL

status

Definition at line 1291 of file stm32l4xx_hal_qspi.c.

{
  HAL_StatusTypeDef status = HAL_OK;
  uint32_t data_size = (READ_REG(hqspi->Instance->DLR) + 1U);

  /* Process locked */
  __HAL_LOCK(hqspi);

  if(hqspi->State == HAL_QSPI_STATE_READY)
  {
    /* Clear the error code */
    hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;

    if(pData != NULL )
    {
      /* Configure counters of the handle */
      if (hqspi->hdma->Init.PeriphDataAlignment == DMA_PDATAALIGN_BYTE)
      {
        hqspi->TxXferCount = data_size;
      }
      else if (hqspi->hdma->Init.PeriphDataAlignment == DMA_PDATAALIGN_HALFWORD)
      {
        if (((data_size % 2U) != 0U) || ((hqspi->Init.FifoThreshold % 2U) != 0U))
        {
          /* The number of data or the fifo threshold is not aligned on halfword
          => no transfer possible with DMA peripheral access configured as halfword */
          hqspi->ErrorCode |= HAL_QSPI_ERROR_INVALID_PARAM;
          status = HAL_ERROR;

          /* Process unlocked */
          __HAL_UNLOCK(hqspi);
        }
        else
        {
          hqspi->TxXferCount = (data_size >> 1U);
        }
      }
      else if (hqspi->hdma->Init.PeriphDataAlignment == DMA_PDATAALIGN_WORD)
      {
        if (((data_size % 4U) != 0U) || ((hqspi->Init.FifoThreshold % 4U) != 0U))
        {
          /* The number of data or the fifo threshold is not aligned on word
          => no transfer possible with DMA peripheral access configured as word */
          hqspi->ErrorCode |= HAL_QSPI_ERROR_INVALID_PARAM;
          status = HAL_ERROR;

          /* Process unlocked */
          __HAL_UNLOCK(hqspi);
        }
        else
        {
          hqspi->TxXferCount = (data_size >> 2U);
        }
      }
      else
      {
        /* Nothing to do */
      }

      if (status == HAL_OK)
      {
        /* Update state */
        hqspi->State = HAL_QSPI_STATE_BUSY_INDIRECT_TX;

        /* Clear interrupt */
        __HAL_QSPI_CLEAR_FLAG(hqspi, (QSPI_FLAG_TE | QSPI_FLAG_TC));

        /* Configure size and pointer of the handle */
        hqspi->TxXferSize = hqspi->TxXferCount;
        hqspi->pTxBuffPtr = pData;

        /* Configure QSPI: CCR register with functional mode as indirect write */
        MODIFY_REG(hqspi->Instance->CCR, QUADSPI_CCR_FMODE, QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE);

        /* Set the QSPI DMA transfer complete callback */
        hqspi->hdma->XferCpltCallback = QSPI_DMATxCplt;

        /* Set the QSPI DMA Half transfer complete callback */
        hqspi->hdma->XferHalfCpltCallback = QSPI_DMATxHalfCplt;

        /* Set the DMA error callback */
        hqspi->hdma->XferErrorCallback = QSPI_DMAError;

        /* Clear the DMA abort callback */
        hqspi->hdma->XferAbortCallback = NULL;

        /* Configure the direction of the DMA */
        hqspi->hdma->Init.Direction = DMA_MEMORY_TO_PERIPH;
        MODIFY_REG(hqspi->hdma->Instance->CCR, DMA_CCR_DIR, hqspi->hdma->Init.Direction);

        /* Enable the QSPI transmit DMA Channel */
        if (HAL_DMA_Start_IT(hqspi->hdma, (uint32_t)pData, (uint32_t)&hqspi->Instance->DR, hqspi->TxXferSize) == HAL_OK)
        {
          /* Process unlocked */
          __HAL_UNLOCK(hqspi);
          
          /* Enable the QSPI transfer error Interrupt */
          __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TE);
          
          /* Enable the DMA transfer by setting the DMAEN bit in the QSPI CR register */
          SET_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN);
        }
        else
        {
          status = HAL_ERROR;
          hqspi->ErrorCode |= HAL_QSPI_ERROR_DMA;
          hqspi->State = HAL_QSPI_STATE_READY;

          /* Process unlocked */
          __HAL_UNLOCK(hqspi);
        }
     }
    }
    else
    {
      hqspi->ErrorCode |= HAL_QSPI_ERROR_INVALID_PARAM;
      status = HAL_ERROR;

      /* Process unlocked */
      __HAL_UNLOCK(hqspi);
    }
  }
  else
  {
    status = HAL_BUSY;

    /* Process unlocked */
    __HAL_UNLOCK(hqspi);
  }

  return status;
}

HAL_QSPI_Transmit_IT()

HAL_StatusTypeDef HAL_QSPI_Transmit_IT	(	QSPI_HandleTypeDef *	hqspi,
		uint8_t *	pData
	)

Send an amount of data in non-blocking mode with interrupt.

Parameters

hqspi	: QSPI handle
pData	: pointer to data buffer

Note

This function is used only in Indirect Write Mode

Return values

HAL

status

Definition at line 1163 of file stm32l4xx_hal_qspi.c.

{
  HAL_StatusTypeDef status = HAL_OK;

  /* Process locked */
  __HAL_LOCK(hqspi);

  if(hqspi->State == HAL_QSPI_STATE_READY)
  {
    hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;

    if(pData != NULL )
    {
      /* Update state */
      hqspi->State = HAL_QSPI_STATE_BUSY_INDIRECT_TX;

      /* Configure counters and size of the handle */
      hqspi->TxXferCount = READ_REG(hqspi->Instance->DLR) + 1U;
      hqspi->TxXferSize = READ_REG(hqspi->Instance->DLR) + 1U;
      hqspi->pTxBuffPtr = pData;

      /* Clear interrupt */
      __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TE | QSPI_FLAG_TC);

      /* Configure QSPI: CCR register with functional as indirect write */
      MODIFY_REG(hqspi->Instance->CCR, QUADSPI_CCR_FMODE, QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE);

      /* Process unlocked */
      __HAL_UNLOCK(hqspi);

      /* Enable the QSPI transfer error, FIFO threshold and transfer complete Interrupts */
      __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TE | QSPI_IT_FT | QSPI_IT_TC);
    }
    else
    {
      hqspi->ErrorCode |= HAL_QSPI_ERROR_INVALID_PARAM;
      status = HAL_ERROR;

      /* Process unlocked */
      __HAL_UNLOCK(hqspi);
    }
  }
  else
  {
    status = HAL_BUSY;

    /* Process unlocked */
    __HAL_UNLOCK(hqspi);
  }

  return status;
}

HAL_QSPI_TxCpltCallback()

__weak void HAL_QSPI_TxCpltCallback

(

QSPI_HandleTypeDef *

hqspi

)

Tx Transfer completed callback.

Parameters

hqspi

: QSPI handle

Return values

None

Definition at line 1931 of file stm32l4xx_hal_qspi.c.

{
  /* Prevent unused argument(s) compilation warning */
  UNUSED(hqspi);

  /* NOTE: This function should not be modified, when the callback is needed,
           the HAL_QSPI_TxCpltCallback could be implemented in the user file
   */
}

HAL_QSPI_TxHalfCpltCallback()

__weak void HAL_QSPI_TxHalfCpltCallback

(

QSPI_HandleTypeDef *

hqspi

)

Tx Half Transfer completed callback.

Parameters

hqspi

: QSPI handle

Return values

None

Definition at line 1961 of file stm32l4xx_hal_qspi.c.

{
  /* Prevent unused argument(s) compilation warning */
  UNUSED(hqspi);

  /* NOTE: This function should not be modified, when the callback is needed,
           the HAL_QSPI_TxHalfCpltCallback could be implemented in the user file
   */
}

HAL_QSPI_UnRegisterCallback()

HAL_StatusTypeDef HAL_QSPI_UnRegisterCallback	(	QSPI_HandleTypeDef *	hqspi,
		HAL_QSPI_CallbackIDTypeDef	CallbackId
	)

Unregister a User QSPI Callback QSPI Callback is redirected to the weak (surcharged) predefined callback.

Parameters

hqspi

: QSPI handle

CallbackId

: ID of the callback to be unregistered This parameter can be one of the following values: HAL_QSPI_ERROR_CB_ID QSPI Error Callback ID HAL_QSPI_ABORT_CB_ID QSPI Abort Callback ID HAL_QSPI_FIFO_THRESHOLD_CB_ID QSPI FIFO Threshold Callback ID HAL_QSPI_CMD_CPLT_CB_ID QSPI Command Complete Callback ID HAL_QSPI_RX_CPLT_CB_ID QSPI Rx Complete Callback ID HAL_QSPI_TX_CPLT_CB_ID QSPI Tx Complete Callback ID HAL_QSPI_RX_HALF_CPLT_CB_ID QSPI Rx Half Complete Callback ID HAL_QSPI_TX_HALF_CPLT_CB_ID QSPI Tx Half Complete Callback ID HAL_QSPI_STATUS_MATCH_CB_ID QSPI Status Match Callback ID HAL_QSPI_TIMEOUT_CB_ID QSPI Timeout Callback ID HAL_QSPI_MSP_INIT_CB_ID QSPI MspInit callback ID HAL_QSPI_MSP_DEINIT_CB_ID QSPI MspDeInit callback ID

Return values

status

Definition at line 2150 of file stm32l4xx_hal_qspi.c.

{
  HAL_StatusTypeDef status = HAL_OK;

  /* Process locked */
  __HAL_LOCK(hqspi);

  if(hqspi->State == HAL_QSPI_STATE_READY)
  {
    switch (CallbackId)
    {
    case  HAL_QSPI_ERROR_CB_ID :
      hqspi->ErrorCallback = HAL_QSPI_ErrorCallback;
      break;
    case HAL_QSPI_ABORT_CB_ID :
      hqspi->AbortCpltCallback = HAL_QSPI_AbortCpltCallback;
      break;
    case HAL_QSPI_FIFO_THRESHOLD_CB_ID :
      hqspi->FifoThresholdCallback = HAL_QSPI_FifoThresholdCallback;
      break;
    case HAL_QSPI_CMD_CPLT_CB_ID :
      hqspi->CmdCpltCallback = HAL_QSPI_CmdCpltCallback;
      break;
    case HAL_QSPI_RX_CPLT_CB_ID :
      hqspi->RxCpltCallback = HAL_QSPI_RxCpltCallback;
      break;
    case HAL_QSPI_TX_CPLT_CB_ID :
      hqspi->TxCpltCallback = HAL_QSPI_TxCpltCallback;
      break;
    case HAL_QSPI_RX_HALF_CPLT_CB_ID :
      hqspi->RxHalfCpltCallback = HAL_QSPI_RxHalfCpltCallback;
      break;
    case HAL_QSPI_TX_HALF_CPLT_CB_ID :
      hqspi->TxHalfCpltCallback = HAL_QSPI_TxHalfCpltCallback;
      break;
    case HAL_QSPI_STATUS_MATCH_CB_ID :
      hqspi->StatusMatchCallback = HAL_QSPI_StatusMatchCallback;
      break;
    case HAL_QSPI_TIMEOUT_CB_ID :
      hqspi->TimeOutCallback = HAL_QSPI_TimeOutCallback;
      break;
    case HAL_QSPI_MSP_INIT_CB_ID :
      hqspi->MspInitCallback = HAL_QSPI_MspInit;
      break;
    case HAL_QSPI_MSP_DEINIT_CB_ID :
      hqspi->MspDeInitCallback = HAL_QSPI_MspDeInit;
      break;
    default :
      /* Update the error code */
      hqspi->ErrorCode |= HAL_QSPI_ERROR_INVALID_CALLBACK;
      /* update return status */
      status =  HAL_ERROR;
      break;
    }
  }
  else if (hqspi->State == HAL_QSPI_STATE_RESET)
  {
    switch (CallbackId)
    {
    case HAL_QSPI_MSP_INIT_CB_ID :
      hqspi->MspInitCallback = HAL_QSPI_MspInit;
      break;
    case HAL_QSPI_MSP_DEINIT_CB_ID :
      hqspi->MspDeInitCallback = HAL_QSPI_MspDeInit;
      break;
    default :
      /* Update the error code */
      hqspi->ErrorCode |= HAL_QSPI_ERROR_INVALID_CALLBACK;
      /* update return status */
      status =  HAL_ERROR;
      break;
    }
  }
  else
  {
    /* Update the error code */
    hqspi->ErrorCode |= HAL_QSPI_ERROR_INVALID_CALLBACK;
    /* update return status */
    status =  HAL_ERROR;
  }

  /* Release Lock */
  __HAL_UNLOCK(hqspi);
  return status;
}