STM32L4xx_HAL_Driver  1.14.0
Peripheral Control and State functions

QSPI control and State functions. More...

Functions

HAL_QSPI_StateTypeDef HAL_QSPI_GetState (QSPI_HandleTypeDef *hqspi)
 Return the QSPI handle state. More...
 
uint32_t HAL_QSPI_GetError (QSPI_HandleTypeDef *hqspi)
 Return the QSPI error code. More...
 
HAL_StatusTypeDef HAL_QSPI_Abort (QSPI_HandleTypeDef *hqspi)
 Abort the current transmission. More...
 
HAL_StatusTypeDef HAL_QSPI_Abort_IT (QSPI_HandleTypeDef *hqspi)
 Abort the current transmission (non-blocking function) More...
 
void HAL_QSPI_SetTimeout (QSPI_HandleTypeDef *hqspi, uint32_t Timeout)
 Set QSPI timeout. More...
 
HAL_StatusTypeDef HAL_QSPI_SetFifoThreshold (QSPI_HandleTypeDef *hqspi, uint32_t Threshold)
 Set QSPI Fifo threshold. More...
 
uint32_t HAL_QSPI_GetFifoThreshold (QSPI_HandleTypeDef *hqspi)
 Get QSPI Fifo threshold. More...
 
HAL_StatusTypeDef HAL_QSPI_SetFlashID (QSPI_HandleTypeDef *hqspi, uint32_t FlashID)
 Set FlashID. More...
 

Detailed Description

QSPI control and State functions.

 ===============================================================================
                  ##### Peripheral Control and State functions #####
 ===============================================================================
    [..]
    This subsection provides a set of functions allowing to :
      (+) Check in run-time the state of the driver.
      (+) Check the error code set during last operation.
      (+) Abort any operation.

Function Documentation

◆ HAL_QSPI_Abort()

HAL_StatusTypeDef HAL_QSPI_Abort ( QSPI_HandleTypeDef hqspi)

Abort the current transmission.

Parameters
hqspi: QSPI handle
Return values
HALstatus

Definition at line 2285 of file stm32l4xx_hal_qspi.c.

2286 {
2287  HAL_StatusTypeDef status = HAL_OK;
2288  uint32_t tickstart = HAL_GetTick();
2289 
2290  /* Check if the state is in one of the busy states */
2291  if (((uint32_t)hqspi->State & 0x2U) != 0U)
2292  {
2293  /* Process unlocked */
2294  __HAL_UNLOCK(hqspi);
2295 
2296  if ((hqspi->Instance->CR & QUADSPI_CR_DMAEN) != 0U)
2297  {
2298  /* Disable the DMA transfer by clearing the DMAEN bit in the QSPI CR register */
2299  CLEAR_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN);
2300 
2301  /* Abort DMA channel */
2302  status = HAL_DMA_Abort(hqspi->hdma);
2303  if(status != HAL_OK)
2304  {
2305  hqspi->ErrorCode |= HAL_QSPI_ERROR_DMA;
2306  }
2307  }
2308 
2309  /* Configure QSPI: CR register with Abort request */
2310  SET_BIT(hqspi->Instance->CR, QUADSPI_CR_ABORT);
2311 
2312  /* Wait until TC flag is set to go back in idle state */
2313  status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_TC, SET, tickstart, hqspi->Timeout);
2314 
2315  if (status == HAL_OK)
2316  {
2317  __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC);
2318 
2319  /* Wait until BUSY flag is reset */
2320  status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, tickstart, hqspi->Timeout);
2321  }
2322 
2323  if (status == HAL_OK)
2324  {
2325  /* Reset functional mode configuration to indirect write mode by default */
2326  CLEAR_BIT(hqspi->Instance->CCR, QUADSPI_CCR_FMODE);
2327 
2328  /* Update state */
2329  hqspi->State = HAL_QSPI_STATE_READY;
2330  }
2331  }
2332 
2333  return status;
2334 }
uint32_t HAL_GetTick(void)
Provide a tick value in millisecond.
__HAL_UNLOCK(hrtc)
CLEAR_BIT(hrtc->Instance->CR, RTC_CR_WUTE)
return HAL_OK
HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
Abort the DMA Transfer.
static HAL_StatusTypeDef QSPI_WaitFlagStateUntilTimeout(QSPI_HandleTypeDef *hqspi, uint32_t Flag, FlagStatus State, uint32_t Tickstart, uint32_t Timeout)
Wait for a flag state until timeout.

◆ HAL_QSPI_Abort_IT()

HAL_StatusTypeDef HAL_QSPI_Abort_IT ( QSPI_HandleTypeDef hqspi)

Abort the current transmission (non-blocking function)

Parameters
hqspi: QSPI handle
Return values
HALstatus

Definition at line 2341 of file stm32l4xx_hal_qspi.c.

2342 {
2343  HAL_StatusTypeDef status = HAL_OK;
2344 
2345  /* Check if the state is in one of the busy states */
2346  if (((uint32_t)hqspi->State & 0x2U) != 0U)
2347  {
2348  /* Process unlocked */
2349  __HAL_UNLOCK(hqspi);
2350 
2351  /* Update QSPI state */
2352  hqspi->State = HAL_QSPI_STATE_ABORT;
2353 
2354  /* Disable all interrupts */
2355  __HAL_QSPI_DISABLE_IT(hqspi, (QSPI_IT_TO | QSPI_IT_SM | QSPI_IT_FT | QSPI_IT_TC | QSPI_IT_TE));
2356 
2357  if ((hqspi->Instance->CR & QUADSPI_CR_DMAEN) != 0U)
2358  {
2359  /* Disable the DMA transfer by clearing the DMAEN bit in the QSPI CR register */
2360  CLEAR_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN);
2361 
2362  /* Abort DMA channel */
2363  hqspi->hdma->XferAbortCallback = QSPI_DMAAbortCplt;
2364  if (HAL_DMA_Abort_IT(hqspi->hdma) != HAL_OK)
2365  {
2366  /* Change state of QSPI */
2367  hqspi->State = HAL_QSPI_STATE_READY;
2368 
2369  /* Abort Complete callback */
2370 #if (USE_HAL_QSPI_REGISTER_CALLBACKS == 1)
2371  hqspi->AbortCpltCallback(hqspi);
2372 #else
2374 #endif
2375  }
2376  }
2377  else
2378  {
2379  /* Clear interrupt */
2380  __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC);
2381 
2382  /* Enable the QSPI Transfer Complete Interrupt */
2383  __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TC);
2384 
2385  /* Configure QSPI: CR register with Abort request */
2386  SET_BIT(hqspi->Instance->CR, QUADSPI_CR_ABORT);
2387  }
2388  }
2389  return status;
2390 }
HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
Aborts the DMA Transfer in Interrupt mode.
__HAL_UNLOCK(hrtc)
CLEAR_BIT(hrtc->Instance->CR, RTC_CR_WUTE)
return HAL_OK
static void QSPI_DMAAbortCplt(DMA_HandleTypeDef *hdma)
DMA QSPI abort complete callback.
void HAL_QSPI_AbortCpltCallback(QSPI_HandleTypeDef *hqspi)
Abort completed callback.

◆ HAL_QSPI_GetError()

uint32_t HAL_QSPI_GetError ( QSPI_HandleTypeDef hqspi)

Return the QSPI error code.

Parameters
hqspi: QSPI handle
Return values
QSPIError Code

Definition at line 2275 of file stm32l4xx_hal_qspi.c.

2276 {
2277  return hqspi->ErrorCode;
2278 }

◆ HAL_QSPI_GetFifoThreshold()

uint32_t HAL_QSPI_GetFifoThreshold ( QSPI_HandleTypeDef hqspi)

Get QSPI Fifo threshold.

Parameters
hqspi: QSPI handle.
Return values
Fifothreshold (value between 1 and 16)

Definition at line 2439 of file stm32l4xx_hal_qspi.c.

2440 {
2441  return ((READ_BIT(hqspi->Instance->CR, QUADSPI_CR_FTHRES) >> QUADSPI_CR_FTHRES_Pos) + 1U);
2442 }

◆ HAL_QSPI_GetState()

HAL_QSPI_StateTypeDef HAL_QSPI_GetState ( QSPI_HandleTypeDef hqspi)

Return the QSPI handle state.

Parameters
hqspi: QSPI handle
Return values
HALstate

Definition at line 2264 of file stm32l4xx_hal_qspi.c.

2265 {
2266  /* Return QSPI handle state */
2267  return hqspi->State;
2268 }

◆ HAL_QSPI_SetFifoThreshold()

HAL_StatusTypeDef HAL_QSPI_SetFifoThreshold ( QSPI_HandleTypeDef hqspi,
uint32_t  Threshold 
)

Set QSPI Fifo threshold.

Parameters
hqspi: QSPI handle.
Threshold: Threshold of the Fifo (value between 1 and 16).
Return values
HALstatus

Definition at line 2407 of file stm32l4xx_hal_qspi.c.

2408 {
2409  HAL_StatusTypeDef status = HAL_OK;
2410 
2411  /* Process locked */
2412  __HAL_LOCK(hqspi);
2413 
2414  if(hqspi->State == HAL_QSPI_STATE_READY)
2415  {
2416  /* Synchronize init structure with new FIFO threshold value */
2417  hqspi->Init.FifoThreshold = Threshold;
2418 
2419  /* Configure QSPI FIFO Threshold */
2420  MODIFY_REG(hqspi->Instance->CR, QUADSPI_CR_FTHRES,
2421  ((hqspi->Init.FifoThreshold - 1U) << QUADSPI_CR_FTHRES_Pos));
2422  }
2423  else
2424  {
2425  status = HAL_BUSY;
2426  }
2427 
2428  /* Process unlocked */
2429  __HAL_UNLOCK(hqspi);
2430 
2431  /* Return function status */
2432  return status;
2433 }
__HAL_UNLOCK(hrtc)
__HAL_LOCK(hrtc)
return HAL_OK
MODIFY_REG(hrtc->Instance->CR, RTC_CR_WUCKSEL,(uint32_t) WakeUpClock)

◆ HAL_QSPI_SetFlashID()

HAL_StatusTypeDef HAL_QSPI_SetFlashID ( QSPI_HandleTypeDef hqspi,
uint32_t  FlashID 
)

Set FlashID.

Parameters
hqspi: QSPI handle.
FlashID: Index of the flash memory to be accessed. This parameter can be a value of QSPI Flash Select.
Note
The FlashID is ignored when dual flash mode is enabled.
Return values
HALstatus

Definition at line 2452 of file stm32l4xx_hal_qspi.c.

2453 {
2454  HAL_StatusTypeDef status = HAL_OK;
2455 
2456  /* Check the parameter */
2457  assert_param(IS_QSPI_FLASH_ID(FlashID));
2458 
2459  /* Process locked */
2460  __HAL_LOCK(hqspi);
2461 
2462  if(hqspi->State == HAL_QSPI_STATE_READY)
2463  {
2464  /* Synchronize init structure with new FlashID value */
2465  hqspi->Init.FlashID = FlashID;
2466 
2467  /* Configure QSPI FlashID */
2468  MODIFY_REG(hqspi->Instance->CR, QUADSPI_CR_FSEL, FlashID);
2469  }
2470  else
2471  {
2472  status = HAL_BUSY;
2473  }
2474 
2475  /* Process unlocked */
2476  __HAL_UNLOCK(hqspi);
2477 
2478  /* Return function status */
2479  return status;
2480 }
__HAL_UNLOCK(hrtc)
__HAL_LOCK(hrtc)
return HAL_OK
MODIFY_REG(hrtc->Instance->CR, RTC_CR_WUCKSEL,(uint32_t) WakeUpClock)
assert_param(IS_RTC_WAKEUP_CLOCK(WakeUpClock))

◆ HAL_QSPI_SetTimeout()

void HAL_QSPI_SetTimeout ( QSPI_HandleTypeDef hqspi,
uint32_t  Timeout 
)

Set QSPI timeout.

Parameters
hqspi: QSPI handle.
Timeout: Timeout for the QSPI memory access.
Return values
None

Definition at line 2397 of file stm32l4xx_hal_qspi.c.

2398 {
2399  hqspi->Timeout = Timeout;
2400 }