QSPI Private Functions

Functions
static void	QSPI_DMARxCplt (DMA_HandleTypeDef *hdma)
	DMA QSPI receive process complete callback. More...
static void	QSPI_DMATxCplt (DMA_HandleTypeDef *hdma)
	DMA QSPI transmit process complete callback. More...
static void	QSPI_DMARxHalfCplt (DMA_HandleTypeDef *hdma)
	DMA QSPI receive process half complete callback. More...
static void	QSPI_DMATxHalfCplt (DMA_HandleTypeDef *hdma)
	DMA QSPI transmit process half complete callback. More...
static void	QSPI_DMAError (DMA_HandleTypeDef *hdma)
	DMA QSPI communication error callback. More...
static void	QSPI_DMAAbortCplt (DMA_HandleTypeDef *hdma)
	DMA QSPI abort complete callback. More...
static HAL_StatusTypeDef	QSPI_WaitFlagStateUntilTimeout (QSPI_HandleTypeDef *hqspi, uint32_t Flag, FlagStatus State, uint32_t Tickstart, uint32_t Timeout)
	Wait for a flag state until timeout. More...
static void	QSPI_Config (QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, uint32_t FunctionalMode)
	Configure the communication registers. More...

Detailed Description

Function Documentation

QSPI_Config()

static void QSPI_Config ( QSPI_HandleTypeDef *  hqspi, QSPI_CommandTypeDef *  cmd, uint32_t  FunctionalMode  )

static

Configure the communication registers.

Parameters

hqspi	: QSPI handle
cmd	: structure that contains the command configuration information
FunctionalMode	: functional mode to configured This parameter can be one of the following values: QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE: Indirect write mode QSPI_FUNCTIONAL_MODE_INDIRECT_READ: Indirect read mode QSPI_FUNCTIONAL_MODE_AUTO_POLLING: Automatic polling mode QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED: Memory-mapped mode

Return values

None

Definition at line 2657 of file stm32l4xx_hal_qspi.c.

{
  assert_param(IS_QSPI_FUNCTIONAL_MODE(FunctionalMode));

  if ((cmd->DataMode != QSPI_DATA_NONE) && (FunctionalMode != QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED))
  {
    /* Configure QSPI: DLR register with the number of data to read or write */
    WRITE_REG(hqspi->Instance->DLR, (cmd->NbData - 1U));
  }

  if (cmd->InstructionMode != QSPI_INSTRUCTION_NONE)
  {
    if (cmd->AlternateByteMode != QSPI_ALTERNATE_BYTES_NONE)
    {
      /* Configure QSPI: ABR register with alternate bytes value */
      WRITE_REG(hqspi->Instance->ABR, cmd->AlternateBytes);

      if (cmd->AddressMode != QSPI_ADDRESS_NONE)
      {
        /*---- Command with instruction, address and alternate bytes ----*/
        /* Configure QSPI: CCR register with all communications parameters */
        WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode |
                                         cmd->DataMode | (cmd->DummyCycles << QUADSPI_CCR_DCYC_Pos) |
                                         cmd->AlternateBytesSize | cmd->AlternateByteMode |
                                         cmd->AddressSize | cmd->AddressMode | cmd->InstructionMode |
                                         cmd->Instruction | FunctionalMode));

        if (FunctionalMode != QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED)
        {
          /* Configure QSPI: AR register with address value */
          WRITE_REG(hqspi->Instance->AR, cmd->Address);
        }
      }
      else
      {
        /*---- Command with instruction and alternate bytes ----*/
        /* Configure QSPI: CCR register with all communications parameters */
        WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode |
                                         cmd->DataMode | (cmd->DummyCycles << QUADSPI_CCR_DCYC_Pos) |
                                         cmd->AlternateBytesSize | cmd->AlternateByteMode |
                                         cmd->AddressMode | cmd->InstructionMode |
                                         cmd->Instruction | FunctionalMode));
      }
    }
    else
    {
      if (cmd->AddressMode != QSPI_ADDRESS_NONE)
      {
        /*---- Command with instruction and address ----*/
        /* Configure QSPI: CCR register with all communications parameters */
        WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode |
                                         cmd->DataMode | (cmd->DummyCycles << QUADSPI_CCR_DCYC_Pos) |
                                         cmd->AlternateByteMode | cmd->AddressSize | cmd->AddressMode |
                                         cmd->InstructionMode | cmd->Instruction | FunctionalMode));

        if (FunctionalMode != QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED)
        {
          /* Configure QSPI: AR register with address value */
          WRITE_REG(hqspi->Instance->AR, cmd->Address);
        }
      }
      else
      {
        /*---- Command with only instruction ----*/
        /* Configure QSPI: CCR register with all communications parameters */
        WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode |
                                         cmd->DataMode | (cmd->DummyCycles << QUADSPI_CCR_DCYC_Pos) |
                                         cmd->AlternateByteMode | cmd->AddressMode |
                                         cmd->InstructionMode | cmd->Instruction | FunctionalMode));
      }
    }
  }
  else
  {
    if (cmd->AlternateByteMode != QSPI_ALTERNATE_BYTES_NONE)
    {
      /* Configure QSPI: ABR register with alternate bytes value */
      WRITE_REG(hqspi->Instance->ABR, cmd->AlternateBytes);

      if (cmd->AddressMode != QSPI_ADDRESS_NONE)
      {
        /*---- Command with address and alternate bytes ----*/
        /* Configure QSPI: CCR register with all communications parameters */
        WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode |
                                         cmd->DataMode | (cmd->DummyCycles << QUADSPI_CCR_DCYC_Pos) |
                                         cmd->AlternateBytesSize | cmd->AlternateByteMode |
                                         cmd->AddressSize | cmd->AddressMode |
                                         cmd->InstructionMode | FunctionalMode));

        if (FunctionalMode != QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED)
        {
          /* Configure QSPI: AR register with address value */
          WRITE_REG(hqspi->Instance->AR, cmd->Address);
        }
      }
      else
      {
        /*---- Command with only alternate bytes ----*/
        /* Configure QSPI: CCR register with all communications parameters */
        WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode |
                                         cmd->DataMode | (cmd->DummyCycles << QUADSPI_CCR_DCYC_Pos) |
                                         cmd->AlternateBytesSize | cmd->AlternateByteMode |
                                         cmd->AddressMode | cmd->InstructionMode | FunctionalMode));
      }
    }
    else
    {
      if (cmd->AddressMode != QSPI_ADDRESS_NONE)
      {
        /*---- Command with only address ----*/
        /* Configure QSPI: CCR register with all communications parameters */
        WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode |
                                         cmd->DataMode | (cmd->DummyCycles << QUADSPI_CCR_DCYC_Pos) |
                                         cmd->AlternateByteMode | cmd->AddressSize |
                                         cmd->AddressMode | cmd->InstructionMode | FunctionalMode));

        if (FunctionalMode != QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED)
        {
          /* Configure QSPI: AR register with address value */
          WRITE_REG(hqspi->Instance->AR, cmd->Address);
        }
      }
      else
      {
        /*---- Command with only data phase ----*/
        if (cmd->DataMode != QSPI_DATA_NONE)
        {
          /* Configure QSPI: CCR register with all communications parameters */
          WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode |
                                           cmd->DataMode | (cmd->DummyCycles << QUADSPI_CCR_DCYC_Pos) |
                                           cmd->AlternateByteMode | cmd->AddressMode |
                                           cmd->InstructionMode | FunctionalMode));
        }
      }
    }
  }
}

QSPI_DMAAbortCplt()

static void QSPI_DMAAbortCplt ( DMA_HandleTypeDef *  hdma )

static

DMA QSPI abort complete callback.

Parameters

hdma	: DMA handle

Return values

None

Definition at line 2581 of file stm32l4xx_hal_qspi.c.

{
  QSPI_HandleTypeDef* hqspi = ( QSPI_HandleTypeDef* )(hdma->Parent);

  hqspi->RxXferCount = 0U;
  hqspi->TxXferCount = 0U;

  if(hqspi->State == HAL_QSPI_STATE_ABORT)
  {
    /* DMA Abort called by QSPI abort */
    /* Clear interrupt */
    __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC);

    /* Enable the QSPI Transfer Complete Interrupt */
    __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TC);

    /* Configure QSPI: CR register with Abort request */
    SET_BIT(hqspi->Instance->CR, QUADSPI_CR_ABORT);
  }
  else
  {
    /* DMA Abort called due to a transfer error interrupt */
    /* Change state of QSPI */
    hqspi->State = HAL_QSPI_STATE_READY;

    /* Error callback */
#if (USE_HAL_QSPI_REGISTER_CALLBACKS == 1)
    hqspi->ErrorCallback(hqspi);
#else
    HAL_QSPI_ErrorCallback(hqspi);
#endif
  }
}

QSPI_DMAError()

static void QSPI_DMAError ( DMA_HandleTypeDef *  hdma )

static

DMA QSPI communication error callback.

Parameters

hdma	: DMA handle

Return values

None

Definition at line 2560 of file stm32l4xx_hal_qspi.c.

{
  QSPI_HandleTypeDef* hqspi = ( QSPI_HandleTypeDef* )(hdma->Parent);

  hqspi->RxXferCount = 0U;
  hqspi->TxXferCount = 0U;
  hqspi->ErrorCode   |= HAL_QSPI_ERROR_DMA;

  /* Disable the DMA transfer by clearing the DMAEN bit in the QSPI CR register */
  CLEAR_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN);

  /* Abort the QSPI */
  (void)HAL_QSPI_Abort_IT(hqspi);

}

QSPI_DMARxCplt()

static void QSPI_DMARxCplt ( DMA_HandleTypeDef *  hdma )

static

DMA QSPI receive process complete callback.

Parameters

hdma	: DMA handle

Return values

None

Definition at line 2500 of file stm32l4xx_hal_qspi.c.

{
  QSPI_HandleTypeDef* hqspi = (QSPI_HandleTypeDef*)(hdma->Parent);
  hqspi->RxXferCount = 0U;

  /* Enable the QSPI transfer complete Interrupt */
  __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TC);
}

QSPI_DMARxHalfCplt()

static void QSPI_DMARxHalfCplt ( DMA_HandleTypeDef *  hdma )

static

DMA QSPI receive process half complete callback.

Parameters

hdma	: DMA handle

Return values

None

Definition at line 2528 of file stm32l4xx_hal_qspi.c.

{
  QSPI_HandleTypeDef* hqspi = (QSPI_HandleTypeDef*)(hdma->Parent);

#if (USE_HAL_QSPI_REGISTER_CALLBACKS == 1)
  hqspi->RxHalfCpltCallback(hqspi);
#else
  HAL_QSPI_RxHalfCpltCallback(hqspi);
#endif
}

QSPI_DMATxCplt()

static void QSPI_DMATxCplt ( DMA_HandleTypeDef *  hdma )

static

DMA QSPI transmit process complete callback.

Parameters

hdma	: DMA handle

Return values

None

Definition at line 2514 of file stm32l4xx_hal_qspi.c.

{
  QSPI_HandleTypeDef* hqspi = (QSPI_HandleTypeDef*)(hdma->Parent);
  hqspi->TxXferCount = 0U;

  /* Enable the QSPI transfer complete Interrupt */
  __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TC);
}

QSPI_DMATxHalfCplt()

static void QSPI_DMATxHalfCplt ( DMA_HandleTypeDef *  hdma )

static

DMA QSPI transmit process half complete callback.

Parameters

hdma	: DMA handle

Return values

None

Definition at line 2544 of file stm32l4xx_hal_qspi.c.

{
  QSPI_HandleTypeDef* hqspi = (QSPI_HandleTypeDef*)(hdma->Parent);

#if (USE_HAL_QSPI_REGISTER_CALLBACKS == 1)
  hqspi->TxHalfCpltCallback(hqspi);
#else
  HAL_QSPI_TxHalfCpltCallback(hqspi);
#endif
}

QSPI_WaitFlagStateUntilTimeout()

static HAL_StatusTypeDef QSPI_WaitFlagStateUntilTimeout ( QSPI_HandleTypeDef *  hqspi, uint32_t  Flag, FlagStatus  State, uint32_t  Tickstart, uint32_t  Timeout  )

static

Wait for a flag state until timeout.

Parameters

hqspi	: QSPI handle
Flag	: Flag checked
State	: Value of the flag expected
Tickstart	: Tick start value
Timeout	: Duration of the timeout

Return values

HAL

status

Definition at line 2624 of file stm32l4xx_hal_qspi.c.

{
  /* Wait until flag is in expected state */
  while((__HAL_QSPI_GET_FLAG(hqspi, Flag)) != State)
  {
    /* Check for the Timeout */
    if (Timeout != HAL_MAX_DELAY)
    {
      if(((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
      {
        hqspi->State     = HAL_QSPI_STATE_ERROR;
        hqspi->ErrorCode |= HAL_QSPI_ERROR_TIMEOUT;

        return HAL_ERROR;
      }
    }
  }
  return HAL_OK;
}