Extended Clock management functions

Extended Clock management functions. More...

Functions
HAL_StatusTypeDef	HAL_RCCEx_EnablePLLSAI1 (RCC_PLLSAI1InitTypeDef *PLLSAI1Init)
	Enable PLLSAI1. More...
HAL_StatusTypeDef	HAL_RCCEx_DisablePLLSAI1 (void)
	Disable PLLSAI1. More...
HAL_StatusTypeDef	HAL_RCCEx_EnablePLLSAI2 (RCC_PLLSAI2InitTypeDef *PLLSAI2Init)
	Enable PLLSAI2. More...
HAL_StatusTypeDef	HAL_RCCEx_DisablePLLSAI2 (void)
	Disable PLLISAI2. More...
void	HAL_RCCEx_WakeUpStopCLKConfig (uint32_t WakeUpClk)
	Configure the oscillator clock source for wakeup from Stop and CSS backup clock. More...
void	HAL_RCCEx_StandbyMSIRangeConfig (uint32_t MSIRange)
	Configure the MSI range after standby mode. More...
void	HAL_RCCEx_EnableLSECSS (void)
	Enable the LSE Clock Security System. More...
void	HAL_RCCEx_DisableLSECSS (void)
	Disable the LSE Clock Security System. More...
void	HAL_RCCEx_EnableLSECSS_IT (void)
	Enable the LSE Clock Security System Interrupt & corresponding EXTI line. More...
void	HAL_RCCEx_LSECSS_IRQHandler (void)
	Handle the RCC LSE Clock Security System interrupt request. More...
void	HAL_RCCEx_LSECSS_Callback (void)
	RCCEx LSE Clock Security System interrupt callback. More...
void	HAL_RCCEx_EnableLSCO (uint32_t LSCOSource)
	Select the Low Speed clock source to output on LSCO pin (PA2). More...
void	HAL_RCCEx_DisableLSCO (void)
	Disable the Low Speed clock output. More...
void	HAL_RCCEx_EnableMSIPLLMode (void)
	Enable the PLL-mode of the MSI. More...
void	HAL_RCCEx_DisableMSIPLLMode (void)
	Disable the PLL-mode of the MSI. More...

Detailed Description

Extended Clock management functions.

 ===============================================================================
                ##### Extended clock management functions  #####
 ===============================================================================
    [..]
    This subsection provides a set of functions allowing to control the
    activation or deactivation of MSI PLL-mode, PLLSAI1, PLLSAI2, LSE CSS,
    Low speed clock output and clock after wake-up from STOP mode.

Function Documentation

HAL_RCCEx_DisableLSCO()

void HAL_RCCEx_DisableLSCO

(

void

)

Disable the Low Speed clock output.

Return values

None

Definition at line 2452 of file stm32l4xx_hal_rcc_ex.c.

{
  FlagStatus       pwrclkchanged = RESET;
  FlagStatus       backupchanged = RESET;

  /* Update LSCOEN bit in Backup Domain control register */
  if(__HAL_RCC_PWR_IS_CLK_DISABLED())
  {
    __HAL_RCC_PWR_CLK_ENABLE();
    pwrclkchanged = SET;
  }
  if(HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP))
  {
    /* Enable access to the backup domain */
    HAL_PWR_EnableBkUpAccess();
    backupchanged = SET;
  }

  CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSCOEN);

  /* Restore previous configuration */
  if(backupchanged == SET)
  {
    /* Disable access to the backup domain */
    HAL_PWR_DisableBkUpAccess();
  }
  if(pwrclkchanged == SET)
  {
    __HAL_RCC_PWR_CLK_DISABLE();
  }
}

HAL_RCCEx_DisableLSECSS()

void HAL_RCCEx_DisableLSECSS

(

void

)

Disable the LSE Clock Security System.

Note

LSE Clock Security System can only be disabled after a LSE failure detection.

Return values

None

Definition at line 2343 of file stm32l4xx_hal_rcc_ex.c.

{
  CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSECSSON) ;

  /* Disable LSE CSS IT if any */
  __HAL_RCC_DISABLE_IT(RCC_IT_LSECSS);
}

HAL_RCCEx_DisableMSIPLLMode()

void HAL_RCCEx_DisableMSIPLLMode

(

void

)

Disable the PLL-mode of the MSI.

Note

PLL-mode of the MSI is automatically reset when LSE oscillator is disabled.

Return values

None

Definition at line 2500 of file stm32l4xx_hal_rcc_ex.c.

{
  CLEAR_BIT(RCC->CR, RCC_CR_MSIPLLEN) ;
}

HAL_RCCEx_DisablePLLSAI1()

HAL_StatusTypeDef HAL_RCCEx_DisablePLLSAI1

(

void

)

Disable PLLSAI1.

Return values

HAL

status

Definition at line 2124 of file stm32l4xx_hal_rcc_ex.c.

{
  uint32_t tickstart;
  HAL_StatusTypeDef status = HAL_OK;

  /* Disable the PLLSAI1 */
  __HAL_RCC_PLLSAI1_DISABLE();

  /* Get Start Tick*/
  tickstart = HAL_GetTick();

  /* Wait till PLLSAI1 is ready */
  while(READ_BIT(RCC->CR, RCC_CR_PLLSAI1RDY) != 0U)
  {
    if((HAL_GetTick() - tickstart) > PLLSAI1_TIMEOUT_VALUE)
    {
      status = HAL_TIMEOUT;
      break;
    }
  }

  /* Disable the PLLSAI1 Clock outputs */
  __HAL_RCC_PLLSAI1CLKOUT_DISABLE(RCC_PLLSAI1CFGR_PLLSAI1PEN|RCC_PLLSAI1CFGR_PLLSAI1QEN|RCC_PLLSAI1CFGR_PLLSAI1REN);

  /* Reset PLL source to save power if no PLLs on */
#if defined(RCC_PLLSAI2_SUPPORT)
  if(READ_BIT(RCC->CR, (RCC_CR_PLLRDY | RCC_CR_PLLSAI2RDY)) == 0U)
  {
    MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, RCC_PLLSOURCE_NONE);
  }
#else
  if(READ_BIT(RCC->CR, RCC_CR_PLLRDY) == 0U)
  {
    MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, RCC_PLLSOURCE_NONE);
  }
#endif /* RCC_PLLSAI2_SUPPORT */

  return status;
}

HAL_RCCEx_DisablePLLSAI2()

HAL_StatusTypeDef HAL_RCCEx_DisablePLLSAI2

(

void

)

Disable PLLISAI2.

Return values

HAL

status

Definition at line 2252 of file stm32l4xx_hal_rcc_ex.c.

{
  uint32_t tickstart;
  HAL_StatusTypeDef status = HAL_OK;

  /* Disable the PLLSAI2 */
  __HAL_RCC_PLLSAI2_DISABLE();

  /* Get Start Tick*/
  tickstart = HAL_GetTick();

  /* Wait till PLLSAI2 is ready */
  while(READ_BIT(RCC->CR, RCC_CR_PLLSAI2RDY) != 0U)
  {
    if((HAL_GetTick() - tickstart) > PLLSAI2_TIMEOUT_VALUE)
    {
      status = HAL_TIMEOUT;
      break;
    }
  }

  /* Disable the PLLSAI2 Clock outputs */
#if defined(RCC_PLLSAI2Q_DIV_SUPPORT)
  __HAL_RCC_PLLSAI2CLKOUT_DISABLE(RCC_PLLSAI2CFGR_PLLSAI2PEN|RCC_PLLSAI2CFGR_PLLSAI2QEN|RCC_PLLSAI2CFGR_PLLSAI2REN);
#else
  __HAL_RCC_PLLSAI2CLKOUT_DISABLE(RCC_PLLSAI2CFGR_PLLSAI2PEN|RCC_PLLSAI2CFGR_PLLSAI2REN);
#endif /* RCC_PLLSAI2M_DIV_1_16_SUPPORT && RCC_PLLSAI2Q_DIV_SUPPORT */

  /* Reset PLL source to save power if no PLLs on */
  if(READ_BIT(RCC->CR, (RCC_CR_PLLRDY | RCC_CR_PLLSAI1RDY)) == 0U)
  {
    MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, RCC_PLLSOURCE_NONE);
  }

  return status;
}

HAL_RCCEx_EnableLSCO()

void HAL_RCCEx_EnableLSCO

(

uint32_t

LSCOSource

)

Select the Low Speed clock source to output on LSCO pin (PA2).

Parameters

LSCOSource

specifies the Low Speed clock source to output. This parameter can be one of the following values: RCC_LSCOSOURCE_LSI LSI clock selected as LSCO source RCC_LSCOSOURCE_LSE LSE clock selected as LSCO source

Return values

None

Definition at line 2405 of file stm32l4xx_hal_rcc_ex.c.

{
  GPIO_InitTypeDef GPIO_InitStruct;
  FlagStatus       pwrclkchanged = RESET;
  FlagStatus       backupchanged = RESET;

  /* Check the parameters */
  assert_param(IS_RCC_LSCOSOURCE(LSCOSource));

  /* LSCO Pin Clock Enable */
  __LSCO_CLK_ENABLE();

  /* Configue the LSCO pin in analog mode */
  GPIO_InitStruct.Pin = LSCO_PIN;
  GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  HAL_GPIO_Init(LSCO_GPIO_PORT, &GPIO_InitStruct);

  /* Update LSCOSEL clock source in Backup Domain control register */
  if(__HAL_RCC_PWR_IS_CLK_DISABLED())
  {
    __HAL_RCC_PWR_CLK_ENABLE();
    pwrclkchanged = SET;
  }
  if(HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP))
  {
    HAL_PWR_EnableBkUpAccess();
    backupchanged = SET;
  }

  MODIFY_REG(RCC->BDCR, RCC_BDCR_LSCOSEL | RCC_BDCR_LSCOEN, LSCOSource | RCC_BDCR_LSCOEN);

  if(backupchanged == SET)
  {
    HAL_PWR_DisableBkUpAccess();
  }
  if(pwrclkchanged == SET)
  {
    __HAL_RCC_PWR_CLK_DISABLE();
  }
}

HAL_RCCEx_EnableLSECSS()

void HAL_RCCEx_EnableLSECSS

(

void

)

Enable the LSE Clock Security System.

Note

Prior to enable the LSE Clock Security System, LSE oscillator is to be enabled with HAL_RCC_OscConfig() and the LSE oscillator clock is to be selected as RTC clock with HAL_RCCEx_PeriphCLKConfig().

Return values

None

Definition at line 2333 of file stm32l4xx_hal_rcc_ex.c.

{
  SET_BIT(RCC->BDCR, RCC_BDCR_LSECSSON) ;
}

HAL_RCCEx_EnableLSECSS_IT()

void HAL_RCCEx_EnableLSECSS_IT

(

void

)

Enable the LSE Clock Security System Interrupt & corresponding EXTI line.

Note

LSE Clock Security System Interrupt is mapped on RTC EXTI line 19

Return values

None

Definition at line 2356 of file stm32l4xx_hal_rcc_ex.c.

{
  /* Enable LSE CSS */
  SET_BIT(RCC->BDCR, RCC_BDCR_LSECSSON) ;

  /* Enable LSE CSS IT */
  __HAL_RCC_ENABLE_IT(RCC_IT_LSECSS);

  /* Enable IT on EXTI Line 19 */
  __HAL_RCC_LSECSS_EXTI_ENABLE_IT();
  __HAL_RCC_LSECSS_EXTI_ENABLE_RISING_EDGE();
}

HAL_RCCEx_EnableMSIPLLMode()

void HAL_RCCEx_EnableMSIPLLMode

(

void

)

Enable the PLL-mode of the MSI.

Note

Prior to enable the PLL-mode of the MSI for automatic hardware calibration LSE oscillator is to be enabled with HAL_RCC_OscConfig().

Return values

None

Definition at line 2490 of file stm32l4xx_hal_rcc_ex.c.

{
  SET_BIT(RCC->CR, RCC_CR_MSIPLLEN) ;
}

HAL_RCCEx_EnablePLLSAI1()

HAL_StatusTypeDef HAL_RCCEx_EnablePLLSAI1

(

RCC_PLLSAI1InitTypeDef *

PLLSAI1Init

)

Enable PLLSAI1.

Parameters

PLLSAI1Init

pointer to an RCC_PLLSAI1InitTypeDef structure that contains the configuration information for the PLLSAI1

Return values

HAL

status

Definition at line 2056 of file stm32l4xx_hal_rcc_ex.c.

{
  uint32_t tickstart;
  HAL_StatusTypeDef status = HAL_OK;

  /* check for PLLSAI1 Parameters used to output PLLSAI1CLK */
  assert_param(IS_RCC_PLLSAI1SOURCE(PLLSAI1Init->PLLSAI1Source));
  assert_param(IS_RCC_PLLSAI1M_VALUE(PLLSAI1Init->PLLSAI1M));
  assert_param(IS_RCC_PLLSAI1N_VALUE(PLLSAI1Init->PLLSAI1N));
  assert_param(IS_RCC_PLLSAI1P_VALUE(PLLSAI1Init->PLLSAI1P));
  assert_param(IS_RCC_PLLSAI1Q_VALUE(PLLSAI1Init->PLLSAI1Q));
  assert_param(IS_RCC_PLLSAI1R_VALUE(PLLSAI1Init->PLLSAI1R));
  assert_param(IS_RCC_PLLSAI1CLOCKOUT_VALUE(PLLSAI1Init->PLLSAI1ClockOut));

  /* Disable the PLLSAI1 */
  __HAL_RCC_PLLSAI1_DISABLE();

  /* Get Start Tick*/
  tickstart = HAL_GetTick();

  /* Wait till PLLSAI1 is ready to be updated */
  while(READ_BIT(RCC->CR, RCC_CR_PLLSAI1RDY) != 0U)
  {
    if((HAL_GetTick() - tickstart) > PLLSAI1_TIMEOUT_VALUE)
    {
      status = HAL_TIMEOUT;
      break;
    }
  }

  if(status == HAL_OK)
  {
#if defined(RCC_PLLSAI1M_DIV_1_16_SUPPORT)
    /* Configure the PLLSAI1 Multiplication factor N */
    /* Configure the PLLSAI1 Division factors M, P, Q and R */
    __HAL_RCC_PLLSAI1_CONFIG(PLLSAI1Init->PLLSAI1M, PLLSAI1Init->PLLSAI1N, PLLSAI1Init->PLLSAI1P, PLLSAI1Init->PLLSAI1Q, PLLSAI1Init->PLLSAI1R);
#else
    /* Configure the PLLSAI1 Multiplication factor N */
    /* Configure the PLLSAI1 Division factors P, Q and R */
    __HAL_RCC_PLLSAI1_CONFIG(PLLSAI1Init->PLLSAI1N, PLLSAI1Init->PLLSAI1P, PLLSAI1Init->PLLSAI1Q, PLLSAI1Init->PLLSAI1R);
#endif /* RCC_PLLSAI1M_DIV_1_16_SUPPORT */
    /* Configure the PLLSAI1 Clock output(s) */
    __HAL_RCC_PLLSAI1CLKOUT_ENABLE(PLLSAI1Init->PLLSAI1ClockOut);

    /* Enable the PLLSAI1 again by setting PLLSAI1ON to 1*/
    __HAL_RCC_PLLSAI1_ENABLE();

    /* Get Start Tick*/
    tickstart = HAL_GetTick();

    /* Wait till PLLSAI1 is ready */
    while(READ_BIT(RCC->CR, RCC_CR_PLLSAI1RDY) == 0U)
    {
      if((HAL_GetTick() - tickstart) > PLLSAI1_TIMEOUT_VALUE)
      {
        status = HAL_TIMEOUT;
        break;
      }
    }
  }

  return status;
}

HAL_RCCEx_EnablePLLSAI2()

HAL_StatusTypeDef HAL_RCCEx_EnablePLLSAI2

(

RCC_PLLSAI2InitTypeDef *

PLLSAI2Init

)

Enable PLLSAI2.

Parameters

PLLSAI2Init

pointer to an RCC_PLLSAI2InitTypeDef structure that contains the configuration information for the PLLSAI2

Return values

HAL

status

Definition at line 2174 of file stm32l4xx_hal_rcc_ex.c.

{
  uint32_t tickstart;
  HAL_StatusTypeDef status = HAL_OK;

  /* check for PLLSAI2 Parameters used to output PLLSAI2CLK */
  assert_param(IS_RCC_PLLSAI2SOURCE(PLLSAI2Init->PLLSAI2Source));
  assert_param(IS_RCC_PLLSAI2M_VALUE(PLLSAI2Init->PLLSAI2M));
  assert_param(IS_RCC_PLLSAI2N_VALUE(PLLSAI2Init->PLLSAI2N));
  assert_param(IS_RCC_PLLSAI2P_VALUE(PLLSAI2Init->PLLSAI2P));
#if defined(RCC_PLLSAI2Q_DIV_SUPPORT)
  assert_param(IS_RCC_PLLSAI2Q_VALUE(PLLSAI2Init->PLLSAI2Q));
#endif /* RCC_PLLSAI2Q_DIV_SUPPORT */
  assert_param(IS_RCC_PLLSAI2R_VALUE(PLLSAI2Init->PLLSAI2R));
  assert_param(IS_RCC_PLLSAI2CLOCKOUT_VALUE(PLLSAI2Init->PLLSAI2ClockOut));

  /* Disable the PLLSAI2 */
  __HAL_RCC_PLLSAI2_DISABLE();

  /* Get Start Tick*/
  tickstart = HAL_GetTick();

  /* Wait till PLLSAI2 is ready to be updated */
  while(READ_BIT(RCC->CR, RCC_CR_PLLSAI2RDY) != 0U)
  {
    if((HAL_GetTick() - tickstart) > PLLSAI2_TIMEOUT_VALUE)
    {
      status = HAL_TIMEOUT;
      break;
    }
  }

  if(status == HAL_OK)
  {
#if defined(RCC_PLLSAI2M_DIV_1_16_SUPPORT) && defined(RCC_PLLSAI2Q_DIV_SUPPORT)
    /* Configure the PLLSAI2 Multiplication factor N */
    /* Configure the PLLSAI2 Division factors M, P, Q and R */
    __HAL_RCC_PLLSAI2_CONFIG(PLLSAI2Init->PLLSAI2M, PLLSAI2Init->PLLSAI2N, PLLSAI2Init->PLLSAI2P, PLLSAI2Init->PLLSAI2Q, PLLSAI2Init->PLLSAI2R);
#elif defined(RCC_PLLSAI2M_DIV_1_16_SUPPORT)
    /* Configure the PLLSAI2 Multiplication factor N */
    /* Configure the PLLSAI2 Division factors M, P and R */
    __HAL_RCC_PLLSAI2_CONFIG(PLLSAI2Init->PLLSAI2M, PLLSAI2Init->PLLSAI2N, PLLSAI2Init->PLLSAI2P, PLLSAI2Init->PLLSAI2R);
#elif defined(RCC_PLLSAI2Q_DIV_SUPPORT)
    /* Configure the PLLSAI2 Multiplication factor N */
    /* Configure the PLLSAI2 Division factors P, Q and R */
    __HAL_RCC_PLLSAI2_CONFIG(PLLSAI2Init->PLLSAI2N, PLLSAI2Init->PLLSAI2P, PLLSAI2Init->PLLSAI2Q, PLLSAI2Init->PLLSAI2R);
#else
    /* Configure the PLLSAI2 Multiplication factor N */
    /* Configure the PLLSAI2 Division factors P and R */
    __HAL_RCC_PLLSAI2_CONFIG(PLLSAI2Init->PLLSAI2N, PLLSAI2Init->PLLSAI2P, PLLSAI2Init->PLLSAI2R);
#endif /* RCC_PLLSAI2M_DIV_1_16_SUPPORT && RCC_PLLSAI2Q_DIV_SUPPORT */
    /* Configure the PLLSAI2 Clock output(s) */
    __HAL_RCC_PLLSAI2CLKOUT_ENABLE(PLLSAI2Init->PLLSAI2ClockOut);

    /* Enable the PLLSAI2 again by setting PLLSAI2ON to 1*/
    __HAL_RCC_PLLSAI2_ENABLE();

    /* Get Start Tick*/
    tickstart = HAL_GetTick();

    /* Wait till PLLSAI2 is ready */
    while(READ_BIT(RCC->CR, RCC_CR_PLLSAI2RDY) == 0U)
    {
      if((HAL_GetTick() - tickstart) > PLLSAI2_TIMEOUT_VALUE)
      {
        status = HAL_TIMEOUT;
        break;
      }
    }
  }

  return status;
}

HAL_RCCEx_LSECSS_Callback()

__weak void HAL_RCCEx_LSECSS_Callback

(

void

)

RCCEx LSE Clock Security System interrupt callback.

Return values

none

Definition at line 2390 of file stm32l4xx_hal_rcc_ex.c.

{
  /* NOTE : This function should not be modified, when the callback is needed,
            the @ref HAL_RCCEx_LSECSS_Callback should be implemented in the user file
   */
}

HAL_RCCEx_LSECSS_IRQHandler()

void HAL_RCCEx_LSECSS_IRQHandler

(

void

)

Handle the RCC LSE Clock Security System interrupt request.

Return values

None

Definition at line 2373 of file stm32l4xx_hal_rcc_ex.c.

{
  /* Check RCC LSE CSSF flag  */
  if(__HAL_RCC_GET_IT(RCC_IT_LSECSS))
  {
    /* RCC LSE Clock Security System interrupt user callback */
    HAL_RCCEx_LSECSS_Callback();

    /* Clear RCC LSE CSS pending bit */
    __HAL_RCC_CLEAR_IT(RCC_IT_LSECSS);
  }
}

HAL_RCCEx_StandbyMSIRangeConfig()

void HAL_RCCEx_StandbyMSIRangeConfig

(

uint32_t

MSIRange

)

Configure the MSI range after standby mode.

Note

After Standby its frequency can be selected between 4 possible values (1, 2, 4 or 8 MHz).

Parameters

MSIRange

MSI range This parameter can be one of the following values: RCC_MSIRANGE_4 Range 4 around 1 MHz RCC_MSIRANGE_5 Range 5 around 2 MHz RCC_MSIRANGE_6 Range 6 around 4 MHz (reset value) RCC_MSIRANGE_7 Range 7 around 8 MHz

Return values

None

Definition at line 2319 of file stm32l4xx_hal_rcc_ex.c.

{
  assert_param(IS_RCC_MSI_STANDBY_CLOCK_RANGE(MSIRange));

  __HAL_RCC_MSI_STANDBY_RANGE_CONFIG(MSIRange);
}

HAL_RCCEx_WakeUpStopCLKConfig()

void HAL_RCCEx_WakeUpStopCLKConfig

(

uint32_t

WakeUpClk

)

Configure the oscillator clock source for wakeup from Stop and CSS backup clock.

Parameters

WakeUpClk

Wakeup clock This parameter can be one of the following values: RCC_STOP_WAKEUPCLOCK_MSI MSI oscillator selection RCC_STOP_WAKEUPCLOCK_HSI HSI oscillator selection

Note

This function shall not be called after the Clock Security System on HSE has been enabled.

Return values

None

Definition at line 2301 of file stm32l4xx_hal_rcc_ex.c.

{
  assert_param(IS_RCC_STOP_WAKEUPCLOCK(WakeUpClk));

  __HAL_RCC_WAKEUPSTOP_CLK_CONFIG(WakeUpClk);
}