STM32L4xx_HAL_Driver  1.14.0
Functions
Input Output and memory control functions
STM32L4xx_HAL_Driver » SRAM » SRAM Exported Functions

Input Output and memory control functions. More...

Functions

HAL_StatusTypeDef HAL_SRAM_Read_8b (SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize)
 Read 8-bit buffer from SRAM memory. More...
 
HAL_StatusTypeDef HAL_SRAM_Write_8b (SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize)
 Write 8-bit buffer to SRAM memory. More...
 
HAL_StatusTypeDef HAL_SRAM_Read_16b (SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize)
 Read 16-bit buffer from SRAM memory. More...
 
HAL_StatusTypeDef HAL_SRAM_Write_16b (SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize)
 Write 16-bit buffer to SRAM memory. More...
 
HAL_StatusTypeDef HAL_SRAM_Read_32b (SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize)
 Read 32-bit buffer from SRAM memory. More...
 
HAL_StatusTypeDef HAL_SRAM_Write_32b (SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize)
 Write 32-bit buffer to SRAM memory. More...
 
HAL_StatusTypeDef HAL_SRAM_Read_DMA (SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize)
 Read a Word data buffer from the SRAM memory using DMA transfer. More...
 
HAL_StatusTypeDef HAL_SRAM_Write_DMA (SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize)
 Write a Word data buffer to SRAM memory using DMA transfer. More...
 
void HAL_SRAM_DMA_XferCpltCallback (DMA_HandleTypeDef *hdma)
 DMA transfer complete callback. More...
 
void HAL_SRAM_DMA_XferErrorCallback (DMA_HandleTypeDef *hdma)
 DMA transfer complete error callback. More...
 

Detailed Description

Input Output and memory control functions. 

  ==============================================================================
                  ##### SRAM Input and Output functions #####
  ==============================================================================
  [..]  
    This section provides functions allowing to use and control the SRAM memory

Function Documentation

◆ HAL_SRAM_DMA_XferCpltCallback()

void HAL_SRAM_DMA_XferCpltCallback ( DMA_HandleTypeDef *  hdma)

DMA transfer complete callback.

Parameters
hdmapointer to a SRAM_HandleTypeDef structure that contains the configuration information for SRAM module.
Return values
None

Definition at line 216 of file stm32l4xx_hal_sram.c.

217 {
218  /* Prevent unused argument(s) compilation warning */
219  UNUSED(hdma);
220 
221  /* NOTE : This function should not be modified, when the callback is needed,
222  the HAL_SRAM_DMA_XferCpltCallback could be implemented in the user file
223  */
224 }

◆ HAL_SRAM_DMA_XferErrorCallback()

void HAL_SRAM_DMA_XferErrorCallback ( DMA_HandleTypeDef *  hdma)

DMA transfer complete error callback.

Parameters
hdmapointer to a SRAM_HandleTypeDef structure that contains the configuration information for SRAM module.
Return values
None

Definition at line 232 of file stm32l4xx_hal_sram.c.

233 {
234  /* Prevent unused argument(s) compilation warning */
235  UNUSED(hdma);
236 
237  /* NOTE : This function should not be modified, when the callback is needed,
238  the HAL_SRAM_DMA_XferErrorCallback could be implemented in the user file
239  */
240 }

◆ HAL_SRAM_Read_16b()

HAL_StatusTypeDef HAL_SRAM_Read_16b ( SRAM_HandleTypeDef *  hsram,
uint32_t *  pAddress,
uint16_t *  pDstBuffer,
uint32_t  BufferSize 
)

Read 16-bit buffer from SRAM memory.

Parameters
hsrampointer to a SRAM_HandleTypeDef structure that contains the configuration information for SRAM module.
pAddressPointer to read start address
pDstBufferPointer to destination buffer
BufferSizeSize of the buffer to read from memory
Return values
HALstatus

Definition at line 347 of file stm32l4xx_hal_sram.c.

348 {
349  __IO uint16_t * psramaddress = (uint16_t *)pAddress;
350 
351  /* Process Locked */
352  __HAL_LOCK(hsram);
353 
354  /* Update the SRAM controller state */
355  hsram->State = HAL_SRAM_STATE_BUSY;
356 
357  /* Read data from memory */
358  for(; BufferSize != 0; BufferSize--)
359  {
360  *pDstBuffer = *(__IO uint16_t *)psramaddress;
361  pDstBuffer++;
362  psramaddress++;
363  }
364 
365  /* Update the SRAM controller state */
366  hsram->State = HAL_SRAM_STATE_READY;
367 
368  /* Process unlocked */
369  __HAL_UNLOCK(hsram);
370 
371  return HAL_OK;
372 }
__HAL_UNLOCK
__HAL_UNLOCK(hrtc)
__HAL_LOCK
__HAL_LOCK(hrtc)
HAL_OK
return HAL_OK
Definition: stm32l4xx_hal_rtc_ex.c:885
SRAM_HandleTypeDef::State
__IO HAL_SRAM_StateTypeDef State
Definition: stm32l4xx_hal_sram.h:70

◆ HAL_SRAM_Read_32b()

HAL_StatusTypeDef HAL_SRAM_Read_32b ( SRAM_HandleTypeDef *  hsram,
uint32_t *  pAddress,
uint32_t *  pDstBuffer,
uint32_t  BufferSize 
)

Read 32-bit buffer from SRAM memory.

Parameters
hsrampointer to a SRAM_HandleTypeDef structure that contains the configuration information for SRAM module.
pAddressPointer to read start address
pDstBufferPointer to destination buffer
BufferSizeSize of the buffer to read from memory
Return values
HALstatus

Definition at line 425 of file stm32l4xx_hal_sram.c.

426 {
427  /* Process Locked */
428  __HAL_LOCK(hsram);
429 
430  /* Update the SRAM controller state */
431  hsram->State = HAL_SRAM_STATE_BUSY;
432 
433  /* Read data from memory */
434  for(; BufferSize != 0; BufferSize--)
435  {
436  *pDstBuffer = *(__IO uint32_t *)pAddress;
437  pDstBuffer++;
438  pAddress++;
439  }
440 
441  /* Update the SRAM controller state */
442  hsram->State = HAL_SRAM_STATE_READY;
443 
444  /* Process unlocked */
445  __HAL_UNLOCK(hsram);
446 
447  return HAL_OK;
448 }
__HAL_UNLOCK
__HAL_UNLOCK(hrtc)
__HAL_LOCK
__HAL_LOCK(hrtc)
HAL_OK
return HAL_OK
Definition: stm32l4xx_hal_rtc_ex.c:885
SRAM_HandleTypeDef::State
__IO HAL_SRAM_StateTypeDef State
Definition: stm32l4xx_hal_sram.h:70

◆ HAL_SRAM_Read_8b()

HAL_StatusTypeDef HAL_SRAM_Read_8b ( SRAM_HandleTypeDef *  hsram,
uint32_t *  pAddress,
uint8_t *  pDstBuffer,
uint32_t  BufferSize 
)

Read 8-bit buffer from SRAM memory.

Parameters
hsrampointer to a SRAM_HandleTypeDef structure that contains the configuration information for SRAM module.
pAddressPointer to read start address
pDstBufferPointer to destination buffer
BufferSizeSize of the buffer to read from memory
Return values
HALstatus

Definition at line 269 of file stm32l4xx_hal_sram.c.

270 {
271  __IO uint8_t * psramaddress = (uint8_t *)pAddress;
272 
273  /* Process Locked */
274  __HAL_LOCK(hsram);
275 
276  /* Update the SRAM controller state */
277  hsram->State = HAL_SRAM_STATE_BUSY;
278 
279  /* Read data from memory */
280  for(; BufferSize != 0; BufferSize--)
281  {
282  *pDstBuffer = *(__IO uint8_t *)psramaddress;
283  pDstBuffer++;
284  psramaddress++;
285  }
286 
287  /* Update the SRAM controller state */
288  hsram->State = HAL_SRAM_STATE_READY;
289 
290  /* Process unlocked */
291  __HAL_UNLOCK(hsram);
292 
293  return HAL_OK;
294 }
__HAL_UNLOCK
__HAL_UNLOCK(hrtc)
__HAL_LOCK
__HAL_LOCK(hrtc)
HAL_OK
return HAL_OK
Definition: stm32l4xx_hal_rtc_ex.c:885
SRAM_HandleTypeDef::State
__IO HAL_SRAM_StateTypeDef State
Definition: stm32l4xx_hal_sram.h:70

◆ HAL_SRAM_Read_DMA()

HAL_StatusTypeDef HAL_SRAM_Read_DMA ( SRAM_HandleTypeDef *  hsram,
uint32_t *  pAddress,
uint32_t *  pDstBuffer,
uint32_t  BufferSize 
)

Read a Word data buffer from the SRAM memory using DMA transfer.

Parameters
hsrampointer to a SRAM_HandleTypeDef structure that contains the configuration information for SRAM module.
pAddressPointer to read start address
pDstBufferPointer to destination buffer
BufferSizeSize of the buffer to read from memory
Return values
HALstatus

Definition at line 499 of file stm32l4xx_hal_sram.c.

500 {
501  /* Process Locked */
502  __HAL_LOCK(hsram);
503 
504  /* Update the SRAM controller state */
505  hsram->State = HAL_SRAM_STATE_BUSY;
506 
507  /* Configure DMA user callbacks */
508  hsram->hdma->XferCpltCallback = HAL_SRAM_DMA_XferCpltCallback;
509  hsram->hdma->XferErrorCallback = HAL_SRAM_DMA_XferErrorCallback;
510 
511  /* Enable the DMA Channel */
512  HAL_DMA_Start_IT(hsram->hdma, (uint32_t)pAddress, (uint32_t)pDstBuffer, (uint32_t)BufferSize);
513 
514  /* Update the SRAM controller state */
515  hsram->State = HAL_SRAM_STATE_READY;
516 
517  /* Process unlocked */
518  __HAL_UNLOCK(hsram);
519 
520  return HAL_OK;
521 }
SRAM_HandleTypeDef::hdma
DMA_HandleTypeDef * hdma
Definition: stm32l4xx_hal_sram.h:72
__DMA_HandleTypeDef::XferCpltCallback
void(* XferCpltCallback)(struct __DMA_HandleTypeDef *hdma)
Definition: stm32l4xx_hal_dma.h:125
HAL_SRAM_DMA_XferCpltCallback
__weak void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma)
DMA transfer complete callback.
Definition: stm32l4xx_hal_sram.c:216
__DMA_HandleTypeDef::XferErrorCallback
void(* XferErrorCallback)(struct __DMA_HandleTypeDef *hdma)
Definition: stm32l4xx_hal_dma.h:129
__HAL_UNLOCK
__HAL_UNLOCK(hrtc)
HAL_DMA_Start_IT
HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
Start the DMA Transfer with interrupt enabled.
Definition: stm32l4xx_hal_dma.c:473
__HAL_LOCK
__HAL_LOCK(hrtc)
HAL_OK
return HAL_OK
Definition: stm32l4xx_hal_rtc_ex.c:885
HAL_SRAM_DMA_XferErrorCallback
__weak void HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma)
DMA transfer complete error callback.
Definition: stm32l4xx_hal_sram.c:232
SRAM_HandleTypeDef::State
__IO HAL_SRAM_StateTypeDef State
Definition: stm32l4xx_hal_sram.h:70

◆ HAL_SRAM_Write_16b()

HAL_StatusTypeDef HAL_SRAM_Write_16b ( SRAM_HandleTypeDef *  hsram,
uint32_t *  pAddress,
uint16_t *  pSrcBuffer,
uint32_t  BufferSize 
)

Write 16-bit buffer to SRAM memory.

Parameters
hsrampointer to a SRAM_HandleTypeDef structure that contains the configuration information for SRAM module.
pAddressPointer to write start address
pSrcBufferPointer to source buffer to write
BufferSizeSize of the buffer to write to memory
Return values
HALstatus

Definition at line 383 of file stm32l4xx_hal_sram.c.

384 {
385  __IO uint16_t * psramaddress = (uint16_t *)pAddress;
386 
387  /* Check the SRAM controller state */
388  if(hsram->State == HAL_SRAM_STATE_PROTECTED)
389  {
390  return HAL_ERROR;
391  }
392 
393  /* Process Locked */
394  __HAL_LOCK(hsram);
395 
396  /* Update the SRAM controller state */
397  hsram->State = HAL_SRAM_STATE_BUSY;
398 
399  /* Write data to memory */
400  for(; BufferSize != 0; BufferSize--)
401  {
402  *(__IO uint16_t *)psramaddress = *pSrcBuffer;
403  pSrcBuffer++;
404  psramaddress++;
405  }
406 
407  /* Update the SRAM controller state */
408  hsram->State = HAL_SRAM_STATE_READY;
409 
410  /* Process unlocked */
411  __HAL_UNLOCK(hsram);
412 
413  return HAL_OK;
414 }
__HAL_UNLOCK
__HAL_UNLOCK(hrtc)
__HAL_LOCK
__HAL_LOCK(hrtc)
HAL_OK
return HAL_OK
Definition: stm32l4xx_hal_rtc_ex.c:885
SRAM_HandleTypeDef::State
__IO HAL_SRAM_StateTypeDef State
Definition: stm32l4xx_hal_sram.h:70

◆ HAL_SRAM_Write_32b()

HAL_StatusTypeDef HAL_SRAM_Write_32b ( SRAM_HandleTypeDef *  hsram,
uint32_t *  pAddress,
uint32_t *  pSrcBuffer,
uint32_t  BufferSize 
)

Write 32-bit buffer to SRAM memory.

Parameters
hsrampointer to a SRAM_HandleTypeDef structure that contains the configuration information for SRAM module.
pAddressPointer to write start address
pSrcBufferPointer to source buffer to write
BufferSizeSize of the buffer to write to memory
Return values
HALstatus

Definition at line 459 of file stm32l4xx_hal_sram.c.

460 {
461  /* Check the SRAM controller state */
462  if(hsram->State == HAL_SRAM_STATE_PROTECTED)
463  {
464  return HAL_ERROR;
465  }
466 
467  /* Process Locked */
468  __HAL_LOCK(hsram);
469 
470  /* Update the SRAM controller state */
471  hsram->State = HAL_SRAM_STATE_BUSY;
472 
473  /* Write data to memory */
474  for(; BufferSize != 0; BufferSize--)
475  {
476  *(__IO uint32_t *)pAddress = *pSrcBuffer;
477  pSrcBuffer++;
478  pAddress++;
479  }
480 
481  /* Update the SRAM controller state */
482  hsram->State = HAL_SRAM_STATE_READY;
483 
484  /* Process unlocked */
485  __HAL_UNLOCK(hsram);
486 
487  return HAL_OK;
488 }
__HAL_UNLOCK
__HAL_UNLOCK(hrtc)
__HAL_LOCK
__HAL_LOCK(hrtc)
HAL_OK
return HAL_OK
Definition: stm32l4xx_hal_rtc_ex.c:885
SRAM_HandleTypeDef::State
__IO HAL_SRAM_StateTypeDef State
Definition: stm32l4xx_hal_sram.h:70

◆ HAL_SRAM_Write_8b()

HAL_StatusTypeDef HAL_SRAM_Write_8b ( SRAM_HandleTypeDef *  hsram,
uint32_t *  pAddress,
uint8_t *  pSrcBuffer,
uint32_t  BufferSize 
)

Write 8-bit buffer to SRAM memory.

Parameters
hsrampointer to a SRAM_HandleTypeDef structure that contains the configuration information for SRAM module.
pAddressPointer to write start address
pSrcBufferPointer to source buffer to write
BufferSizeSize of the buffer to write to memory
Return values
HALstatus

Definition at line 305 of file stm32l4xx_hal_sram.c.

306 {
307  __IO uint8_t * psramaddress = (uint8_t *)pAddress;
308 
309  /* Check the SRAM controller state */
310  if(hsram->State == HAL_SRAM_STATE_PROTECTED)
311  {
312  return HAL_ERROR;
313  }
314 
315  /* Process Locked */
316  __HAL_LOCK(hsram);
317 
318  /* Update the SRAM controller state */
319  hsram->State = HAL_SRAM_STATE_BUSY;
320 
321  /* Write data to memory */
322  for(; BufferSize != 0; BufferSize--)
323  {
324  *(__IO uint8_t *)psramaddress = *pSrcBuffer;
325  pSrcBuffer++;
326  psramaddress++;
327  }
328 
329  /* Update the SRAM controller state */
330  hsram->State = HAL_SRAM_STATE_READY;
331 
332  /* Process unlocked */
333  __HAL_UNLOCK(hsram);
334 
335  return HAL_OK;
336 }
__HAL_UNLOCK
__HAL_UNLOCK(hrtc)
__HAL_LOCK
__HAL_LOCK(hrtc)
HAL_OK
return HAL_OK
Definition: stm32l4xx_hal_rtc_ex.c:885
SRAM_HandleTypeDef::State
__IO HAL_SRAM_StateTypeDef State
Definition: stm32l4xx_hal_sram.h:70

◆ HAL_SRAM_Write_DMA()

HAL_StatusTypeDef HAL_SRAM_Write_DMA ( SRAM_HandleTypeDef *  hsram,
uint32_t *  pAddress,
uint32_t *  pSrcBuffer,
uint32_t  BufferSize 
)

Write a Word data buffer to SRAM memory using DMA transfer.

Parameters
hsrampointer to a SRAM_HandleTypeDef structure that contains the configuration information for SRAM module.
pAddressPointer to write start address
pSrcBufferPointer to source buffer to write
BufferSizeSize of the buffer to write to memory
Return values
HALstatus

Definition at line 532 of file stm32l4xx_hal_sram.c.

533 {
534  /* Check the SRAM controller state */
535  if(hsram->State == HAL_SRAM_STATE_PROTECTED)
536  {
537  return HAL_ERROR;
538  }
539 
540  /* Process Locked */
541  __HAL_LOCK(hsram);
542 
543  /* Update the SRAM controller state */
544  hsram->State = HAL_SRAM_STATE_BUSY;
545 
546  /* Configure DMA user callbacks */
547  hsram->hdma->XferCpltCallback = HAL_SRAM_DMA_XferCpltCallback;
548  hsram->hdma->XferErrorCallback = HAL_SRAM_DMA_XferErrorCallback;
549 
550  /* Enable the DMA Channel */
551  HAL_DMA_Start_IT(hsram->hdma, (uint32_t)pSrcBuffer, (uint32_t)pAddress, (uint32_t)BufferSize);
552 
553  /* Update the SRAM controller state */
554  hsram->State = HAL_SRAM_STATE_READY;
555 
556  /* Process unlocked */
557  __HAL_UNLOCK(hsram);
558 
559  return HAL_OK;
560 }
SRAM_HandleTypeDef::hdma
DMA_HandleTypeDef * hdma
Definition: stm32l4xx_hal_sram.h:72
__DMA_HandleTypeDef::XferCpltCallback
void(* XferCpltCallback)(struct __DMA_HandleTypeDef *hdma)
Definition: stm32l4xx_hal_dma.h:125
HAL_SRAM_DMA_XferCpltCallback
__weak void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma)
DMA transfer complete callback.
Definition: stm32l4xx_hal_sram.c:216
__DMA_HandleTypeDef::XferErrorCallback
void(* XferErrorCallback)(struct __DMA_HandleTypeDef *hdma)
Definition: stm32l4xx_hal_dma.h:129
__HAL_UNLOCK
__HAL_UNLOCK(hrtc)
HAL_DMA_Start_IT
HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
Start the DMA Transfer with interrupt enabled.
Definition: stm32l4xx_hal_dma.c:473
__HAL_LOCK
__HAL_LOCK(hrtc)
HAL_OK
return HAL_OK
Definition: stm32l4xx_hal_rtc_ex.c:885
HAL_SRAM_DMA_XferErrorCallback
__weak void HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma)
DMA transfer complete error callback.
Definition: stm32l4xx_hal_sram.c:232
SRAM_HandleTypeDef::State
__IO HAL_SRAM_StateTypeDef State
Definition: stm32l4xx_hal_sram.h:70