STM32L4xx_HAL_Driver  1.14.0
stm32l4xx_hal_sram.h
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1 
20 /* Define to prevent recursive inclusion -------------------------------------*/
21 #ifndef __STM32L4xx_HAL_SRAM_H
22 #define __STM32L4xx_HAL_SRAM_H
23 
24 #ifdef __cplusplus
25  extern "C" {
26 #endif
27 
28 #if defined(FMC_BANK1)
29 
30 /* Includes ------------------------------------------------------------------*/
31 #include "stm32l4xx_ll_fmc.h"
32 
40 /* Exported typedef ----------------------------------------------------------*/
41 
48 typedef enum
49 {
50  HAL_SRAM_STATE_RESET = 0x00U,
51  HAL_SRAM_STATE_READY = 0x01U,
52  HAL_SRAM_STATE_BUSY = 0x02U,
53  HAL_SRAM_STATE_ERROR = 0x03U,
54  HAL_SRAM_STATE_PROTECTED = 0x04U
55 }HAL_SRAM_StateTypeDef;
56 
60 typedef struct
61 {
62  FMC_NORSRAM_TypeDef *Instance;
64  FMC_NORSRAM_EXTENDED_TypeDef *Extended;
66  FMC_NORSRAM_InitTypeDef Init;
68  HAL_LockTypeDef Lock;
70  __IO HAL_SRAM_StateTypeDef State;
72  DMA_HandleTypeDef *hdma;
73 }SRAM_HandleTypeDef;
74 
79 /* Exported constants --------------------------------------------------------*/
80 /* Exported macro ------------------------------------------------------------*/
81 
90 #define __HAL_SRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SRAM_STATE_RESET)
91 
96 /* Exported functions --------------------------------------------------------*/
105 /* Initialization/de-initialization functions ********************************/
106 HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming);
107 HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram);
108 void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram);
109 void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram);
110 
119 /* I/O operation functions ***************************************************/
120 HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize);
121 HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize);
122 HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize);
123 HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize);
124 HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
125 HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
126 HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
127 HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
128 
129 void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma);
130 void HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma);
131 
140 /* SRAM Control functions ****************************************************/
141 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram);
142 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram);
143 
152 /* SRAM State functions ******************************************************/
153 HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram);
154 
171 #endif /* FMC_BANK1 */
172 
173 #ifdef __cplusplus
174 }
175 #endif
176 
177 #endif /* __STM32L4xx_HAL_SRAM_H */
178 
179 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
HAL_SRAM_DeInit
HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram)
Perform the SRAM device de-initialization sequence.
Definition: stm32l4xx_hal_sram.c:162
SRAM_HandleTypeDef::hdma
DMA_HandleTypeDef * hdma
Definition: stm32l4xx_hal_sram.h:72
HAL_SRAM_MspInit
void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram)
Initialize the SRAM MSP.
Definition: stm32l4xx_hal_sram.c:184
HAL_SRAM_Write_DMA
HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize)
Write a Word data buffer to SRAM memory using DMA transfer.
Definition: stm32l4xx_hal_sram.c:532
SRAM_HandleTypeDef::Lock
HAL_LockTypeDef Lock
Definition: stm32l4xx_hal_sram.h:68
__DMA_HandleTypeDef
DMA handle Structure definition.
Definition: stm32l4xx_hal_dma.h:113
HAL_SRAM_GetState
HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram)
Return the SRAM controller state.
Definition: stm32l4xx_hal_sram.c:655
HAL_SRAM_Init
HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming)
Perform the SRAM device initialization sequence.
Definition: stm32l4xx_hal_sram.c:125
HAL_SRAM_DMA_XferErrorCallback
void HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma)
DMA transfer complete error callback.
Definition: stm32l4xx_hal_sram.c:232
SRAM_HandleTypeDef::Instance
FMC_NORSRAM_TypeDef * Instance
Definition: stm32l4xx_hal_sram.h:62
HAL_SRAM_Write_16b
HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize)
Write 16-bit buffer to SRAM memory.
Definition: stm32l4xx_hal_sram.c:383
FMC_NORSRAM_InitTypeDef
FMC NORSRAM Configuration Structure definition.
Definition: stm32l4xx_ll_fmc.h:161
HAL_SRAM_Read_8b
HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize)
Read 8-bit buffer from SRAM memory.
Definition: stm32l4xx_hal_sram.c:269
HAL_SRAM_Write_32b
HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize)
Write 32-bit buffer to SRAM memory.
Definition: stm32l4xx_hal_sram.c:459
HAL_SRAM_DMA_XferCpltCallback
void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma)
DMA transfer complete callback.
Definition: stm32l4xx_hal_sram.c:216
FMC_NORSRAM_TimingTypeDef
FMC NORSRAM Timing parameters structure definition.
Definition: stm32l4xx_ll_fmc.h:231
SRAM_HandleTypeDef
SRAM handle Structure definition.
Definition: stm32l4xx_hal_sram.h:60
HAL_SRAM_Read_DMA
HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize)
Read a Word data buffer from the SRAM memory using DMA transfer.
Definition: stm32l4xx_hal_sram.c:499
HAL_LockTypeDef
HAL_LockTypeDef
HAL Lock structures definition.
Definition: stm32l4xx_hal_def.h:50
SRAM_HandleTypeDef::Extended
FMC_NORSRAM_EXTENDED_TypeDef * Extended
Definition: stm32l4xx_hal_sram.h:64
stm32l4xx_ll_fmc.h
Header file of FMC HAL module.
HAL_SRAM_Read_16b
HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize)
Read 16-bit buffer from SRAM memory.
Definition: stm32l4xx_hal_sram.c:347
HAL_SRAM_Write_8b
HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize)
Write 8-bit buffer to SRAM memory.
Definition: stm32l4xx_hal_sram.c:305
HAL_SRAM_MspDeInit
void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram)
DeInitialize the SRAM MSP.
Definition: stm32l4xx_hal_sram.c:200
SRAM_HandleTypeDef::Init
FMC_NORSRAM_InitTypeDef Init
Definition: stm32l4xx_hal_sram.h:66
HAL_SRAM_WriteOperation_Enable
HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram)
Enable dynamically SRAM write operation.
Definition: stm32l4xx_hal_sram.c:587
HAL_SRAM_WriteOperation_Disable
HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram)
Disable dynamically SRAM write operation.
Definition: stm32l4xx_hal_sram.c:610
SRAM_HandleTypeDef::State
__IO HAL_SRAM_StateTypeDef State
Definition: stm32l4xx_hal_sram.h:70
HAL_SRAM_Read_32b
HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize)
Read 32-bit buffer from SRAM memory.
Definition: stm32l4xx_hal_sram.c:425