STM32L4xx_HAL_Driver  1.14.0
Functions
Extended Timer Complementary Output Compare functions
STM32L4xx_HAL_Driver » TIMEx » TIM Extended Exported Functions

Timer Complementary Output Compare functions. More...

Functions

HAL_StatusTypeDef HAL_TIMEx_OCN_Start (TIM_HandleTypeDef *htim, uint32_t Channel)
 Starts the TIM Output Compare signal generation on the complementary output. More...
 
HAL_StatusTypeDef HAL_TIMEx_OCN_Stop (TIM_HandleTypeDef *htim, uint32_t Channel)
 Stops the TIM Output Compare signal generation on the complementary output. More...
 
HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT (TIM_HandleTypeDef *htim, uint32_t Channel)
 Starts the TIM Output Compare signal generation in interrupt mode on the complementary output. More...
 
HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT (TIM_HandleTypeDef *htim, uint32_t Channel)
 Stops the TIM Output Compare signal generation in interrupt mode on the complementary output. More...
 
HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA (TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
 Starts the TIM Output Compare signal generation in DMA mode on the complementary output. More...
 
HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA (TIM_HandleTypeDef *htim, uint32_t Channel)
 Stops the TIM Output Compare signal generation in DMA mode on the complementary output. More...
 

Detailed Description

Timer Complementary Output Compare functions. 

  ==============================================================================
              ##### Timer Complementary Output Compare functions #####
  ==============================================================================
  [..]
    This section provides functions allowing to:
    (+) Start the Complementary Output Compare/PWM.
    (+) Stop the Complementary Output Compare/PWM.
    (+) Start the Complementary Output Compare/PWM and enable interrupts.
    (+) Stop the Complementary Output Compare/PWM and disable interrupts.
    (+) Start the Complementary Output Compare/PWM and enable DMA transfers.
    (+) Stop the Complementary Output Compare/PWM and disable DMA transfers.

Function Documentation

◆ HAL_TIMEx_OCN_Start()

HAL_StatusTypeDef HAL_TIMEx_OCN_Start ( TIM_HandleTypeDef *  htim,
uint32_t  Channel 
)

Starts the TIM Output Compare signal generation on the complementary output.

Parameters
htimTIM Output Compare handle
ChannelTIM Channel to be enabled This parameter can be one of the following values:
  • TIM_CHANNEL_1: TIM Channel 1 selected
  • TIM_CHANNEL_2: TIM Channel 2 selected
  • TIM_CHANNEL_3: TIM Channel 3 selected
Return values
HALstatus

Definition at line 510 of file stm32l4xx_hal_tim_ex.c.

511 {
512  uint32_t tmpsmcr;
513 
514  /* Check the parameters */
515  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
516 
517  /* Enable the Capture compare channel N */
518  TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
519 
520  /* Enable the Main Output */
521  __HAL_TIM_MOE_ENABLE(htim);
522 
523  /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
524  tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
525  if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
526  {
527  __HAL_TIM_ENABLE(htim);
528  }
529 
530  /* Return function status */
531  return HAL_OK;
532 }
HAL_OK
return HAL_OK
Definition: stm32l4xx_hal_rtc_ex.c:885
TIM_CCxNChannelCmd
static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState)
Enables or disables the TIM Capture Compare Channel xN.
Definition: stm32l4xx_hal_tim_ex.c:2348
assert_param
assert_param(IS_RTC_WAKEUP_CLOCK(WakeUpClock))

◆ HAL_TIMEx_OCN_Start_DMA()

HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA ( TIM_HandleTypeDef *  htim,
uint32_t  Channel,
uint32_t *  pData,
uint16_t  Length 
)

Starts the TIM Output Compare signal generation in DMA mode on the complementary output.

Parameters
htimTIM Output Compare handle
ChannelTIM Channel to be enabled This parameter can be one of the following values:
  • TIM_CHANNEL_1: TIM Channel 1 selected
  • TIM_CHANNEL_2: TIM Channel 2 selected
  • TIM_CHANNEL_3: TIM Channel 3 selected
pDataThe source Buffer address.
LengthThe length of data to be transferred from memory to TIM peripheral
Return values
HALstatus

Definition at line 706 of file stm32l4xx_hal_tim_ex.c.

707 {
708  uint32_t tmpsmcr;
709 
710  /* Check the parameters */
711  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
712 
713  if ((htim->State == HAL_TIM_STATE_BUSY))
714  {
715  return HAL_BUSY;
716  }
717  else if ((htim->State == HAL_TIM_STATE_READY))
718  {
719  if (((uint32_t)pData == 0U) && (Length > 0U))
720  {
721  return HAL_ERROR;
722  }
723  else
724  {
725  htim->State = HAL_TIM_STATE_BUSY;
726  }
727  }
728  else
729  {
730  /* nothing to do */
731  }
732 
733  switch (Channel)
734  {
735  case TIM_CHANNEL_1:
736  {
737  /* Set the DMA compare callbacks */
738  htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt;
739  htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
740 
741  /* Set the DMA error callback */
742  htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
743 
744  /* Enable the DMA channel */
745  if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length) != HAL_OK)
746  {
747  return HAL_ERROR;
748  }
749  /* Enable the TIM Output Compare DMA request */
750  __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
751  break;
752  }
753 
754  case TIM_CHANNEL_2:
755  {
756  /* Set the DMA compare callbacks */
757  htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt;
758  htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
759 
760  /* Set the DMA error callback */
761  htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
762 
763  /* Enable the DMA channel */
764  if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length) != HAL_OK)
765  {
766  return HAL_ERROR;
767  }
768  /* Enable the TIM Output Compare DMA request */
769  __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
770  break;
771  }
772 
773  case TIM_CHANNEL_3:
774  {
775  /* Set the DMA compare callbacks */
776  htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt;
777  htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
778 
779  /* Set the DMA error callback */
780  htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ;
781 
782  /* Enable the DMA channel */
783  if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3, Length) != HAL_OK)
784  {
785  return HAL_ERROR;
786  }
787  /* Enable the TIM Output Compare DMA request */
788  __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
789  break;
790  }
791 
792  default:
793  break;
794  }
795 
796  /* Enable the Capture compare channel N */
797  TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
798 
799  /* Enable the Main Output */
800  __HAL_TIM_MOE_ENABLE(htim);
801 
802  /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
803  tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
804  if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
805  {
806  __HAL_TIM_ENABLE(htim);
807  }
808 
809  /* Return function status */
810  return HAL_OK;
811 }
TIM_DMADelayPulseCplt
void TIM_DMADelayPulseCplt(DMA_HandleTypeDef *hdma)
TIM DMA Delay Pulse complete callback.
Definition: stm32l4xx_hal_tim.c:5714
TIM_DMADelayPulseHalfCplt
void TIM_DMADelayPulseHalfCplt(DMA_HandleTypeDef *hdma)
TIM DMA Delay Pulse half complete callback.
Definition: stm32l4xx_hal_tim.c:5755
HAL_TIM_STATE_READY
Definition: stm32l4xx_hal_tim.h:296
HAL_DMA_Start_IT
HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
Start the DMA Transfer with interrupt enabled.
Definition: stm32l4xx_hal_dma.c:473
TIM_DMAError
void TIM_DMAError(DMA_HandleTypeDef *hdma)
TIM DMA error callback.
Definition: stm32l4xx_hal_tim.c:5696
HAL_OK
return HAL_OK
Definition: stm32l4xx_hal_rtc_ex.c:885
HAL_TIM_STATE_BUSY
Definition: stm32l4xx_hal_tim.h:297
TIM_CCxNChannelCmd
static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState)
Enables or disables the TIM Capture Compare Channel xN.
Definition: stm32l4xx_hal_tim_ex.c:2348
assert_param
assert_param(IS_RTC_WAKEUP_CLOCK(WakeUpClock))

◆ HAL_TIMEx_OCN_Start_IT()

HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT ( TIM_HandleTypeDef *  htim,
uint32_t  Channel 
)

Starts the TIM Output Compare signal generation in interrupt mode on the complementary output.

Parameters
htimTIM OC handle
ChannelTIM Channel to be enabled This parameter can be one of the following values:
  • TIM_CHANNEL_1: TIM Channel 1 selected
  • TIM_CHANNEL_2: TIM Channel 2 selected
  • TIM_CHANNEL_3: TIM Channel 3 selected
Return values
HALstatus

Definition at line 574 of file stm32l4xx_hal_tim_ex.c.

575 {
576  uint32_t tmpsmcr;
577 
578  /* Check the parameters */
579  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
580 
581  switch (Channel)
582  {
583  case TIM_CHANNEL_1:
584  {
585  /* Enable the TIM Output Compare interrupt */
586  __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
587  break;
588  }
589 
590  case TIM_CHANNEL_2:
591  {
592  /* Enable the TIM Output Compare interrupt */
593  __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
594  break;
595  }
596 
597  case TIM_CHANNEL_3:
598  {
599  /* Enable the TIM Output Compare interrupt */
600  __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
601  break;
602  }
603 
604 
605  default:
606  break;
607  }
608 
609  /* Enable the TIM Break interrupt */
610  __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
611 
612  /* Enable the Capture compare channel N */
613  TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
614 
615  /* Enable the Main Output */
616  __HAL_TIM_MOE_ENABLE(htim);
617 
618  /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
619  tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
620  if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
621  {
622  __HAL_TIM_ENABLE(htim);
623  }
624 
625  /* Return function status */
626  return HAL_OK;
627 }
HAL_OK
return HAL_OK
Definition: stm32l4xx_hal_rtc_ex.c:885
TIM_CCxNChannelCmd
static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState)
Enables or disables the TIM Capture Compare Channel xN.
Definition: stm32l4xx_hal_tim_ex.c:2348
assert_param
assert_param(IS_RTC_WAKEUP_CLOCK(WakeUpClock))

◆ HAL_TIMEx_OCN_Stop()

HAL_StatusTypeDef HAL_TIMEx_OCN_Stop ( TIM_HandleTypeDef *  htim,
uint32_t  Channel 
)

Stops the TIM Output Compare signal generation on the complementary output.

Parameters
htimTIM handle
ChannelTIM Channel to be disabled This parameter can be one of the following values:
  • TIM_CHANNEL_1: TIM Channel 1 selected
  • TIM_CHANNEL_2: TIM Channel 2 selected
  • TIM_CHANNEL_3: TIM Channel 3 selected
Return values
HALstatus

Definition at line 545 of file stm32l4xx_hal_tim_ex.c.

546 {
547  /* Check the parameters */
548  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
549 
550  /* Disable the Capture compare channel N */
551  TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
552 
553  /* Disable the Main Output */
554  __HAL_TIM_MOE_DISABLE(htim);
555 
556  /* Disable the Peripheral */
557  __HAL_TIM_DISABLE(htim);
558 
559  /* Return function status */
560  return HAL_OK;
561 }
HAL_OK
return HAL_OK
Definition: stm32l4xx_hal_rtc_ex.c:885
TIM_CCxNChannelCmd
static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState)
Enables or disables the TIM Capture Compare Channel xN.
Definition: stm32l4xx_hal_tim_ex.c:2348
assert_param
assert_param(IS_RTC_WAKEUP_CLOCK(WakeUpClock))

◆ HAL_TIMEx_OCN_Stop_DMA()

HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA ( TIM_HandleTypeDef *  htim,
uint32_t  Channel 
)

Stops the TIM Output Compare signal generation in DMA mode on the complementary output.

Parameters
htimTIM Output Compare handle
ChannelTIM Channel to be disabled This parameter can be one of the following values:
  • TIM_CHANNEL_1: TIM Channel 1 selected
  • TIM_CHANNEL_2: TIM Channel 2 selected
  • TIM_CHANNEL_3: TIM Channel 3 selected
Return values
HALstatus

Definition at line 824 of file stm32l4xx_hal_tim_ex.c.

825 {
826  /* Check the parameters */
827  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
828 
829  switch (Channel)
830  {
831  case TIM_CHANNEL_1:
832  {
833  /* Disable the TIM Output Compare DMA request */
834  __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
835  (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
836  break;
837  }
838 
839  case TIM_CHANNEL_2:
840  {
841  /* Disable the TIM Output Compare DMA request */
842  __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
843  (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]);
844  break;
845  }
846 
847  case TIM_CHANNEL_3:
848  {
849  /* Disable the TIM Output Compare DMA request */
850  __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
851  (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]);
852  break;
853  }
854 
855  default:
856  break;
857  }
858 
859  /* Disable the Capture compare channel N */
860  TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
861 
862  /* Disable the Main Output */
863  __HAL_TIM_MOE_DISABLE(htim);
864 
865  /* Disable the Peripheral */
866  __HAL_TIM_DISABLE(htim);
867 
868  /* Change the htim state */
869  htim->State = HAL_TIM_STATE_READY;
870 
871  /* Return function status */
872  return HAL_OK;
873 }
HAL_DMA_Abort_IT
HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
Aborts the DMA Transfer in Interrupt mode.
Definition: stm32l4xx_hal_dma.c:608
HAL_TIM_STATE_READY
Definition: stm32l4xx_hal_tim.h:296
HAL_OK
return HAL_OK
Definition: stm32l4xx_hal_rtc_ex.c:885
TIM_CCxNChannelCmd
static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState)
Enables or disables the TIM Capture Compare Channel xN.
Definition: stm32l4xx_hal_tim_ex.c:2348
assert_param
assert_param(IS_RTC_WAKEUP_CLOCK(WakeUpClock))

◆ HAL_TIMEx_OCN_Stop_IT()

HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT ( TIM_HandleTypeDef *  htim,
uint32_t  Channel 
)

Stops the TIM Output Compare signal generation in interrupt mode on the complementary output.

Parameters
htimTIM Output Compare handle
ChannelTIM Channel to be disabled This parameter can be one of the following values:
  • TIM_CHANNEL_1: TIM Channel 1 selected
  • TIM_CHANNEL_2: TIM Channel 2 selected
  • TIM_CHANNEL_3: TIM Channel 3 selected
Return values
HALstatus

Definition at line 640 of file stm32l4xx_hal_tim_ex.c.

641 {
642  uint32_t tmpccer;
643  /* Check the parameters */
644  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
645 
646  switch (Channel)
647  {
648  case TIM_CHANNEL_1:
649  {
650  /* Disable the TIM Output Compare interrupt */
651  __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
652  break;
653  }
654 
655  case TIM_CHANNEL_2:
656  {
657  /* Disable the TIM Output Compare interrupt */
658  __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
659  break;
660  }
661 
662  case TIM_CHANNEL_3:
663  {
664  /* Disable the TIM Output Compare interrupt */
665  __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
666  break;
667  }
668 
669  default:
670  break;
671  }
672 
673  /* Disable the Capture compare channel N */
674  TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
675 
676  /* Disable the TIM Break interrupt (only if no more channel is active) */
677  tmpccer = htim->Instance->CCER;
678  if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET)
679  {
680  __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
681  }
682 
683  /* Disable the Main Output */
684  __HAL_TIM_MOE_DISABLE(htim);
685 
686  /* Disable the Peripheral */
687  __HAL_TIM_DISABLE(htim);
688 
689  /* Return function status */
690  return HAL_OK;
691 }
HAL_OK
return HAL_OK
Definition: stm32l4xx_hal_rtc_ex.c:885
TIM_CCxNChannelCmd
static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState)
Enables or disables the TIM Capture Compare Channel xN.
Definition: stm32l4xx_hal_tim_ex.c:2348
assert_param
assert_param(IS_RTC_WAKEUP_CLOCK(WakeUpClock))