STM32L4xx_HAL_Driver  1.14.0
Functions
TIM Output Compare functions
STM32L4xx_HAL_Driver » TIM » TIM Exported Functions

TIM Output Compare functions. More...

Functions

HAL_StatusTypeDef HAL_TIM_OC_Init (TIM_HandleTypeDef *htim)
 Initializes the TIM Output Compare according to the specified parameters in the TIM_HandleTypeDef and initializes the associated handle. More...
 
HAL_StatusTypeDef HAL_TIM_OC_DeInit (TIM_HandleTypeDef *htim)
 DeInitializes the TIM peripheral. More...
 
void HAL_TIM_OC_MspInit (TIM_HandleTypeDef *htim)
 Initializes the TIM Output Compare MSP. More...
 
void HAL_TIM_OC_MspDeInit (TIM_HandleTypeDef *htim)
 DeInitializes TIM Output Compare MSP. More...
 
HAL_StatusTypeDef HAL_TIM_OC_Start (TIM_HandleTypeDef *htim, uint32_t Channel)
 Starts the TIM Output Compare signal generation. More...
 
HAL_StatusTypeDef HAL_TIM_OC_Stop (TIM_HandleTypeDef *htim, uint32_t Channel)
 Stops the TIM Output Compare signal generation. More...
 
HAL_StatusTypeDef HAL_TIM_OC_Start_IT (TIM_HandleTypeDef *htim, uint32_t Channel)
 Starts the TIM Output Compare signal generation in interrupt mode. More...
 
HAL_StatusTypeDef HAL_TIM_OC_Stop_IT (TIM_HandleTypeDef *htim, uint32_t Channel)
 Stops the TIM Output Compare signal generation in interrupt mode. More...
 
HAL_StatusTypeDef HAL_TIM_OC_Start_DMA (TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
 Starts the TIM Output Compare signal generation in DMA mode. More...
 
HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA (TIM_HandleTypeDef *htim, uint32_t Channel)
 Stops the TIM Output Compare signal generation in DMA mode. More...
 

Detailed Description

TIM Output Compare functions. 

  ==============================================================================
                  ##### TIM Output Compare functions #####
  ==============================================================================
  [..]
    This section provides functions allowing to:
    (+) Initialize and configure the TIM Output Compare.
    (+) De-initialize the TIM Output Compare.
    (+) Start the TIM Output Compare.
    (+) Stop the TIM Output Compare.
    (+) Start the TIM Output Compare and enable interrupt.
    (+) Stop the TIM Output Compare and disable interrupt.
    (+) Start the TIM Output Compare and enable DMA transfer.
    (+) Stop the TIM Output Compare and disable DMA transfer.

Function Documentation

◆ HAL_TIM_OC_DeInit()

HAL_StatusTypeDef HAL_TIM_OC_DeInit ( TIM_HandleTypeDef *  htim)

DeInitializes the TIM peripheral.

Parameters
htimTIM Output Compare handle
Return values
HALstatus

Definition at line 652 of file stm32l4xx_hal_tim.c.

653 {
654  /* Check the parameters */
655  assert_param(IS_TIM_INSTANCE(htim->Instance));
656 
657  htim->State = HAL_TIM_STATE_BUSY;
658 
659  /* Disable the TIM Peripheral Clock */
660  __HAL_TIM_DISABLE(htim);
661 
662 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
663  if (htim->OC_MspDeInitCallback == NULL)
664  {
665  htim->OC_MspDeInitCallback = HAL_TIM_OC_MspDeInit;
666  }
667  /* DeInit the low level hardware */
668  htim->OC_MspDeInitCallback(htim);
669 #else
670  /* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */
671  HAL_TIM_OC_MspDeInit(htim);
672 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
673 
674  /* Change TIM state */
675  htim->State = HAL_TIM_STATE_RESET;
676 
677  /* Release Lock */
678  __HAL_UNLOCK(htim);
679 
680  return HAL_OK;
681 }
__HAL_UNLOCK
__HAL_UNLOCK(hrtc)
HAL_OK
return HAL_OK
Definition: stm32l4xx_hal_rtc_ex.c:885
HAL_TIM_STATE_BUSY
Definition: stm32l4xx_hal_tim.h:297
HAL_TIM_OC_MspDeInit
void HAL_TIM_OC_MspDeInit(TIM_HandleTypeDef *htim)
DeInitializes TIM Output Compare MSP.
Definition: stm32l4xx_hal_tim.c:703
HAL_TIM_STATE_RESET
Definition: stm32l4xx_hal_tim.h:295
assert_param
assert_param(IS_RTC_WAKEUP_CLOCK(WakeUpClock))

◆ HAL_TIM_OC_Init()

HAL_StatusTypeDef HAL_TIM_OC_Init ( TIM_HandleTypeDef *  htim)

Initializes the TIM Output Compare according to the specified parameters in the TIM_HandleTypeDef and initializes the associated handle.

Note
Switching from Center Aligned counter mode to Edge counter mode (or reverse) requires a timer reset to avoid unexpected direction due to DIR bit readonly in center aligned mode. Ex: call HAL_TIM_OC_DeInit() before HAL_TIM_OC_Init()
Parameters
htimTIM Output Compare handle
Return values
HALstatus

Definition at line 600 of file stm32l4xx_hal_tim.c.

601 {
602  /* Check the TIM handle allocation */
603  if (htim == NULL)
604  {
605  return HAL_ERROR;
606  }
607 
608  /* Check the parameters */
609  assert_param(IS_TIM_INSTANCE(htim->Instance));
610  assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
611  assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
612  assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
613 
614  if (htim->State == HAL_TIM_STATE_RESET)
615  {
616  /* Allocate lock resource and initialize it */
617  htim->Lock = HAL_UNLOCKED;
618 
619 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
620  /* Reset interrupt callbacks to legacy weak callbacks */
621  TIM_ResetCallback(htim);
622 
623  if (htim->OC_MspInitCallback == NULL)
624  {
625  htim->OC_MspInitCallback = HAL_TIM_OC_MspInit;
626  }
627  /* Init the low level hardware : GPIO, CLOCK, NVIC */
628  htim->OC_MspInitCallback(htim);
629 #else
630  /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
631  HAL_TIM_OC_MspInit(htim);
632 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
633  }
634 
635  /* Set the TIM state */
636  htim->State = HAL_TIM_STATE_BUSY;
637 
638  /* Init the base time for the Output Compare */
639  TIM_Base_SetConfig(htim->Instance, &htim->Init);
640 
641  /* Initialize the TIM state*/
642  htim->State = HAL_TIM_STATE_READY;
643 
644  return HAL_OK;
645 }
HAL_UNLOCKED
Definition: stm32l4xx_hal_def.h:52
TIM_Base_SetConfig
void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure)
Time Base configuration.
Definition: stm32l4xx_hal_tim.c:5951
TIM_ResetCallback
void TIM_ResetCallback(TIM_HandleTypeDef *htim)
Reset interrupt callbacks to the legacy weak callbacks.
Definition: stm32l4xx_hal_tim.c:6872
HAL_TIM_STATE_READY
Definition: stm32l4xx_hal_tim.h:296
HAL_OK
return HAL_OK
Definition: stm32l4xx_hal_rtc_ex.c:885
HAL_TIM_STATE_BUSY
Definition: stm32l4xx_hal_tim.h:297
HAL_TIM_STATE_RESET
Definition: stm32l4xx_hal_tim.h:295
HAL_TIM_OC_MspInit
void HAL_TIM_OC_MspInit(TIM_HandleTypeDef *htim)
Initializes the TIM Output Compare MSP.
Definition: stm32l4xx_hal_tim.c:688
assert_param
assert_param(IS_RTC_WAKEUP_CLOCK(WakeUpClock))

◆ HAL_TIM_OC_MspDeInit()

__weak void HAL_TIM_OC_MspDeInit ( TIM_HandleTypeDef *  htim)

DeInitializes TIM Output Compare MSP.

Parameters
htimTIM Output Compare handle
Return values
None

Definition at line 703 of file stm32l4xx_hal_tim.c.

704 {
705  /* Prevent unused argument(s) compilation warning */
706  UNUSED(htim);
707 
708  /* NOTE : This function should not be modified, when the callback is needed,
709  the HAL_TIM_OC_MspDeInit could be implemented in the user file
710  */
711 }

◆ HAL_TIM_OC_MspInit()

__weak void HAL_TIM_OC_MspInit ( TIM_HandleTypeDef *  htim)

Initializes the TIM Output Compare MSP.

Parameters
htimTIM Output Compare handle
Return values
None

Definition at line 688 of file stm32l4xx_hal_tim.c.

689 {
690  /* Prevent unused argument(s) compilation warning */
691  UNUSED(htim);
692 
693  /* NOTE : This function should not be modified, when the callback is needed,
694  the HAL_TIM_OC_MspInit could be implemented in the user file
695  */
696 }

◆ HAL_TIM_OC_Start()

HAL_StatusTypeDef HAL_TIM_OC_Start ( TIM_HandleTypeDef *  htim,
uint32_t  Channel 
)

Starts the TIM Output Compare signal generation.

Parameters
htimTIM Output Compare handle
ChannelTIM Channel to be enabled This parameter can be one of the following values:
  • TIM_CHANNEL_1: TIM Channel 1 selected
  • TIM_CHANNEL_2: TIM Channel 2 selected
  • TIM_CHANNEL_3: TIM Channel 3 selected
  • TIM_CHANNEL_4: TIM Channel 4 selected
  • TIM_CHANNEL_5: TIM Channel 5 selected
  • TIM_CHANNEL_6: TIM Channel 6 selected
Return values
HALstatus

Definition at line 726 of file stm32l4xx_hal_tim.c.

727 {
728  uint32_t tmpsmcr;
729 
730  /* Check the parameters */
731  assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
732 
733  /* Enable the Output compare channel */
734  TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
735 
736  if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
737  {
738  /* Enable the main output */
739  __HAL_TIM_MOE_ENABLE(htim);
740  }
741 
742  /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
743  tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
744  if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
745  {
746  __HAL_TIM_ENABLE(htim);
747  }
748 
749  /* Return function status */
750  return HAL_OK;
751 }
HAL_OK
return HAL_OK
Definition: stm32l4xx_hal_rtc_ex.c:885
TIM_CCxChannelCmd
void TIM_CCxChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelState)
Enables or disables the TIM Capture Compare Channel x.
Definition: stm32l4xx_hal_tim.c:6848
assert_param
assert_param(IS_RTC_WAKEUP_CLOCK(WakeUpClock))

◆ HAL_TIM_OC_Start_DMA()

HAL_StatusTypeDef HAL_TIM_OC_Start_DMA ( TIM_HandleTypeDef *  htim,
uint32_t  Channel,
uint32_t *  pData,
uint16_t  Length 
)

Starts the TIM Output Compare signal generation in DMA mode.

Parameters
htimTIM Output Compare handle
ChannelTIM Channel to be enabled This parameter can be one of the following values:
  • TIM_CHANNEL_1: TIM Channel 1 selected
  • TIM_CHANNEL_2: TIM Channel 2 selected
  • TIM_CHANNEL_3: TIM Channel 3 selected
  • TIM_CHANNEL_4: TIM Channel 4 selected
pDataThe source Buffer address.
LengthThe length of data to be transferred from memory to TIM peripheral
Return values
HALstatus

Definition at line 938 of file stm32l4xx_hal_tim.c.

939 {
940  uint32_t tmpsmcr;
941 
942  /* Check the parameters */
943  assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
944 
945  if ((htim->State == HAL_TIM_STATE_BUSY))
946  {
947  return HAL_BUSY;
948  }
949  else if ((htim->State == HAL_TIM_STATE_READY))
950  {
951  if ((pData == NULL) && (Length > 0U))
952  {
953  return HAL_ERROR;
954  }
955  else
956  {
957  htim->State = HAL_TIM_STATE_BUSY;
958  }
959  }
960  else
961  {
962  /* nothing to do */
963  }
964 
965  switch (Channel)
966  {
967  case TIM_CHANNEL_1:
968  {
969  /* Set the DMA compare callbacks */
970  htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt;
971  htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
972 
973  /* Set the DMA error callback */
974  htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
975 
976  /* Enable the DMA channel */
977  if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length) != HAL_OK)
978  {
979  return HAL_ERROR;
980  }
981 
982  /* Enable the TIM Capture/Compare 1 DMA request */
983  __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
984  break;
985  }
986 
987  case TIM_CHANNEL_2:
988  {
989  /* Set the DMA compare callbacks */
990  htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt;
991  htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
992 
993  /* Set the DMA error callback */
994  htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
995 
996  /* Enable the DMA channel */
997  if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length) != HAL_OK)
998  {
999  return HAL_ERROR;
1000  }
1001 
1002  /* Enable the TIM Capture/Compare 2 DMA request */
1003  __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
1004  break;
1005  }
1006 
1007  case TIM_CHANNEL_3:
1008  {
1009  /* Set the DMA compare callbacks */
1010  htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt;
1011  htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
1012 
1013  /* Set the DMA error callback */
1014  htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ;
1015 
1016  /* Enable the DMA channel */
1017  if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3, Length) != HAL_OK)
1018  {
1019  return HAL_ERROR;
1020  }
1021  /* Enable the TIM Capture/Compare 3 DMA request */
1022  __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
1023  break;
1024  }
1025 
1026  case TIM_CHANNEL_4:
1027  {
1028  /* Set the DMA compare callbacks */
1029  htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt;
1030  htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
1031 
1032  /* Set the DMA error callback */
1033  htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ;
1034 
1035  /* Enable the DMA channel */
1036  if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length) != HAL_OK)
1037  {
1038  return HAL_ERROR;
1039  }
1040  /* Enable the TIM Capture/Compare 4 DMA request */
1041  __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4);
1042  break;
1043  }
1044 
1045  default:
1046  break;
1047  }
1048 
1049  /* Enable the Output compare channel */
1050  TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
1051 
1052  if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
1053  {
1054  /* Enable the main output */
1055  __HAL_TIM_MOE_ENABLE(htim);
1056  }
1057 
1058  /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
1059  tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
1060  if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
1061  {
1062  __HAL_TIM_ENABLE(htim);
1063  }
1064 
1065  /* Return function status */
1066  return HAL_OK;
1067 }
TIM_DMADelayPulseCplt
void TIM_DMADelayPulseCplt(DMA_HandleTypeDef *hdma)
TIM DMA Delay Pulse complete callback.
Definition: stm32l4xx_hal_tim.c:5714
TIM_DMADelayPulseHalfCplt
void TIM_DMADelayPulseHalfCplt(DMA_HandleTypeDef *hdma)
TIM DMA Delay Pulse half complete callback.
Definition: stm32l4xx_hal_tim.c:5755
HAL_TIM_STATE_READY
Definition: stm32l4xx_hal_tim.h:296
HAL_DMA_Start_IT
HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
Start the DMA Transfer with interrupt enabled.
Definition: stm32l4xx_hal_dma.c:473
TIM_DMAError
void TIM_DMAError(DMA_HandleTypeDef *hdma)
TIM DMA error callback.
Definition: stm32l4xx_hal_tim.c:5696
HAL_OK
return HAL_OK
Definition: stm32l4xx_hal_rtc_ex.c:885
HAL_TIM_STATE_BUSY
Definition: stm32l4xx_hal_tim.h:297
TIM_CCxChannelCmd
void TIM_CCxChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelState)
Enables or disables the TIM Capture Compare Channel x.
Definition: stm32l4xx_hal_tim.c:6848
assert_param
assert_param(IS_RTC_WAKEUP_CLOCK(WakeUpClock))

◆ HAL_TIM_OC_Start_IT()

HAL_StatusTypeDef HAL_TIM_OC_Start_IT ( TIM_HandleTypeDef *  htim,
uint32_t  Channel 
)

Starts the TIM Output Compare signal generation in interrupt mode.

Parameters
htimTIM Output Compare handle
ChannelTIM Channel to be enabled This parameter can be one of the following values:
  • TIM_CHANNEL_1: TIM Channel 1 selected
  • TIM_CHANNEL_2: TIM Channel 2 selected
  • TIM_CHANNEL_3: TIM Channel 3 selected
  • TIM_CHANNEL_4: TIM Channel 4 selected
Return values
HALstatus

Definition at line 798 of file stm32l4xx_hal_tim.c.

799 {
800  uint32_t tmpsmcr;
801 
802  /* Check the parameters */
803  assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
804 
805  switch (Channel)
806  {
807  case TIM_CHANNEL_1:
808  {
809  /* Enable the TIM Capture/Compare 1 interrupt */
810  __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
811  break;
812  }
813 
814  case TIM_CHANNEL_2:
815  {
816  /* Enable the TIM Capture/Compare 2 interrupt */
817  __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
818  break;
819  }
820 
821  case TIM_CHANNEL_3:
822  {
823  /* Enable the TIM Capture/Compare 3 interrupt */
824  __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
825  break;
826  }
827 
828  case TIM_CHANNEL_4:
829  {
830  /* Enable the TIM Capture/Compare 4 interrupt */
831  __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4);
832  break;
833  }
834 
835  default:
836  break;
837  }
838 
839  /* Enable the Output compare channel */
840  TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
841 
842  if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
843  {
844  /* Enable the main output */
845  __HAL_TIM_MOE_ENABLE(htim);
846  }
847 
848  /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
849  tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
850  if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
851  {
852  __HAL_TIM_ENABLE(htim);
853  }
854 
855  /* Return function status */
856  return HAL_OK;
857 }
HAL_OK
return HAL_OK
Definition: stm32l4xx_hal_rtc_ex.c:885
TIM_CCxChannelCmd
void TIM_CCxChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelState)
Enables or disables the TIM Capture Compare Channel x.
Definition: stm32l4xx_hal_tim.c:6848
assert_param
assert_param(IS_RTC_WAKEUP_CLOCK(WakeUpClock))

◆ HAL_TIM_OC_Stop()

HAL_StatusTypeDef HAL_TIM_OC_Stop ( TIM_HandleTypeDef *  htim,
uint32_t  Channel 
)

Stops the TIM Output Compare signal generation.

Parameters
htimTIM Output Compare handle
ChannelTIM Channel to be disabled This parameter can be one of the following values:
  • TIM_CHANNEL_1: TIM Channel 1 selected
  • TIM_CHANNEL_2: TIM Channel 2 selected
  • TIM_CHANNEL_3: TIM Channel 3 selected
  • TIM_CHANNEL_4: TIM Channel 4 selected
  • TIM_CHANNEL_5: TIM Channel 5 selected
  • TIM_CHANNEL_6: TIM Channel 6 selected
Return values
HALstatus

Definition at line 766 of file stm32l4xx_hal_tim.c.

767 {
768  /* Check the parameters */
769  assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
770 
771  /* Disable the Output compare channel */
772  TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
773 
774  if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
775  {
776  /* Disable the Main Output */
777  __HAL_TIM_MOE_DISABLE(htim);
778  }
779 
780  /* Disable the Peripheral */
781  __HAL_TIM_DISABLE(htim);
782 
783  /* Return function status */
784  return HAL_OK;
785 }
HAL_OK
return HAL_OK
Definition: stm32l4xx_hal_rtc_ex.c:885
TIM_CCxChannelCmd
void TIM_CCxChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelState)
Enables or disables the TIM Capture Compare Channel x.
Definition: stm32l4xx_hal_tim.c:6848
assert_param
assert_param(IS_RTC_WAKEUP_CLOCK(WakeUpClock))

◆ HAL_TIM_OC_Stop_DMA()

HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA ( TIM_HandleTypeDef *  htim,
uint32_t  Channel 
)

Stops the TIM Output Compare signal generation in DMA mode.

Parameters
htimTIM Output Compare handle
ChannelTIM Channel to be disabled This parameter can be one of the following values:
  • TIM_CHANNEL_1: TIM Channel 1 selected
  • TIM_CHANNEL_2: TIM Channel 2 selected
  • TIM_CHANNEL_3: TIM Channel 3 selected
  • TIM_CHANNEL_4: TIM Channel 4 selected
Return values
HALstatus

Definition at line 1080 of file stm32l4xx_hal_tim.c.

1081 {
1082  /* Check the parameters */
1083  assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
1084 
1085  switch (Channel)
1086  {
1087  case TIM_CHANNEL_1:
1088  {
1089  /* Disable the TIM Capture/Compare 1 DMA request */
1090  __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
1091  (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
1092  break;
1093  }
1094 
1095  case TIM_CHANNEL_2:
1096  {
1097  /* Disable the TIM Capture/Compare 2 DMA request */
1098  __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
1099  (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]);
1100  break;
1101  }
1102 
1103  case TIM_CHANNEL_3:
1104  {
1105  /* Disable the TIM Capture/Compare 3 DMA request */
1106  __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
1107  (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]);
1108  break;
1109  }
1110 
1111  case TIM_CHANNEL_4:
1112  {
1113  /* Disable the TIM Capture/Compare 4 interrupt */
1114  __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4);
1115  (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC4]);
1116  break;
1117  }
1118 
1119  default:
1120  break;
1121  }
1122 
1123  /* Disable the Output compare channel */
1124  TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
1125 
1126  if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
1127  {
1128  /* Disable the Main Output */
1129  __HAL_TIM_MOE_DISABLE(htim);
1130  }
1131 
1132  /* Disable the Peripheral */
1133  __HAL_TIM_DISABLE(htim);
1134 
1135  /* Change the htim state */
1136  htim->State = HAL_TIM_STATE_READY;
1137 
1138  /* Return function status */
1139  return HAL_OK;
1140 }
HAL_DMA_Abort_IT
HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
Aborts the DMA Transfer in Interrupt mode.
Definition: stm32l4xx_hal_dma.c:608
HAL_TIM_STATE_READY
Definition: stm32l4xx_hal_tim.h:296
HAL_OK
return HAL_OK
Definition: stm32l4xx_hal_rtc_ex.c:885
TIM_CCxChannelCmd
void TIM_CCxChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelState)
Enables or disables the TIM Capture Compare Channel x.
Definition: stm32l4xx_hal_tim.c:6848
assert_param
assert_param(IS_RTC_WAKEUP_CLOCK(WakeUpClock))

◆ HAL_TIM_OC_Stop_IT()

HAL_StatusTypeDef HAL_TIM_OC_Stop_IT ( TIM_HandleTypeDef *  htim,
uint32_t  Channel 
)

Stops the TIM Output Compare signal generation in interrupt mode.

Parameters
htimTIM Output Compare handle
ChannelTIM Channel to be disabled This parameter can be one of the following values:
  • TIM_CHANNEL_1: TIM Channel 1 selected
  • TIM_CHANNEL_2: TIM Channel 2 selected
  • TIM_CHANNEL_3: TIM Channel 3 selected
  • TIM_CHANNEL_4: TIM Channel 4 selected
Return values
HALstatus

Definition at line 870 of file stm32l4xx_hal_tim.c.

871 {
872  /* Check the parameters */
873  assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
874 
875  switch (Channel)
876  {
877  case TIM_CHANNEL_1:
878  {
879  /* Disable the TIM Capture/Compare 1 interrupt */
880  __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
881  break;
882  }
883 
884  case TIM_CHANNEL_2:
885  {
886  /* Disable the TIM Capture/Compare 2 interrupt */
887  __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
888  break;
889  }
890 
891  case TIM_CHANNEL_3:
892  {
893  /* Disable the TIM Capture/Compare 3 interrupt */
894  __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
895  break;
896  }
897 
898  case TIM_CHANNEL_4:
899  {
900  /* Disable the TIM Capture/Compare 4 interrupt */
901  __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4);
902  break;
903  }
904 
905  default:
906  break;
907  }
908 
909  /* Disable the Output compare channel */
910  TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
911 
912  if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
913  {
914  /* Disable the Main Output */
915  __HAL_TIM_MOE_DISABLE(htim);
916  }
917 
918  /* Disable the Peripheral */
919  __HAL_TIM_DISABLE(htim);
920 
921  /* Return function status */
922  return HAL_OK;
923 }
HAL_OK
return HAL_OK
Definition: stm32l4xx_hal_rtc_ex.c:885
TIM_CCxChannelCmd
void TIM_CCxChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelState)
Enables or disables the TIM Capture Compare Channel x.
Definition: stm32l4xx_hal_tim.c:6848
assert_param
assert_param(IS_RTC_WAKEUP_CLOCK(WakeUpClock))