STM32L4xx_HAL_Driver  1.14.0
stm32l4xx_hal_dfsdm.h
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1 
20 /* Define to prevent recursive inclusion -------------------------------------*/
21 #ifndef STM32L4xx_HAL_DFSDM_H
22 #define STM32L4xx_HAL_DFSDM_H
23 
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27 
28 #if defined(STM32L451xx) || defined(STM32L452xx) || defined(STM32L462xx) || \
29  defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || \
30  defined(STM32L496xx) || defined(STM32L4A6xx) || \
31  defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
32 
33 /* Includes ------------------------------------------------------------------*/
34 #include "stm32l4xx_hal_def.h"
35 
44 /* Exported types ------------------------------------------------------------*/
52 typedef enum
53 {
54  HAL_DFSDM_CHANNEL_STATE_RESET = 0x00U,
55  HAL_DFSDM_CHANNEL_STATE_READY = 0x01U,
56  HAL_DFSDM_CHANNEL_STATE_ERROR = 0xFFU
57 } HAL_DFSDM_Channel_StateTypeDef;
58 
62 typedef struct
63 {
64  FunctionalState Activation;
65  uint32_t Selection;
67  uint32_t Divider;
69 } DFSDM_Channel_OutputClockTypeDef;
70 
74 typedef struct
75 {
76  uint32_t Multiplexer;
81  uint32_t DataPacking;
83  uint32_t Pins;
85 } DFSDM_Channel_InputTypeDef;
86 
90 typedef struct
91 {
92  uint32_t Type;
94  uint32_t SpiClock;
96 } DFSDM_Channel_SerialInterfaceTypeDef;
97 
101 typedef struct
102 {
103  uint32_t FilterOrder;
105  uint32_t Oversampling;
107 } DFSDM_Channel_AwdTypeDef;
108 
112 typedef struct
113 {
114  DFSDM_Channel_OutputClockTypeDef OutputClock;
115  DFSDM_Channel_InputTypeDef Input;
116  DFSDM_Channel_SerialInterfaceTypeDef SerialInterface;
117  DFSDM_Channel_AwdTypeDef Awd;
118  int32_t Offset;
120  uint32_t RightBitShift;
122 } DFSDM_Channel_InitTypeDef;
123 
127 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
128 typedef struct __DFSDM_Channel_HandleTypeDef
129 #else
130 typedef struct
131 #endif /* USE_HAL_DFSDM_REGISTER_CALLBACKS */
132 {
133  DFSDM_Channel_TypeDef *Instance;
134  DFSDM_Channel_InitTypeDef Init;
135  HAL_DFSDM_Channel_StateTypeDef State;
136 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
137  void (*CkabCallback)(struct __DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
138  void (*ScdCallback)(struct __DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
139  void (*MspInitCallback)(struct __DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
140  void (*MspDeInitCallback)(struct __DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
141 #endif
142 } DFSDM_Channel_HandleTypeDef;
143 
144 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
145 
148 typedef enum
149 {
150  HAL_DFSDM_CHANNEL_CKAB_CB_ID = 0x00U,
151  HAL_DFSDM_CHANNEL_SCD_CB_ID = 0x01U,
152  HAL_DFSDM_CHANNEL_MSPINIT_CB_ID = 0x02U,
153  HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID = 0x03U
154 } HAL_DFSDM_Channel_CallbackIDTypeDef;
155 
159 typedef void (*pDFSDM_Channel_CallbackTypeDef)(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
160 #endif
161 
165 typedef enum
166 {
167  HAL_DFSDM_FILTER_STATE_RESET = 0x00U,
168  HAL_DFSDM_FILTER_STATE_READY = 0x01U,
169  HAL_DFSDM_FILTER_STATE_REG = 0x02U,
170  HAL_DFSDM_FILTER_STATE_INJ = 0x03U,
171  HAL_DFSDM_FILTER_STATE_REG_INJ = 0x04U,
172  HAL_DFSDM_FILTER_STATE_ERROR = 0xFFU
173 } HAL_DFSDM_Filter_StateTypeDef;
174 
178 typedef struct
179 {
180  uint32_t Trigger;
182  FunctionalState FastMode;
183  FunctionalState DmaMode;
184 } DFSDM_Filter_RegularParamTypeDef;
185 
189 typedef struct
190 {
191  uint32_t Trigger;
193  FunctionalState ScanMode;
194  FunctionalState DmaMode;
195  uint32_t ExtTrigger;
197  uint32_t ExtTriggerEdge;
199 } DFSDM_Filter_InjectedParamTypeDef;
200 
204 typedef struct
205 {
206  uint32_t SincOrder;
208  uint32_t Oversampling;
210  uint32_t IntOversampling;
212 } DFSDM_Filter_FilterParamTypeDef;
213 
217 typedef struct
218 {
219  DFSDM_Filter_RegularParamTypeDef RegularParam;
220  DFSDM_Filter_InjectedParamTypeDef InjectedParam;
221  DFSDM_Filter_FilterParamTypeDef FilterParam;
222 } DFSDM_Filter_InitTypeDef;
223 
227 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
228 typedef struct __DFSDM_Filter_HandleTypeDef
229 #else
230 typedef struct
231 #endif /* USE_HAL_DFSDM_REGISTER_CALLBACKS */
232 {
233  DFSDM_Filter_TypeDef *Instance;
234  DFSDM_Filter_InitTypeDef Init;
235  DMA_HandleTypeDef *hdmaReg;
236  DMA_HandleTypeDef *hdmaInj;
237  uint32_t RegularContMode;
238  uint32_t RegularTrigger;
239  uint32_t InjectedTrigger;
240  uint32_t ExtTriggerEdge;
241  FunctionalState InjectedScanMode;
242  uint32_t InjectedChannelsNbr;
243  uint32_t InjConvRemaining;
244  HAL_DFSDM_Filter_StateTypeDef State;
245  uint32_t ErrorCode;
246 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
247  void (*AwdCallback)(struct __DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
248  uint32_t Channel, uint32_t Threshold);
249  void (*RegConvCpltCallback)(struct __DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
250  void (*RegConvHalfCpltCallback)(struct __DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
251  void (*InjConvCpltCallback)(struct __DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
252  void (*InjConvHalfCpltCallback)(struct __DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
253  void (*ErrorCallback)(struct __DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
254  void (*MspInitCallback)(struct __DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
255  void (*MspDeInitCallback)(struct __DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
256 #endif
257 } DFSDM_Filter_HandleTypeDef;
258 
262 typedef struct
263 {
264  uint32_t DataSource;
266  uint32_t Channel;
268  int32_t HighThreshold;
270  int32_t LowThreshold;
272  uint32_t HighBreakSignal;
274  uint32_t LowBreakSignal;
276 } DFSDM_Filter_AwdParamTypeDef;
277 
278 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
279 
282 typedef enum
283 {
284  HAL_DFSDM_FILTER_REGCONV_COMPLETE_CB_ID = 0x00U,
285  HAL_DFSDM_FILTER_REGCONV_HALFCOMPLETE_CB_ID = 0x01U,
286  HAL_DFSDM_FILTER_INJCONV_COMPLETE_CB_ID = 0x02U,
287  HAL_DFSDM_FILTER_INJCONV_HALFCOMPLETE_CB_ID = 0x03U,
288  HAL_DFSDM_FILTER_ERROR_CB_ID = 0x04U,
289  HAL_DFSDM_FILTER_MSPINIT_CB_ID = 0x05U,
290  HAL_DFSDM_FILTER_MSPDEINIT_CB_ID = 0x06U
291 } HAL_DFSDM_Filter_CallbackIDTypeDef;
292 
296 typedef void (*pDFSDM_Filter_CallbackTypeDef)(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
297 typedef void (*pDFSDM_Filter_AwdCallbackTypeDef)(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Channel, uint32_t Threshold);
298 #endif
299 
303 /* End of exported types -----------------------------------------------------*/
304 
305 /* Exported constants --------------------------------------------------------*/
313 #define DFSDM_CHANNEL_OUTPUT_CLOCK_SYSTEM 0x00000000U
314 #define DFSDM_CHANNEL_OUTPUT_CLOCK_AUDIO DFSDM_CHCFGR1_CKOUTSRC
322 #define DFSDM_CHANNEL_EXTERNAL_INPUTS 0x00000000U
323 #if defined(STM32L451xx) || defined(STM32L452xx) || defined(STM32L462xx) || \
324  defined(STM32L496xx) || defined(STM32L4A6xx) || \
325  defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
326 #define DFSDM_CHANNEL_ADC_OUTPUT DFSDM_CHCFGR1_DATMPX_0
327 #endif /* STM32L451xx || STM32L452xx || STM32L462xx || STM32L496xx || STM32L4A6xx || STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */
328 #define DFSDM_CHANNEL_INTERNAL_REGISTER DFSDM_CHCFGR1_DATMPX_1
336 #define DFSDM_CHANNEL_STANDARD_MODE 0x00000000U
337 #define DFSDM_CHANNEL_INTERLEAVED_MODE DFSDM_CHCFGR1_DATPACK_0
338 #define DFSDM_CHANNEL_DUAL_MODE DFSDM_CHCFGR1_DATPACK_1
346 #define DFSDM_CHANNEL_SAME_CHANNEL_PINS 0x00000000U
347 #define DFSDM_CHANNEL_FOLLOWING_CHANNEL_PINS DFSDM_CHCFGR1_CHINSEL
355 #define DFSDM_CHANNEL_SPI_RISING 0x00000000U
356 #define DFSDM_CHANNEL_SPI_FALLING DFSDM_CHCFGR1_SITP_0
357 #define DFSDM_CHANNEL_MANCHESTER_RISING DFSDM_CHCFGR1_SITP_1
358 #define DFSDM_CHANNEL_MANCHESTER_FALLING DFSDM_CHCFGR1_SITP
366 #define DFSDM_CHANNEL_SPI_CLOCK_EXTERNAL 0x00000000U
367 #define DFSDM_CHANNEL_SPI_CLOCK_INTERNAL DFSDM_CHCFGR1_SPICKSEL_0
368 #define DFSDM_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_FALLING DFSDM_CHCFGR1_SPICKSEL_1
369 #define DFSDM_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_RISING DFSDM_CHCFGR1_SPICKSEL
377 #define DFSDM_CHANNEL_FASTSINC_ORDER 0x00000000U
378 #define DFSDM_CHANNEL_SINC1_ORDER DFSDM_CHAWSCDR_AWFORD_0
379 #define DFSDM_CHANNEL_SINC2_ORDER DFSDM_CHAWSCDR_AWFORD_1
380 #define DFSDM_CHANNEL_SINC3_ORDER DFSDM_CHAWSCDR_AWFORD
388 #define DFSDM_FILTER_SW_TRIGGER 0x00000000U
389 #define DFSDM_FILTER_SYNC_TRIGGER 0x00000001U
390 #define DFSDM_FILTER_EXT_TRIGGER 0x00000002U
398 #if defined(STM32L451xx) || defined(STM32L452xx) || defined(STM32L462xx)
399 #define DFSDM_FILTER_EXT_TRIG_TIM1_TRGO 0x00000000U
400 #define DFSDM_FILTER_EXT_TRIG_TIM1_TRGO2 DFSDM_FLTCR1_JEXTSEL_0
401 #define DFSDM_FILTER_EXT_TRIG_TIM3_TRGO DFSDM_FLTCR1_JEXTSEL_1
402 #define DFSDM_FILTER_EXT_TRIG_TIM16_OC1 (DFSDM_FLTCR1_JEXTSEL_0 | DFSDM_FLTCR1_JEXTSEL_1)
403 #define DFSDM_FILTER_EXT_TRIG_TIM6_TRGO (DFSDM_FLTCR1_JEXTSEL_0 | DFSDM_FLTCR1_JEXTSEL_2)
404 #define DFSDM_FILTER_EXT_TRIG_EXTI11 (DFSDM_FLTCR1_JEXTSEL_1 | DFSDM_FLTCR1_JEXTSEL_2)
405 #define DFSDM_FILTER_EXT_TRIG_EXTI15 DFSDM_FLTCR1_JEXTSEL
406 #elif defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
407 #define DFSDM_FILTER_EXT_TRIG_TIM1_TRGO 0x00000000U
408 #define DFSDM_FILTER_EXT_TRIG_TIM1_TRGO2 DFSDM_FLTCR1_JEXTSEL_0
409 #define DFSDM_FILTER_EXT_TRIG_TIM8_TRGO DFSDM_FLTCR1_JEXTSEL_1
410 #define DFSDM_FILTER_EXT_TRIG_TIM8_TRGO2 (DFSDM_FLTCR1_JEXTSEL_0 | DFSDM_FLTCR1_JEXTSEL_1)
411 #define DFSDM_FILTER_EXT_TRIG_TIM3_TRGO DFSDM_FLTCR1_JEXTSEL_2
412 #define DFSDM_FILTER_EXT_TRIG_TIM4_TRGO (DFSDM_FLTCR1_JEXTSEL_0 | DFSDM_FLTCR1_JEXTSEL_2)
413 #define DFSDM_FILTER_EXT_TRIG_TIM16_OC1 (DFSDM_FLTCR1_JEXTSEL_1 | DFSDM_FLTCR1_JEXTSEL_2)
414 #define DFSDM_FILTER_EXT_TRIG_TIM6_TRGO (DFSDM_FLTCR1_JEXTSEL_0 | DFSDM_FLTCR1_JEXTSEL_1 | \
415  DFSDM_FLTCR1_JEXTSEL_2)
416 #define DFSDM_FILTER_EXT_TRIG_TIM7_TRGO DFSDM_FLTCR1_JEXTSEL_3
417 #define DFSDM_FILTER_EXT_TRIG_EXTI11 (DFSDM_FLTCR1_JEXTSEL_3 | DFSDM_FLTCR1_JEXTSEL_4)
418 #define DFSDM_FILTER_EXT_TRIG_EXTI15 (DFSDM_FLTCR1_JEXTSEL_0 | DFSDM_FLTCR1_JEXTSEL_3 | \
419  DFSDM_FLTCR1_JEXTSEL_4)
420 #define DFSDM_FILTER_EXT_TRIG_LPTIM1_OUT (DFSDM_FLTCR1_JEXTSEL_1 | DFSDM_FLTCR1_JEXTSEL_3 | \
421  DFSDM_FLTCR1_JEXTSEL_4)
422 #else
423 #define DFSDM_FILTER_EXT_TRIG_TIM1_TRGO 0x00000000U
424 #define DFSDM_FILTER_EXT_TRIG_TIM1_TRGO2 DFSDM_FLTCR1_JEXTSEL_0
425 #define DFSDM_FILTER_EXT_TRIG_TIM8_TRGO DFSDM_FLTCR1_JEXTSEL_1
426 #define DFSDM_FILTER_EXT_TRIG_TIM8_TRGO2 (DFSDM_FLTCR1_JEXTSEL_0 | DFSDM_FLTCR1_JEXTSEL_1)
427 #define DFSDM_FILTER_EXT_TRIG_TIM3_TRGO (DFSDM_FLTCR1_JEXTSEL_0 | DFSDM_FLTCR1_JEXTSEL_1)
428 #define DFSDM_FILTER_EXT_TRIG_TIM4_TRGO DFSDM_FLTCR1_JEXTSEL_2
429 #define DFSDM_FILTER_EXT_TRIG_TIM16_OC1 DFSDM_FLTCR1_JEXTSEL_2
430 #define DFSDM_FILTER_EXT_TRIG_TIM6_TRGO (DFSDM_FLTCR1_JEXTSEL_0 | DFSDM_FLTCR1_JEXTSEL_2)
431 #define DFSDM_FILTER_EXT_TRIG_TIM7_TRGO (DFSDM_FLTCR1_JEXTSEL_0 | DFSDM_FLTCR1_JEXTSEL_2)
432 #define DFSDM_FILTER_EXT_TRIG_EXTI11 (DFSDM_FLTCR1_JEXTSEL_1 | DFSDM_FLTCR1_JEXTSEL_2)
433 #define DFSDM_FILTER_EXT_TRIG_EXTI15 DFSDM_FLTCR1_JEXTSEL
434 #endif /* STM32L451xx || STM32L452xx || STM32L462xx */
435 
442 #define DFSDM_FILTER_EXT_TRIG_RISING_EDGE DFSDM_FLTCR1_JEXTEN_0
443 #define DFSDM_FILTER_EXT_TRIG_FALLING_EDGE DFSDM_FLTCR1_JEXTEN_1
444 #define DFSDM_FILTER_EXT_TRIG_BOTH_EDGES DFSDM_FLTCR1_JEXTEN
452 #define DFSDM_FILTER_FASTSINC_ORDER 0x00000000U
453 #define DFSDM_FILTER_SINC1_ORDER DFSDM_FLTFCR_FORD_0
454 #define DFSDM_FILTER_SINC2_ORDER DFSDM_FLTFCR_FORD_1
455 #define DFSDM_FILTER_SINC3_ORDER (DFSDM_FLTFCR_FORD_0 | DFSDM_FLTFCR_FORD_1)
456 #define DFSDM_FILTER_SINC4_ORDER DFSDM_FLTFCR_FORD_2
457 #define DFSDM_FILTER_SINC5_ORDER (DFSDM_FLTFCR_FORD_0 | DFSDM_FLTFCR_FORD_2)
465 #define DFSDM_FILTER_AWD_FILTER_DATA 0x00000000U
466 #define DFSDM_FILTER_AWD_CHANNEL_DATA DFSDM_FLTCR1_AWFSEL
474 #define DFSDM_FILTER_ERROR_NONE 0x00000000U
475 #define DFSDM_FILTER_ERROR_REGULAR_OVERRUN 0x00000001U
476 #define DFSDM_FILTER_ERROR_INJECTED_OVERRUN 0x00000002U
477 #define DFSDM_FILTER_ERROR_DMA 0x00000003U
478 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
479 #define DFSDM_FILTER_ERROR_INVALID_CALLBACK 0x00000004U
480 #endif
481 
488 #define DFSDM_NO_BREAK_SIGNAL 0x00000000U
489 #define DFSDM_BREAK_SIGNAL_0 0x00000001U
490 #define DFSDM_BREAK_SIGNAL_1 0x00000002U
491 #define DFSDM_BREAK_SIGNAL_2 0x00000004U
492 #define DFSDM_BREAK_SIGNAL_3 0x00000008U
500 /* DFSDM Channels ------------------------------------------------------------*/
501 /* The DFSDM channels are defined as follows:
502  - in 16-bit LSB the channel mask is set
503  - in 16-bit MSB the channel number is set
504  e.g. for channel 5 definition:
505  - the channel mask is 0x00000020 (bit 5 is set)
506  - the channel number 5 is 0x00050000
507  --> Consequently, channel 5 definition is 0x00000020 | 0x00050000 = 0x00050020 */
508 #if defined(STM32L451xx) || defined(STM32L452xx) || defined(STM32L462xx)
509 #define DFSDM_CHANNEL_0 0x00000001U
510 #define DFSDM_CHANNEL_1 0x00010002U
511 #define DFSDM_CHANNEL_2 0x00020004U
512 #define DFSDM_CHANNEL_3 0x00030008U
513 #else
514 #define DFSDM_CHANNEL_0 0x00000001U
515 #define DFSDM_CHANNEL_1 0x00010002U
516 #define DFSDM_CHANNEL_2 0x00020004U
517 #define DFSDM_CHANNEL_3 0x00030008U
518 #define DFSDM_CHANNEL_4 0x00040010U
519 #define DFSDM_CHANNEL_5 0x00050020U
520 #define DFSDM_CHANNEL_6 0x00060040U
521 #define DFSDM_CHANNEL_7 0x00070080U
522 #endif /* STM32L451xx || STM32L452xx || STM32L462xx */
523 
530 #define DFSDM_CONTINUOUS_CONV_OFF 0x00000000U
531 #define DFSDM_CONTINUOUS_CONV_ON 0x00000001U
539 #define DFSDM_AWD_HIGH_THRESHOLD 0x00000000U
540 #define DFSDM_AWD_LOW_THRESHOLD 0x00000001U
548 /* End of exported constants -------------------------------------------------*/
549 
550 /* Exported macros -----------------------------------------------------------*/
559 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
560 #define __HAL_DFSDM_CHANNEL_RESET_HANDLE_STATE(__HANDLE__) do{ \
561  (__HANDLE__)->State = HAL_DFSDM_CHANNEL_STATE_RESET; \
562  (__HANDLE__)->MspInitCallback = NULL; \
563  (__HANDLE__)->MspDeInitCallback = NULL; \
564  } while(0)
565 #else
566 #define __HAL_DFSDM_CHANNEL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DFSDM_CHANNEL_STATE_RESET)
567 #endif
568 
573 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
574 #define __HAL_DFSDM_FILTER_RESET_HANDLE_STATE(__HANDLE__) do{ \
575  (__HANDLE__)->State = HAL_DFSDM_FILTER_STATE_RESET; \
576  (__HANDLE__)->MspInitCallback = NULL; \
577  (__HANDLE__)->MspDeInitCallback = NULL; \
578  } while(0)
579 #else
580 #define __HAL_DFSDM_FILTER_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DFSDM_FILTER_STATE_RESET)
581 #endif
582 
586 /* End of exported macros ----------------------------------------------------*/
587 
588 #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
589 /* Include DFSDM HAL Extension module */
590 #include "stm32l4xx_hal_dfsdm_ex.h"
591 #endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */
592 
593 /* Exported functions --------------------------------------------------------*/
601 /* Channel initialization and de-initialization functions *********************/
602 HAL_StatusTypeDef HAL_DFSDM_ChannelInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
603 HAL_StatusTypeDef HAL_DFSDM_ChannelDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
604 void HAL_DFSDM_ChannelMspInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
605 void HAL_DFSDM_ChannelMspDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
606 
607 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
608 /* Channel callbacks register/unregister functions ****************************/
609 HAL_StatusTypeDef HAL_DFSDM_Channel_RegisterCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
610  HAL_DFSDM_Channel_CallbackIDTypeDef CallbackID,
611  pDFSDM_Channel_CallbackTypeDef pCallback);
612 HAL_StatusTypeDef HAL_DFSDM_Channel_UnRegisterCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
613  HAL_DFSDM_Channel_CallbackIDTypeDef CallbackID);
614 #endif
615 
622 /* Channel operation functions ************************************************/
623 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
624 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
625 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
626 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
627 
628 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, uint32_t Threshold, uint32_t BreakSignal);
629 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, uint32_t Threshold, uint32_t BreakSignal);
630 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
631 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
632 
633 int16_t HAL_DFSDM_ChannelGetAwdValue(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
634 HAL_StatusTypeDef HAL_DFSDM_ChannelModifyOffset(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, int32_t Offset);
635 
636 HAL_StatusTypeDef HAL_DFSDM_ChannelPollForCkab(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, uint32_t Timeout);
637 HAL_StatusTypeDef HAL_DFSDM_ChannelPollForScd(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, uint32_t Timeout);
638 
639 void HAL_DFSDM_ChannelCkabCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
640 void HAL_DFSDM_ChannelScdCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
648 /* Channel state function *****************************************************/
649 HAL_DFSDM_Channel_StateTypeDef HAL_DFSDM_ChannelGetState(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
657 /* Filter initialization and de-initialization functions *********************/
658 HAL_StatusTypeDef HAL_DFSDM_FilterInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
659 HAL_StatusTypeDef HAL_DFSDM_FilterDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
660 void HAL_DFSDM_FilterMspInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
661 void HAL_DFSDM_FilterMspDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
662 
663 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
664 /* Filter callbacks register/unregister functions ****************************/
665 HAL_StatusTypeDef HAL_DFSDM_Filter_RegisterCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
666  HAL_DFSDM_Filter_CallbackIDTypeDef CallbackID,
667  pDFSDM_Filter_CallbackTypeDef pCallback);
668 HAL_StatusTypeDef HAL_DFSDM_Filter_UnRegisterCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
669  HAL_DFSDM_Filter_CallbackIDTypeDef CallbackID);
670 HAL_StatusTypeDef HAL_DFSDM_Filter_RegisterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
671  pDFSDM_Filter_AwdCallbackTypeDef pCallback);
672 HAL_StatusTypeDef HAL_DFSDM_Filter_UnRegisterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
673 #endif
674 
681 /* Filter control functions *********************/
682 HAL_StatusTypeDef HAL_DFSDM_FilterConfigRegChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
683  uint32_t Channel,
684  uint32_t ContinuousMode);
685 HAL_StatusTypeDef HAL_DFSDM_FilterConfigInjChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
686  uint32_t Channel);
694 /* Filter operation functions *********************/
695 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
696 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
697 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, int32_t *pData, uint32_t Length);
698 HAL_StatusTypeDef HAL_DFSDM_FilterRegularMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, int16_t *pData, uint32_t Length);
699 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
700 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
701 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
702 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
703 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
704 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, int32_t *pData, uint32_t Length);
705 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, int16_t *pData, uint32_t Length);
706 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
707 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
708 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
709 HAL_StatusTypeDef HAL_DFSDM_FilterAwdStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
710  DFSDM_Filter_AwdParamTypeDef *awdParam);
711 HAL_StatusTypeDef HAL_DFSDM_FilterAwdStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
712 HAL_StatusTypeDef HAL_DFSDM_FilterExdStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Channel);
713 HAL_StatusTypeDef HAL_DFSDM_FilterExdStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
714 
715 int32_t HAL_DFSDM_FilterGetRegularValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t *Channel);
716 int32_t HAL_DFSDM_FilterGetInjectedValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t *Channel);
717 int32_t HAL_DFSDM_FilterGetExdMaxValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t *Channel);
718 int32_t HAL_DFSDM_FilterGetExdMinValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t *Channel);
719 uint32_t HAL_DFSDM_FilterGetConvTimeValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
720 
721 void HAL_DFSDM_IRQHandler(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
722 
723 HAL_StatusTypeDef HAL_DFSDM_FilterPollForRegConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Timeout);
724 HAL_StatusTypeDef HAL_DFSDM_FilterPollForInjConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Timeout);
725 
726 void HAL_DFSDM_FilterRegConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
727 void HAL_DFSDM_FilterRegConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
728 void HAL_DFSDM_FilterInjConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
729 void HAL_DFSDM_FilterInjConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
730 void HAL_DFSDM_FilterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Channel, uint32_t Threshold);
731 void HAL_DFSDM_FilterErrorCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
739 /* Filter state functions *****************************************************/
740 HAL_DFSDM_Filter_StateTypeDef HAL_DFSDM_FilterGetState(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
741 uint32_t HAL_DFSDM_FilterGetError(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
749 /* End of exported functions -------------------------------------------------*/
750 
751 /* Private macros ------------------------------------------------------------*/
755 #define IS_DFSDM_CHANNEL_OUTPUT_CLOCK(CLOCK) (((CLOCK) == DFSDM_CHANNEL_OUTPUT_CLOCK_SYSTEM) || \
756  ((CLOCK) == DFSDM_CHANNEL_OUTPUT_CLOCK_AUDIO))
757 #define IS_DFSDM_CHANNEL_OUTPUT_CLOCK_DIVIDER(DIVIDER) ((2U <= (DIVIDER)) && ((DIVIDER) <= 256U))
758 #if defined(STM32L451xx) || defined(STM32L452xx) || defined(STM32L462xx) || \
759  defined(STM32L496xx) || defined(STM32L4A6xx) || \
760  defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
761 #define IS_DFSDM_CHANNEL_INPUT(INPUT) (((INPUT) == DFSDM_CHANNEL_EXTERNAL_INPUTS) || \
762  ((INPUT) == DFSDM_CHANNEL_ADC_OUTPUT) || \
763  ((INPUT) == DFSDM_CHANNEL_INTERNAL_REGISTER))
764 #else
765 #define IS_DFSDM_CHANNEL_INPUT(INPUT) (((INPUT) == DFSDM_CHANNEL_EXTERNAL_INPUTS) || \
766  ((INPUT) == DFSDM_CHANNEL_INTERNAL_REGISTER))
767 #endif /* STM32L451xx || STM32L452xx || STM32L462xx || */
768 /* STM32L496xx || STM32L4A6xx || */
769 /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */
770 #define IS_DFSDM_CHANNEL_DATA_PACKING(MODE) (((MODE) == DFSDM_CHANNEL_STANDARD_MODE) || \
771  ((MODE) == DFSDM_CHANNEL_INTERLEAVED_MODE) || \
772  ((MODE) == DFSDM_CHANNEL_DUAL_MODE))
773 #define IS_DFSDM_CHANNEL_INPUT_PINS(PINS) (((PINS) == DFSDM_CHANNEL_SAME_CHANNEL_PINS) || \
774  ((PINS) == DFSDM_CHANNEL_FOLLOWING_CHANNEL_PINS))
775 #define IS_DFSDM_CHANNEL_SERIAL_INTERFACE_TYPE(MODE) (((MODE) == DFSDM_CHANNEL_SPI_RISING) || \
776  ((MODE) == DFSDM_CHANNEL_SPI_FALLING) || \
777  ((MODE) == DFSDM_CHANNEL_MANCHESTER_RISING) || \
778  ((MODE) == DFSDM_CHANNEL_MANCHESTER_FALLING))
779 #define IS_DFSDM_CHANNEL_SPI_CLOCK(TYPE) (((TYPE) == DFSDM_CHANNEL_SPI_CLOCK_EXTERNAL) || \
780  ((TYPE) == DFSDM_CHANNEL_SPI_CLOCK_INTERNAL) || \
781  ((TYPE) == DFSDM_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_FALLING) || \
782  ((TYPE) == DFSDM_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_RISING))
783 #define IS_DFSDM_CHANNEL_FILTER_ORDER(ORDER) (((ORDER) == DFSDM_CHANNEL_FASTSINC_ORDER) || \
784  ((ORDER) == DFSDM_CHANNEL_SINC1_ORDER) || \
785  ((ORDER) == DFSDM_CHANNEL_SINC2_ORDER) || \
786  ((ORDER) == DFSDM_CHANNEL_SINC3_ORDER))
787 #define IS_DFSDM_CHANNEL_FILTER_OVS_RATIO(RATIO) ((1U <= (RATIO)) && ((RATIO) <= 32U))
788 #define IS_DFSDM_CHANNEL_OFFSET(VALUE) ((-8388608 <= (VALUE)) && ((VALUE) <= 8388607))
789 #define IS_DFSDM_CHANNEL_RIGHT_BIT_SHIFT(VALUE) ((VALUE) <= 0x1FU)
790 #define IS_DFSDM_CHANNEL_SCD_THRESHOLD(VALUE) ((VALUE) <= 0xFFU)
791 #define IS_DFSDM_FILTER_REG_TRIGGER(TRIG) (((TRIG) == DFSDM_FILTER_SW_TRIGGER) || \
792  ((TRIG) == DFSDM_FILTER_SYNC_TRIGGER))
793 #define IS_DFSDM_FILTER_INJ_TRIGGER(TRIG) (((TRIG) == DFSDM_FILTER_SW_TRIGGER) || \
794  ((TRIG) == DFSDM_FILTER_SYNC_TRIGGER) || \
795  ((TRIG) == DFSDM_FILTER_EXT_TRIGGER))
796 #if defined(STM32L451xx) || defined(STM32L452xx) || defined(STM32L462xx)
797 #define IS_DFSDM_FILTER_EXT_TRIG(TRIG) (((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM1_TRGO) || \
798  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM1_TRGO2) || \
799  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM3_TRGO) || \
800  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM16_OC1) || \
801  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM6_TRGO) || \
802  ((TRIG) == DFSDM_FILTER_EXT_TRIG_EXTI11) || \
803  ((TRIG) == DFSDM_FILTER_EXT_TRIG_EXTI15))
804 #elif defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
805 #define IS_DFSDM_FILTER_EXT_TRIG(TRIG) (((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM1_TRGO) || \
806  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM1_TRGO2) || \
807  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM8_TRGO) || \
808  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM8_TRGO2) || \
809  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM3_TRGO) || \
810  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM4_TRGO) || \
811  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM16_OC1) || \
812  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM6_TRGO) || \
813  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM7_TRGO) || \
814  ((TRIG) == DFSDM_FILTER_EXT_TRIG_EXTI11) || \
815  ((TRIG) == DFSDM_FILTER_EXT_TRIG_EXTI15) || \
816  ((TRIG) == DFSDM_FILTER_EXT_TRIG_LPTIM1_OUT))
817 #else
818 #define IS_DFSDM_FILTER_EXT_TRIG(TRIG) (((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM1_TRGO) || \
819  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM1_TRGO2) || \
820  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM8_TRGO) || \
821  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM8_TRGO2) || \
822  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM3_TRGO) || \
823  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM4_TRGO) || \
824  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM16_OC1) || \
825  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM6_TRGO) || \
826  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM7_TRGO) || \
827  ((TRIG) == DFSDM_FILTER_EXT_TRIG_EXTI11) || \
828  ((TRIG) == DFSDM_FILTER_EXT_TRIG_EXTI15))
829 #endif /* STM32L451xx || STM32L452xx || STM32L462xx */
830 #define IS_DFSDM_FILTER_EXT_TRIG_EDGE(EDGE) (((EDGE) == DFSDM_FILTER_EXT_TRIG_RISING_EDGE) || \
831  ((EDGE) == DFSDM_FILTER_EXT_TRIG_FALLING_EDGE) || \
832  ((EDGE) == DFSDM_FILTER_EXT_TRIG_BOTH_EDGES))
833 #define IS_DFSDM_FILTER_SINC_ORDER(ORDER) (((ORDER) == DFSDM_FILTER_FASTSINC_ORDER) || \
834  ((ORDER) == DFSDM_FILTER_SINC1_ORDER) || \
835  ((ORDER) == DFSDM_FILTER_SINC2_ORDER) || \
836  ((ORDER) == DFSDM_FILTER_SINC3_ORDER) || \
837  ((ORDER) == DFSDM_FILTER_SINC4_ORDER) || \
838  ((ORDER) == DFSDM_FILTER_SINC5_ORDER))
839 #define IS_DFSDM_FILTER_OVS_RATIO(RATIO) ((1U <= (RATIO)) && ((RATIO) <= 1024U))
840 #define IS_DFSDM_FILTER_INTEGRATOR_OVS_RATIO(RATIO) ((1U <= (RATIO)) && ((RATIO) <= 256U))
841 #define IS_DFSDM_FILTER_AWD_DATA_SOURCE(DATA) (((DATA) == DFSDM_FILTER_AWD_FILTER_DATA) || \
842  ((DATA) == DFSDM_FILTER_AWD_CHANNEL_DATA))
843 #define IS_DFSDM_FILTER_AWD_THRESHOLD(VALUE) ((-8388608 <= (VALUE)) && ((VALUE) <= 8388607))
844 #define IS_DFSDM_BREAK_SIGNALS(VALUE) ((VALUE) <= 0xFU)
845 #if defined(STM32L451xx) || defined(STM32L452xx) || defined(STM32L462xx)
846 #define IS_DFSDM_REGULAR_CHANNEL(CHANNEL) (((CHANNEL) == DFSDM_CHANNEL_0) || \
847  ((CHANNEL) == DFSDM_CHANNEL_1) || \
848  ((CHANNEL) == DFSDM_CHANNEL_2) || \
849  ((CHANNEL) == DFSDM_CHANNEL_3))
850 #define IS_DFSDM_INJECTED_CHANNEL(CHANNEL) (((CHANNEL) != 0U) && ((CHANNEL) <= 0x0003000FU))
851 #else
852 #define IS_DFSDM_REGULAR_CHANNEL(CHANNEL) (((CHANNEL) == DFSDM_CHANNEL_0) || \
853  ((CHANNEL) == DFSDM_CHANNEL_1) || \
854  ((CHANNEL) == DFSDM_CHANNEL_2) || \
855  ((CHANNEL) == DFSDM_CHANNEL_3) || \
856  ((CHANNEL) == DFSDM_CHANNEL_4) || \
857  ((CHANNEL) == DFSDM_CHANNEL_5) || \
858  ((CHANNEL) == DFSDM_CHANNEL_6) || \
859  ((CHANNEL) == DFSDM_CHANNEL_7))
860 #define IS_DFSDM_INJECTED_CHANNEL(CHANNEL) (((CHANNEL) != 0U) && ((CHANNEL) <= 0x000F00FFU))
861 #endif /* STM32L451xx || STM32L452xx || STM32L462xx */
862 #define IS_DFSDM_CONTINUOUS_MODE(MODE) (((MODE) == DFSDM_CONTINUOUS_CONV_OFF) || \
863  ((MODE) == DFSDM_CONTINUOUS_CONV_ON))
864 
867 /* End of private macros -----------------------------------------------------*/
868 
876 #endif /* STM32L451xx || STM32L452xx || STM32L462xx || */
877 /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */
878 /* STM32L496xx || STM32L4A6xx || */
879 /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */
880 
881 #ifdef __cplusplus
882 }
883 #endif
884 
885 #endif /* STM32L4xx_HAL_DFSDM_H */
886 
887 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
HAL_DFSDM_FilterRegularStop
HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
This function allows to stop regular conversion in polling mode.
Definition: stm32l4xx_hal_dfsdm.c:1925
HAL_DFSDM_FILTER_STATE_INJ
Definition: stm32l4xx_hal_dfsdm.h:170
DFSDM_Filter_InjectedParamTypeDef::ExtTrigger
uint32_t ExtTrigger
Definition: stm32l4xx_hal_dfsdm.h:195
HAL_DFSDM_Filter_StateTypeDef
HAL_DFSDM_Filter_StateTypeDef
HAL DFSDM Filter states definition.
Definition: stm32l4xx_hal_dfsdm.h:165
HAL_DFSDM_FilterDeInit
HAL_StatusTypeDef HAL_DFSDM_FilterDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
De-initializes the DFSDM filter.
Definition: stm32l4xx_hal_dfsdm.c:1391
DFSDM_Channel_HandleTypeDef
struct __DFSDM_Channel_HandleTypeDef else typedef struct endif DFSDM_Channel_HandleTypeDef
DFSDM channel handle structure definition.
HAL_DFSDM_FilterGetInjectedValue
int32_t HAL_DFSDM_FilterGetInjectedValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t *Channel)
This function allows to get injected conversion value.
Definition: stm32l4xx_hal_dfsdm.c:2628
HAL_DFSDM_FilterPollForRegConversion
HAL_StatusTypeDef HAL_DFSDM_FilterPollForRegConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Timeout)
This function allows to poll for the end of regular conversion.
Definition: stm32l4xx_hal_dfsdm.c:1860
DFSDM_Filter_RegularParamTypeDef
DFSDM filter regular conversion parameters structure definition.
Definition: stm32l4xx_hal_dfsdm.h:178
HAL_DFSDM_Filter_UnRegisterCallback
HAL_StatusTypeDef HAL_DFSDM_Filter_UnRegisterCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, HAL_DFSDM_Filter_CallbackIDTypeDef CallbackID)
Unregister a user DFSDM filter callback. DFSDM filter callback is redirected to the weak predefined c...
Definition: stm32l4xx_hal_dfsdm.c:1561
DFSDM_Channel_SerialInterfaceTypeDef::Type
uint32_t Type
Definition: stm32l4xx_hal_dfsdm.h:92
endif::Instance
DFSDM_Filter_TypeDef * Instance
Definition: stm32l4xx_hal_dfsdm.h:233
HAL_DFSDM_ChannelGetAwdValue
int16_t HAL_DFSDM_ChannelGetAwdValue(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
This function allows to get channel analog watchdog value.
Definition: stm32l4xx_hal_dfsdm.c:1175
HAL_DFSDM_ChannelScdCallback
void HAL_DFSDM_ChannelScdCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
Short circuit detection callback.
Definition: stm32l4xx_hal_dfsdm.c:1124
DFSDM_Filter_InjectedParamTypeDef::DmaMode
FunctionalState DmaMode
Definition: stm32l4xx_hal_dfsdm.h:194
HAL_DFSDM_FilterErrorCallback
void HAL_DFSDM_FilterErrorCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
Error callback.
Definition: stm32l4xx_hal_dfsdm.c:3175
DFSDM_Filter_InitTypeDef::RegularParam
DFSDM_Filter_RegularParamTypeDef RegularParam
Definition: stm32l4xx_hal_dfsdm.h:219
HAL_DFSDM_ChannelScdStop
HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
This function allows to stop short circuit detection in polling mode.
Definition: stm32l4xx_hal_dfsdm.c:1048
endif::hdmaReg
DMA_HandleTypeDef * hdmaReg
Definition: stm32l4xx_hal_dfsdm.h:235
DFSDM_Channel_AwdTypeDef::Oversampling
uint32_t Oversampling
Definition: stm32l4xx_hal_dfsdm.h:105
__DMA_HandleTypeDef
DMA handle Structure definition.
Definition: stm32l4xx_hal_dma.h:113
HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID
Definition: stm32l4xx_hal_dfsdm.h:153
HAL_DFSDM_FILTER_STATE_ERROR
Definition: stm32l4xx_hal_dfsdm.h:172
DFSDM_Filter_InjectedParamTypeDef::Trigger
uint32_t Trigger
Definition: stm32l4xx_hal_dfsdm.h:191
DFSDM_Filter_InjectedParamTypeDef
DFSDM filter injected conversion parameters structure definition.
Definition: stm32l4xx_hal_dfsdm.h:189
HAL_DFSDM_FilterGetExdMaxValue
int32_t HAL_DFSDM_FilterGetExdMaxValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t *Channel)
This function allows to get extreme detector maximum value.
Definition: stm32l4xx_hal_dfsdm.c:2816
HAL_DFSDM_FilterRegularStart_DMA
HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, int32_t *pData, uint32_t Length)
This function allows to start regular conversion in DMA mode.
Definition: stm32l4xx_hal_dfsdm.c:2024
HAL_DFSDM_Filter_RegisterCallback
HAL_StatusTypeDef HAL_DFSDM_Filter_RegisterCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, HAL_DFSDM_Filter_CallbackIDTypeDef CallbackID, pDFSDM_Filter_CallbackTypeDef pCallback)
Register a user DFSDM filter callback to be used instead of the weak predefined callback.
Definition: stm32l4xx_hal_dfsdm.c:1469
DFSDM_Channel_InitTypeDef::Input
DFSDM_Channel_InputTypeDef Input
Definition: stm32l4xx_hal_dfsdm.h:115
HAL_DFSDM_FilterGetExdMinValue
int32_t HAL_DFSDM_FilterGetExdMinValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t *Channel)
This function allows to get extreme detector minimum value.
Definition: stm32l4xx_hal_dfsdm.c:2847
DFSDM_Filter_AwdParamTypeDef::DataSource
uint32_t DataSource
Definition: stm32l4xx_hal_dfsdm.h:264
HAL_DFSDM_FilterExdStart
HAL_StatusTypeDef HAL_DFSDM_FilterExdStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Channel)
This function allows to start extreme detector feature.
Definition: stm32l4xx_hal_dfsdm.c:2747
DFSDM_Filter_FilterParamTypeDef::Oversampling
uint32_t Oversampling
Definition: stm32l4xx_hal_dfsdm.h:208
HAL_DFSDM_ChannelMspDeInit
void HAL_DFSDM_ChannelMspDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
De-initialize the DFSDM channel MSP.
Definition: stm32l4xx_hal_dfsdm.c:534
endif::State
HAL_DFSDM_Channel_StateTypeDef State
Definition: stm32l4xx_hal_dfsdm.h:135
HAL_DFSDM_FilterInjectedStop
HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
This function allows to stop injected conversion in polling mode.
Definition: stm32l4xx_hal_dfsdm.c:2346
HAL_DFSDM_Channel_UnRegisterCallback
HAL_StatusTypeDef HAL_DFSDM_Channel_UnRegisterCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, HAL_DFSDM_Channel_CallbackIDTypeDef CallbackID)
Unregister a user DFSDM channel callback. DFSDM channel callback is redirected to the weak predefined...
Definition: stm32l4xx_hal_dfsdm.c:630
HAL_DFSDM_FilterRegularStop_IT
HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
This function allows to stop regular conversion in interrupt mode.
Definition: stm32l4xx_hal_dfsdm.c:1986
DFSDM_Channel_InitTypeDef::OutputClock
DFSDM_Channel_OutputClockTypeDef OutputClock
Definition: stm32l4xx_hal_dfsdm.h:114
endif::RegularContMode
uint32_t RegularContMode
Definition: stm32l4xx_hal_dfsdm.h:237
endif::Instance
DFSDM_Channel_TypeDef * Instance
Definition: stm32l4xx_hal_dfsdm.h:133
DFSDM_Channel_InitTypeDef::Offset
int32_t Offset
Definition: stm32l4xx_hal_dfsdm.h:118
HAL_DFSDM_FilterGetRegularValue
int32_t HAL_DFSDM_FilterGetRegularValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t *Channel)
This function allows to get regular conversion value.
Definition: stm32l4xx_hal_dfsdm.c:2211
stm32l4xx_hal_def.h
This file contains HAL common defines, enumeration, macros and structures definitions.
HAL_DFSDM_FilterInjectedStart_IT
HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
This function allows to start injected conversion in interrupt mode.
Definition: stm32l4xx_hal_dfsdm.c:2376
HAL_DFSDM_ChannelScdStop_IT
HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
This function allows to stop short circuit detection in interrupt mode.
Definition: stm32l4xx_hal_dfsdm.c:1140
endif::ExtTriggerEdge
uint32_t ExtTriggerEdge
Definition: stm32l4xx_hal_dfsdm.h:240
HAL_DFSDM_FILTER_STATE_REG_INJ
Definition: stm32l4xx_hal_dfsdm.h:171
HAL_DFSDM_ChannelCkabStart
HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
This function allows to start clock absence detection in polling mode.
Definition: stm32l4xx_hal_dfsdm.c:711
DFSDM_Filter_HandleTypeDef
struct __DFSDM_Filter_HandleTypeDef else typedef struct endif DFSDM_Filter_HandleTypeDef
DFSDM filter handle structure definition.
DFSDM_Filter_InitTypeDef::FilterParam
DFSDM_Filter_FilterParamTypeDef FilterParam
Definition: stm32l4xx_hal_dfsdm.h:221
HAL_DFSDM_FilterRegConvHalfCpltCallback
void HAL_DFSDM_FilterRegConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
Half regular conversion complete callback.
Definition: stm32l4xx_hal_dfsdm.c:3108
HAL_DFSDM_FilterPollForInjConversion
HAL_StatusTypeDef HAL_DFSDM_FilterPollForInjConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Timeout)
This function allows to poll for the end of injected conversion.
Definition: stm32l4xx_hal_dfsdm.c:2271
HAL_DFSDM_FilterGetState
HAL_DFSDM_Filter_StateTypeDef HAL_DFSDM_FilterGetState(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
This function allows to get the current DFSDM filter handle state.
Definition: stm32l4xx_hal_dfsdm.c:3208
DFSDM_Channel_OutputClockTypeDef::Activation
FunctionalState Activation
Definition: stm32l4xx_hal_dfsdm.h:64
DFSDM_Filter_InitTypeDef
DFSDM filter init structure definition.
Definition: stm32l4xx_hal_dfsdm.h:217
HAL_DFSDM_ChannelCkabCallback
void HAL_DFSDM_ChannelCkabCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
Clock absence detection callback.
Definition: stm32l4xx_hal_dfsdm.c:905
HAL_DFSDM_FilterRegularStart
HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
This function allows to start regular conversion in polling mode.
Definition: stm32l4xx_hal_dfsdm.c:1831
HAL_DFSDM_FILTER_MSPINIT_CB_ID
Definition: stm32l4xx_hal_dfsdm.h:289
DFSDM_Channel_SerialInterfaceTypeDef::SpiClock
uint32_t SpiClock
Definition: stm32l4xx_hal_dfsdm.h:94
HAL_DFSDM_FilterConfigInjChannel
HAL_StatusTypeDef HAL_DFSDM_FilterConfigInjChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Channel)
This function allows to select channels for injected conversion.
Definition: stm32l4xx_hal_dfsdm.c:1761
HAL_DFSDM_ChannelCkabStop
HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
This function allows to stop clock absence detection in polling mode.
Definition: stm32l4xx_hal_dfsdm.c:814
DFSDM_Channel_InitTypeDef
DFSDM channel init structure definition.
Definition: stm32l4xx_hal_dfsdm.h:112
HAL_DFSDM_FILTER_INJCONV_HALFCOMPLETE_CB_ID
Definition: stm32l4xx_hal_dfsdm.h:287
HAL_DFSDM_FILTER_INJCONV_COMPLETE_CB_ID
Definition: stm32l4xx_hal_dfsdm.h:286
HAL_DFSDM_FilterGetError
uint32_t HAL_DFSDM_FilterGetError(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
This function allows to get the current DFSDM filter error.
Definition: stm32l4xx_hal_dfsdm.c:3219
HAL_DFSDM_CHANNEL_CKAB_CB_ID
Definition: stm32l4xx_hal_dfsdm.h:150
stm32l4xx_hal_dfsdm_ex.h
Header file of DFSDM HAL extended module.
HAL_DFSDM_FilterRegConvCpltCallback
void HAL_DFSDM_FilterRegConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
Regular conversion complete callback.
Definition: stm32l4xx_hal_dfsdm.c:3093
HAL_DFSDM_FilterInjectedStop_IT
HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
This function allows to stop injected conversion in interrupt mode.
Definition: stm32l4xx_hal_dfsdm.c:2407
DFSDM_Filter_AwdParamTypeDef
DFSDM filter analog watchdog parameters structure definition.
Definition: stm32l4xx_hal_dfsdm.h:262
HAL_DFSDM_ChannelCkabStart_IT
HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
This function allows to start clock absence detection in interrupt mode.
Definition: stm32l4xx_hal_dfsdm.c:850
HAL_DFSDM_FilterAwdStop_IT
HAL_StatusTypeDef HAL_DFSDM_FilterAwdStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
This function allows to stop filter analog watchdog in interrupt mode.
Definition: stm32l4xx_hal_dfsdm.c:2707
HAL_DFSDM_FilterInjConvHalfCpltCallback
void HAL_DFSDM_FilterInjConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
Half injected conversion complete callback.
Definition: stm32l4xx_hal_dfsdm.c:3140
HAL_DFSDM_FilterGetConvTimeValue
uint32_t HAL_DFSDM_FilterGetConvTimeValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
This function allows to get conversion time value.
Definition: stm32l4xx_hal_dfsdm.c:2877
HAL_DFSDM_FilterAwdStart_IT
HAL_StatusTypeDef HAL_DFSDM_FilterAwdStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, DFSDM_Filter_AwdParamTypeDef *awdParam)
This function allows to start filter analog watchdog in interrupt mode.
Definition: stm32l4xx_hal_dfsdm.c:2658
HAL_DFSDM_FILTER_REGCONV_COMPLETE_CB_ID
Definition: stm32l4xx_hal_dfsdm.h:284
endif::hdmaInj
DMA_HandleTypeDef * hdmaInj
Definition: stm32l4xx_hal_dfsdm.h:236
DFSDM_Channel_InitTypeDef::SerialInterface
DFSDM_Channel_SerialInterfaceTypeDef SerialInterface
Definition: stm32l4xx_hal_dfsdm.h:116
HAL_DFSDM_FilterExdStop
HAL_StatusTypeDef HAL_DFSDM_FilterExdStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
This function allows to stop extreme detector feature.
Definition: stm32l4xx_hal_dfsdm.c:2778
DFSDM_Filter_AwdParamTypeDef::LowBreakSignal
uint32_t LowBreakSignal
Definition: stm32l4xx_hal_dfsdm.h:274
HAL_DFSDM_FILTER_STATE_READY
Definition: stm32l4xx_hal_dfsdm.h:168
HAL_DFSDM_ChannelScdStart_IT
HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, uint32_t Threshold, uint32_t BreakSignal)
This function allows to start short circuit detection in interrupt mode.
Definition: stm32l4xx_hal_dfsdm.c:1085
pDFSDM_Filter_AwdCallbackTypeDef
void(* pDFSDM_Filter_AwdCallbackTypeDef)(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Channel, uint32_t Threshold)
Definition: stm32l4xx_hal_dfsdm.h:297
HAL_DFSDM_FilterInit
HAL_StatusTypeDef HAL_DFSDM_FilterInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
Initialize the DFSDM filter according to the specified parameters in the DFSDM_FilterInitTypeDef stru...
Definition: stm32l4xx_hal_dfsdm.c:1264
HAL_DFSDM_FILTER_REGCONV_HALFCOMPLETE_CB_ID
Definition: stm32l4xx_hal_dfsdm.h:285
endif::InjectedChannelsNbr
uint32_t InjectedChannelsNbr
Definition: stm32l4xx_hal_dfsdm.h:242
HAL_DFSDM_ChannelPollForScd
HAL_StatusTypeDef HAL_DFSDM_ChannelPollForScd(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, uint32_t Timeout)
This function allows to poll for the short circuit detection.
Definition: stm32l4xx_hal_dfsdm.c:998
HAL_DFSDM_IRQHandler
void HAL_DFSDM_IRQHandler(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
This function handles the DFSDM interrupts.
Definition: stm32l4xx_hal_dfsdm.c:2900
HAL_DFSDM_Channel_RegisterCallback
HAL_StatusTypeDef HAL_DFSDM_Channel_RegisterCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, HAL_DFSDM_Channel_CallbackIDTypeDef CallbackID, pDFSDM_Channel_CallbackTypeDef pCallback)
Register a user DFSDM channel callback to be used instead of the weak predefined callback.
Definition: stm32l4xx_hal_dfsdm.c:558
HAL_DFSDM_CHANNEL_SCD_CB_ID
Definition: stm32l4xx_hal_dfsdm.h:151
HAL_DFSDM_ChannelGetState
HAL_DFSDM_Channel_StateTypeDef HAL_DFSDM_ChannelGetState(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
This function allows to get the current DFSDM channel handle state.
Definition: stm32l4xx_hal_dfsdm.c:1234
DFSDM_Filter_RegularParamTypeDef::FastMode
FunctionalState FastMode
Definition: stm32l4xx_hal_dfsdm.h:182
endif::RegularTrigger
uint32_t RegularTrigger
Definition: stm32l4xx_hal_dfsdm.h:238
endif::State
HAL_DFSDM_Filter_StateTypeDef State
Definition: stm32l4xx_hal_dfsdm.h:244
HAL_DFSDM_ChannelPollForCkab
HAL_StatusTypeDef HAL_DFSDM_ChannelPollForCkab(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, uint32_t Timeout)
This function allows to poll for the clock absence detection.
Definition: stm32l4xx_hal_dfsdm.c:764
HAL_DFSDM_CHANNEL_STATE_RESET
Definition: stm32l4xx_hal_dfsdm.h:54
endif::Init
DFSDM_Filter_InitTypeDef Init
Definition: stm32l4xx_hal_dfsdm.h:234
HAL_DFSDM_FilterAwdCallback
void HAL_DFSDM_FilterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Channel, uint32_t Threshold)
Filter analog watchdog callback.
Definition: stm32l4xx_hal_dfsdm.c:3157
HAL_DFSDM_FilterInjectedStart
HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
This function allows to start injected conversion in polling mode.
Definition: stm32l4xx_hal_dfsdm.c:2242
HAL_DFSDM_FILTER_STATE_RESET
Definition: stm32l4xx_hal_dfsdm.h:167
DFSDM_Filter_AwdParamTypeDef::HighBreakSignal
uint32_t HighBreakSignal
Definition: stm32l4xx_hal_dfsdm.h:272
HAL_DFSDM_FilterInjectedMsbStart_DMA
HAL_StatusTypeDef HAL_DFSDM_FilterInjectedMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, int16_t *pData, uint32_t Length)
This function allows to start injected conversion in DMA mode and to get only the 16 most significant...
Definition: stm32l4xx_hal_dfsdm.c:2520
endif::InjectedTrigger
uint32_t InjectedTrigger
Definition: stm32l4xx_hal_dfsdm.h:239
HAL_DFSDM_ChannelDeInit
HAL_StatusTypeDef HAL_DFSDM_ChannelDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
De-initialize the DFSDM channel.
Definition: stm32l4xx_hal_dfsdm.c:465
DFSDM_Channel_AwdTypeDef::FilterOrder
uint32_t FilterOrder
Definition: stm32l4xx_hal_dfsdm.h:103
DFSDM_Filter_AwdParamTypeDef::LowThreshold
int32_t LowThreshold
Definition: stm32l4xx_hal_dfsdm.h:270
pDFSDM_Channel_CallbackTypeDef
void(* pDFSDM_Channel_CallbackTypeDef)(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
DFSDM channel callback pointer definition.
Definition: stm32l4xx_hal_dfsdm.h:159
DFSDM_Channel_InputTypeDef::Multiplexer
uint32_t Multiplexer
Definition: stm32l4xx_hal_dfsdm.h:76
HAL_DFSDM_FilterInjectedStart_DMA
HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, int32_t *pData, uint32_t Length)
This function allows to start injected conversion in DMA mode.
Definition: stm32l4xx_hal_dfsdm.c:2445
HAL_DFSDM_CHANNEL_MSPINIT_CB_ID
Definition: stm32l4xx_hal_dfsdm.h:152
HAL_DFSDM_CHANNEL_STATE_ERROR
Definition: stm32l4xx_hal_dfsdm.h:56
DFSDM_Channel_OutputClockTypeDef::Selection
uint32_t Selection
Definition: stm32l4xx_hal_dfsdm.h:65
HAL_DFSDM_FilterConfigRegChannel
HAL_StatusTypeDef HAL_DFSDM_FilterConfigRegChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Channel, uint32_t ContinuousMode)
This function allows to select channel and to enable/disable continuous mode for regular conversion...
Definition: stm32l4xx_hal_dfsdm.c:1716
DFSDM_Filter_InjectedParamTypeDef::ScanMode
FunctionalState ScanMode
Definition: stm32l4xx_hal_dfsdm.h:193
DFSDM_Channel_InputTypeDef::Pins
uint32_t Pins
Definition: stm32l4xx_hal_dfsdm.h:83
endif
ADC handle Structure definition.
Definition: stm32l4xx_hal_adc.h:360
endif::Init
DFSDM_Channel_InitTypeDef Init
Definition: stm32l4xx_hal_dfsdm.h:134
DFSDM_Filter_AwdParamTypeDef::Channel
uint32_t Channel
Definition: stm32l4xx_hal_dfsdm.h:266
HAL_DFSDM_Channel_StateTypeDef
HAL_DFSDM_Channel_StateTypeDef
HAL DFSDM Channel states definition.
Definition: stm32l4xx_hal_dfsdm.h:52
HAL_DFSDM_ChannelMspInit
void HAL_DFSDM_ChannelMspInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
Initialize the DFSDM channel MSP.
Definition: stm32l4xx_hal_dfsdm.c:519
DFSDM_Filter_RegularParamTypeDef::DmaMode
FunctionalState DmaMode
Definition: stm32l4xx_hal_dfsdm.h:183
DFSDM_Channel_InputTypeDef::DataPacking
uint32_t DataPacking
Definition: stm32l4xx_hal_dfsdm.h:81
DFSDM_Channel_InputTypeDef
DFSDM channel input structure definition.
Definition: stm32l4xx_hal_dfsdm.h:74
HAL_DFSDM_FilterRegularMsbStart_DMA
HAL_StatusTypeDef HAL_DFSDM_FilterRegularMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, int16_t *pData, uint32_t Length)
This function allows to start regular conversion in DMA mode and to get only the 16 most significant ...
Definition: stm32l4xx_hal_dfsdm.c:2101
DFSDM_Filter_FilterParamTypeDef::IntOversampling
uint32_t IntOversampling
Definition: stm32l4xx_hal_dfsdm.h:210
pDFSDM_Filter_CallbackTypeDef
void(* pDFSDM_Filter_CallbackTypeDef)(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
DFSDM filter callback pointer definition.
Definition: stm32l4xx_hal_dfsdm.h:296
DFSDM_Channel_InitTypeDef::Awd
DFSDM_Channel_AwdTypeDef Awd
Definition: stm32l4xx_hal_dfsdm.h:117
HAL_DFSDM_CHANNEL_STATE_READY
Definition: stm32l4xx_hal_dfsdm.h:55
HAL_DFSDM_Filter_RegisterAwdCallback
HAL_StatusTypeDef HAL_DFSDM_Filter_RegisterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, pDFSDM_Filter_AwdCallbackTypeDef pCallback)
Register a user DFSDM filter analog watchdog callback to be used instead of the weak predefined callb...
Definition: stm32l4xx_hal_dfsdm.c:1634
HAL_DFSDM_ChannelCkabStop_IT
HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
This function allows to stop clock absence detection in interrupt mode.
Definition: stm32l4xx_hal_dfsdm.c:921
HAL_DFSDM_FilterRegularStop_DMA
HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
This function allows to stop regular conversion in DMA mode.
Definition: stm32l4xx_hal_dfsdm.c:2172
DFSDM_Filter_AwdParamTypeDef::HighThreshold
int32_t HighThreshold
Definition: stm32l4xx_hal_dfsdm.h:268
DFSDM_Filter_FilterParamTypeDef
DFSDM filter parameters structure definition.
Definition: stm32l4xx_hal_dfsdm.h:204
HAL_DFSDM_ChannelScdStart
HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, uint32_t Threshold, uint32_t BreakSignal)
This function allows to start short circuit detection in polling mode.
Definition: stm32l4xx_hal_dfsdm.c:961
HAL_DFSDM_Filter_UnRegisterAwdCallback
HAL_StatusTypeDef HAL_DFSDM_Filter_UnRegisterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
Unregister a user DFSDM filter analog watchdog callback. DFSDM filter AWD callback is redirected to t...
Definition: stm32l4xx_hal_dfsdm.c:1669
DFSDM_Filter_InitTypeDef::InjectedParam
DFSDM_Filter_InjectedParamTypeDef InjectedParam
Definition: stm32l4xx_hal_dfsdm.h:220
DFSDM_Channel_InitTypeDef::RightBitShift
uint32_t RightBitShift
Definition: stm32l4xx_hal_dfsdm.h:120
HAL_DFSDM_ChannelModifyOffset
HAL_StatusTypeDef HAL_DFSDM_ChannelModifyOffset(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, int32_t Offset)
This function allows to modify channel offset value.
Definition: stm32l4xx_hal_dfsdm.c:1187
HAL_DFSDM_FilterRegularStart_IT
HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
This function allows to start regular conversion in interrupt mode.
Definition: stm32l4xx_hal_dfsdm.c:1955
DFSDM_Filter_RegularParamTypeDef::Trigger
uint32_t Trigger
Definition: stm32l4xx_hal_dfsdm.h:180
DFSDM_Channel_OutputClockTypeDef
DFSDM channel output clock structure definition.
Definition: stm32l4xx_hal_dfsdm.h:62
DFSDM_Channel_SerialInterfaceTypeDef
DFSDM channel serial interface structure definition.
Definition: stm32l4xx_hal_dfsdm.h:90
HAL_DFSDM_ChannelInit
HAL_StatusTypeDef HAL_DFSDM_ChannelInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
Initialize the DFSDM channel according to the specified parameters in the DFSDM_ChannelInitTypeDef st...
Definition: stm32l4xx_hal_dfsdm.c:358
HAL_DFSDM_FILTER_ERROR_CB_ID
Definition: stm32l4xx_hal_dfsdm.h:288
HAL_DFSDM_FilterInjConvCpltCallback
void HAL_DFSDM_FilterInjConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
Injected conversion complete callback.
Definition: stm32l4xx_hal_dfsdm.c:3125
DFSDM_Filter_InjectedParamTypeDef::ExtTriggerEdge
uint32_t ExtTriggerEdge
Definition: stm32l4xx_hal_dfsdm.h:197
endif::ErrorCode
uint32_t ErrorCode
Definition: stm32l4xx_hal_dfsdm.h:245
HAL_DFSDM_FilterMspDeInit
void HAL_DFSDM_FilterMspDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
De-initializes the DFSDM filter MSP.
Definition: stm32l4xx_hal_dfsdm.c:1442
HAL_DFSDM_FilterMspInit
void HAL_DFSDM_FilterMspInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
Initializes the DFSDM filter MSP.
Definition: stm32l4xx_hal_dfsdm.c:1427
DFSDM_Channel_OutputClockTypeDef::Divider
uint32_t Divider
Definition: stm32l4xx_hal_dfsdm.h:67
endif::InjectedScanMode
FunctionalState InjectedScanMode
Definition: stm32l4xx_hal_dfsdm.h:241
HAL_DFSDM_FilterInjectedStop_DMA
HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
This function allows to stop injected conversion in DMA mode.
Definition: stm32l4xx_hal_dfsdm.c:2589
DFSDM_Channel_AwdTypeDef
DFSDM channel analog watchdog structure definition.
Definition: stm32l4xx_hal_dfsdm.h:101
HAL_DFSDM_Filter_CallbackIDTypeDef
HAL_DFSDM_Filter_CallbackIDTypeDef
DFSDM filter callback ID enumeration definition.
Definition: stm32l4xx_hal_dfsdm.h:282
HAL_DFSDM_FILTER_STATE_REG
Definition: stm32l4xx_hal_dfsdm.h:169
else
else
Definition: stm32l4xx_ll_lpuart.h:1488
DFSDM_Filter_FilterParamTypeDef::SincOrder
uint32_t SincOrder
Definition: stm32l4xx_hal_dfsdm.h:206
HAL_DFSDM_Channel_CallbackIDTypeDef
HAL_DFSDM_Channel_CallbackIDTypeDef
DFSDM channel callback ID enumeration definition.
Definition: stm32l4xx_hal_dfsdm.h:148
HAL_DFSDM_FILTER_MSPDEINIT_CB_ID
Definition: stm32l4xx_hal_dfsdm.h:290
endif::InjConvRemaining
uint32_t InjConvRemaining
Definition: stm32l4xx_hal_dfsdm.h:243