stm32l4xx_hal_nor.h

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/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L4xx_HAL_NOR_H
#define __STM32L4xx_HAL_NOR_H

#ifdef __cplusplus
 extern "C" {
#endif

#if defined(FMC_BANK1)

/* Includes ------------------------------------------------------------------*/
#include "stm32l4xx_ll_fmc.h"


/* Exported typedef ----------------------------------------------------------*/
typedef enum
{
  HAL_NOR_STATE_RESET             = 0x00U,  
  HAL_NOR_STATE_READY             = 0x01U,  
  HAL_NOR_STATE_BUSY              = 0x02U,  
  HAL_NOR_STATE_ERROR             = 0x03U,  
  HAL_NOR_STATE_PROTECTED         = 0x04U   
}HAL_NOR_StateTypeDef;

typedef enum
{
  HAL_NOR_STATUS_SUCCESS  = 0U,
  HAL_NOR_STATUS_ONGOING,
  HAL_NOR_STATUS_ERROR,
  HAL_NOR_STATUS_TIMEOUT
}HAL_NOR_StatusTypeDef;

typedef struct
{
  uint16_t Manufacturer_Code;  
  uint16_t Device_Code1;

  uint16_t Device_Code2;

  uint16_t Device_Code3;       
}NOR_IDTypeDef;

typedef struct
{
  uint16_t CFI_1;

  uint16_t CFI_2;

  uint16_t CFI_3;

  uint16_t CFI_4;
}NOR_CFITypeDef;

typedef struct
{
  FMC_NORSRAM_TypeDef           *Instance;    
  FMC_NORSRAM_EXTENDED_TypeDef  *Extended;    
  FMC_NORSRAM_InitTypeDef       Init;         
  HAL_LockTypeDef               Lock;         
  __IO HAL_NOR_StateTypeDef     State;        
}NOR_HandleTypeDef;
/* Exported constants --------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
#define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NOR_STATE_RESET)

/* Exported functions --------------------------------------------------------*/
/* Initialization/de-initialization functions  ********************************/
HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming);
HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor);
void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor);
void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor);
void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout);
/* I/O operation functions  ***************************************************/
HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID);
HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor);
HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData);
HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData);

HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize);
HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize);

HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAddress, uint32_t Address);
HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address);
HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR_CFI);
/* NOR Control functions  *****************************************************/
HAL_StatusTypeDef HAL_NOR_WriteOperation_Enable(NOR_HandleTypeDef *hnor);
HAL_StatusTypeDef HAL_NOR_WriteOperation_Disable(NOR_HandleTypeDef *hnor);
/* NOR State functions ********************************************************/
HAL_NOR_StateTypeDef HAL_NOR_GetState(NOR_HandleTypeDef *hnor);
HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Address, uint32_t Timeout);
/* Private types -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private constants ---------------------------------------------------------*/
/* NOR device IDs addresses */
#define MC_ADDRESS               ((uint16_t)0x0000U)
#define DEVICE_CODE1_ADDR        ((uint16_t)0x0001U)
#define DEVICE_CODE2_ADDR        ((uint16_t)0x000EU)
#define DEVICE_CODE3_ADDR        ((uint16_t)0x000FU)

/* NOR CFI IDs addresses */
#define CFI1_ADDRESS             ((uint16_t)0x61U)
#define CFI2_ADDRESS             ((uint16_t)0x62U)
#define CFI3_ADDRESS             ((uint16_t)0x63U)
#define CFI4_ADDRESS             ((uint16_t)0x64U)

/* NOR operation wait timeout */
#define NOR_TMEOUT               ((uint16_t)0xFFFFU)

/* NOR memory data width */
#define NOR_MEMORY_8B            ((uint8_t)0x0U)
#define NOR_MEMORY_16B           ((uint8_t)0x1U)

/* NOR memory device read/write start address */
#define NOR_MEMORY_ADRESS1       ((uint32_t)0x60000000U)
#define NOR_MEMORY_ADRESS2       ((uint32_t)0x64000000U)
#define NOR_MEMORY_ADRESS3       ((uint32_t)0x68000000U)
#define NOR_MEMORY_ADRESS4       ((uint32_t)0x6C000000U)

/* Private macros ------------------------------------------------------------*/
#define NOR_ADDR_SHIFT(__NOR_ADDRESS, __NOR_MEMORY_WIDTH_, __ADDRESS__)         \
              ((uint32_t)(((__NOR_MEMORY_WIDTH_) == NOR_MEMORY_16B)?            \
              ((uint32_t)((__NOR_ADDRESS) + (2 * (__ADDRESS__)))):              \
              ((uint32_t)((__NOR_ADDRESS) + (__ADDRESS__)))))

#define NOR_WRITE(__ADDRESS__, __DATA__)   do{                                                             \
                                               (*(__IO uint16_t *)((uint32_t)(__ADDRESS__)) = (__DATA__)); \
                                               __DSB();                                                    \
                                             } while(0)

#endif /* FMC_BANK1 */

#ifdef __cplusplus
}
#endif

#endif /* __STM32L4xx_HAL_NOR_H */

/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/