STM32L4xx_HAL_Driver  1.14.0
stm32l4xx_hal_usart.c
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1 
138 /* Includes ------------------------------------------------------------------*/
139 #include "stm32l4xx_hal.h"
140 
150 #ifdef HAL_USART_MODULE_ENABLED
151 
152 /* Private typedef -----------------------------------------------------------*/
153 /* Private define ------------------------------------------------------------*/
157 #define USART_DUMMY_DATA ((uint16_t) 0xFFFF)
158 #define USART_TEACK_REACK_TIMEOUT 1000U
159 #if defined(USART_CR1_FIFOEN)
160 #define USART_CR1_FIELDS ((uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | \
161  USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8 | \
162  USART_CR1_FIFOEN ))
164 #define USART_CR2_FIELDS ((uint32_t)(USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_CLKEN | \
165  USART_CR2_LBCL | USART_CR2_STOP | USART_CR2_SLVEN | \
166  USART_CR2_DIS_NSS))
168 #define USART_CR3_FIELDS ((uint32_t)(USART_CR3_TXFTCFG | USART_CR3_RXFTCFG ))
169 #else
170 #define USART_CR1_FIELDS ((uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | \
171  USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8))
172 #define USART_CR2_FIELDS ((uint32_t)(USART_CR2_CPHA | USART_CR2_CPOL | \
173  USART_CR2_CLKEN | USART_CR2_LBCL | USART_CR2_STOP))
174 #endif /* USART_CR1_FIFOEN */
175 
176 #define USART_BRR_MIN 0x10U /* USART BRR minimum authorized value */
177 #define USART_BRR_MAX 0xFFFFU /* USART BRR maximum authorized value */
178 
182 /* Private macros ------------------------------------------------------------*/
183 /* Private variables ---------------------------------------------------------*/
184 /* Private function prototypes -----------------------------------------------*/
188 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
190 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */
191 static void USART_EndTransfer(USART_HandleTypeDef *husart);
192 static void USART_DMATransmitCplt(DMA_HandleTypeDef *hdma);
193 static void USART_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
194 static void USART_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
195 static void USART_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
196 static void USART_DMAError(DMA_HandleTypeDef *hdma);
197 static void USART_DMAAbortOnError(DMA_HandleTypeDef *hdma);
200 static HAL_StatusTypeDef USART_WaitOnFlagUntilTimeout(USART_HandleTypeDef *husart, uint32_t Flag, FlagStatus Status,
201  uint32_t Tickstart, uint32_t Timeout);
202 static HAL_StatusTypeDef USART_SetConfig(USART_HandleTypeDef *husart);
203 static HAL_StatusTypeDef USART_CheckIdleState(USART_HandleTypeDef *husart);
204 static void USART_TxISR_8BIT(USART_HandleTypeDef *husart);
205 static void USART_TxISR_16BIT(USART_HandleTypeDef *husart);
206 #if defined(USART_CR1_FIFOEN)
207 static void USART_TxISR_8BIT_FIFOEN(USART_HandleTypeDef *husart);
208 static void USART_TxISR_16BIT_FIFOEN(USART_HandleTypeDef *husart);
209 #endif /* USART_CR1_FIFOEN */
210 static void USART_EndTransmit_IT(USART_HandleTypeDef *husart);
211 static void USART_RxISR_8BIT(USART_HandleTypeDef *husart);
212 static void USART_RxISR_16BIT(USART_HandleTypeDef *husart);
213 #if defined(USART_CR1_FIFOEN)
214 static void USART_RxISR_8BIT_FIFOEN(USART_HandleTypeDef *husart);
215 static void USART_RxISR_16BIT_FIFOEN(USART_HandleTypeDef *husart);
216 #endif /* USART_CR1_FIFOEN */
217 
218 
223 /* Exported functions --------------------------------------------------------*/
224 
286 HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart)
287 {
288  /* Check the USART handle allocation */
289  if (husart == NULL)
290  {
291  return HAL_ERROR;
292  }
293 
294  /* Check the parameters */
295  assert_param(IS_USART_INSTANCE(husart->Instance));
296 
297  if (husart->State == HAL_USART_STATE_RESET)
298  {
299  /* Allocate lock resource and initialize it */
300  husart->Lock = HAL_UNLOCKED;
301 
302 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
304 
305  if (husart->MspInitCallback == NULL)
306  {
308  }
309 
310  /* Init the low level hardware */
311  husart->MspInitCallback(husart);
312 #else
313  /* Init the low level hardware : GPIO, CLOCK */
314  HAL_USART_MspInit(husart);
315 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */
316  }
317 
318  husart->State = HAL_USART_STATE_BUSY;
319 
320  /* Disable the Peripheral */
321  __HAL_USART_DISABLE(husart);
322 
323  /* Set the Usart Communication parameters */
324  if (USART_SetConfig(husart) == HAL_ERROR)
325  {
326  return HAL_ERROR;
327  }
328 
329  /* In Synchronous mode, the following bits must be kept cleared:
330  - LINEN bit in the USART_CR2 register
331  - HDSEL, SCEN and IREN bits in the USART_CR3 register.*/
332  husart->Instance->CR2 &= ~USART_CR2_LINEN;
333  husart->Instance->CR3 &= ~(USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN);
334 
335  /* Enable the Peripheral */
336  __HAL_USART_ENABLE(husart);
337 
338  /* TEACK and/or REACK to check before moving husart->State to Ready */
339  return (USART_CheckIdleState(husart));
340 }
341 
347 HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart)
348 {
349  /* Check the USART handle allocation */
350  if (husart == NULL)
351  {
352  return HAL_ERROR;
353  }
354 
355  /* Check the parameters */
356  assert_param(IS_USART_INSTANCE(husart->Instance));
357 
358  husart->State = HAL_USART_STATE_BUSY;
359 
360  husart->Instance->CR1 = 0x0U;
361  husart->Instance->CR2 = 0x0U;
362  husart->Instance->CR3 = 0x0U;
363 
364 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
365  if (husart->MspDeInitCallback == NULL)
366  {
368  }
369  /* DeInit the low level hardware */
370  husart->MspDeInitCallback(husart);
371 #else
372  /* DeInit the low level hardware */
373  HAL_USART_MspDeInit(husart);
374 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */
375 
376  husart->ErrorCode = HAL_USART_ERROR_NONE;
377  husart->State = HAL_USART_STATE_RESET;
378 
379  /* Process Unlock */
380  __HAL_UNLOCK(husart);
381 
382  return HAL_OK;
383 }
384 
391 {
392  /* Prevent unused argument(s) compilation warning */
393  UNUSED(husart);
394 
395  /* NOTE : This function should not be modified, when the callback is needed,
396  the HAL_USART_MspInit can be implemented in the user file
397  */
398 }
399 
406 {
407  /* Prevent unused argument(s) compilation warning */
408  UNUSED(husart);
409 
410  /* NOTE : This function should not be modified, when the callback is needed,
411  the HAL_USART_MspDeInit can be implemented in the user file
412  */
413 }
414 
415 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
416 
437  pUSART_CallbackTypeDef pCallback)
438 {
439  HAL_StatusTypeDef status = HAL_OK;
440 
441  if (pCallback == NULL)
442  {
443  /* Update the error code */
444  husart->ErrorCode |= HAL_USART_ERROR_INVALID_CALLBACK;
445 
446  return HAL_ERROR;
447  }
448  /* Process locked */
449  __HAL_LOCK(husart);
450 
451  if (husart->State == HAL_USART_STATE_READY)
452  {
453  switch (CallbackID)
454  {
456  husart->TxHalfCpltCallback = pCallback;
457  break;
458 
460  husart->TxCpltCallback = pCallback;
461  break;
462 
464  husart->RxHalfCpltCallback = pCallback;
465  break;
466 
468  husart->RxCpltCallback = pCallback;
469  break;
470 
472  husart->TxRxCpltCallback = pCallback;
473  break;
474 
475  case HAL_USART_ERROR_CB_ID :
476  husart->ErrorCallback = pCallback;
477  break;
478 
480  husart->AbortCpltCallback = pCallback;
481  break;
482 
483 #if defined(USART_CR1_FIFOEN)
485  husart->RxFifoFullCallback = pCallback;
486  break;
487 
489  husart->TxFifoEmptyCallback = pCallback;
490  break;
491 #endif /* USART_CR1_FIFOEN */
492 
494  husart->MspInitCallback = pCallback;
495  break;
496 
498  husart->MspDeInitCallback = pCallback;
499  break;
500 
501  default :
502  /* Update the error code */
503  husart->ErrorCode |= HAL_USART_ERROR_INVALID_CALLBACK;
504 
505  /* Return error status */
506  status = HAL_ERROR;
507  break;
508  }
509  }
510  else if (husart->State == HAL_USART_STATE_RESET)
511  {
512  switch (CallbackID)
513  {
515  husart->MspInitCallback = pCallback;
516  break;
517 
519  husart->MspDeInitCallback = pCallback;
520  break;
521 
522  default :
523  /* Update the error code */
524  husart->ErrorCode |= HAL_USART_ERROR_INVALID_CALLBACK;
525 
526  /* Return error status */
527  status = HAL_ERROR;
528  break;
529  }
530  }
531  else
532  {
533  /* Update the error code */
534  husart->ErrorCode |= HAL_USART_ERROR_INVALID_CALLBACK;
535 
536  /* Return error status */
537  status = HAL_ERROR;
538  }
539 
540  /* Release Lock */
541  __HAL_UNLOCK(husart);
542 
543  return status;
544 }
545 
566 {
567  HAL_StatusTypeDef status = HAL_OK;
568 
569  /* Process locked */
570  __HAL_LOCK(husart);
571 
572  if (HAL_USART_STATE_READY == husart->State)
573  {
574  switch (CallbackID)
575  {
577  husart->TxHalfCpltCallback = HAL_USART_TxHalfCpltCallback; /* Legacy weak TxHalfCpltCallback */
578  break;
579 
581  husart->TxCpltCallback = HAL_USART_TxCpltCallback; /* Legacy weak TxCpltCallback */
582  break;
583 
585  husart->RxHalfCpltCallback = HAL_USART_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallback */
586  break;
587 
589  husart->RxCpltCallback = HAL_USART_RxCpltCallback; /* Legacy weak RxCpltCallback */
590  break;
591 
593  husart->TxRxCpltCallback = HAL_USART_TxRxCpltCallback; /* Legacy weak TxRxCpltCallback */
594  break;
595 
596  case HAL_USART_ERROR_CB_ID :
597  husart->ErrorCallback = HAL_USART_ErrorCallback; /* Legacy weak ErrorCallback */
598  break;
599 
601  husart->AbortCpltCallback = HAL_USART_AbortCpltCallback; /* Legacy weak AbortCpltCallback */
602  break;
603 
604 #if defined(USART_CR1_FIFOEN)
606  husart->RxFifoFullCallback = HAL_USARTEx_RxFifoFullCallback; /* Legacy weak RxFifoFullCallback */
607  break;
608 
610  husart->TxFifoEmptyCallback = HAL_USARTEx_TxFifoEmptyCallback; /* Legacy weak TxFifoEmptyCallback */
611  break;
612 #endif /* USART_CR1_FIFOEN */
613 
615  husart->MspInitCallback = HAL_USART_MspInit; /* Legacy weak MspInitCallback */
616  break;
617 
619  husart->MspDeInitCallback = HAL_USART_MspDeInit; /* Legacy weak MspDeInitCallback */
620  break;
621 
622  default :
623  /* Update the error code */
624  husart->ErrorCode |= HAL_USART_ERROR_INVALID_CALLBACK;
625 
626  /* Return error status */
627  status = HAL_ERROR;
628  break;
629  }
630  }
631  else if (HAL_USART_STATE_RESET == husart->State)
632  {
633  switch (CallbackID)
634  {
637  break;
638 
641  break;
642 
643  default :
644  /* Update the error code */
645  husart->ErrorCode |= HAL_USART_ERROR_INVALID_CALLBACK;
646 
647  /* Return error status */
648  status = HAL_ERROR;
649  break;
650  }
651  }
652  else
653  {
654  /* Update the error code */
655  husart->ErrorCode |= HAL_USART_ERROR_INVALID_CALLBACK;
656 
657  /* Return error status */
658  status = HAL_ERROR;
659  }
660 
661  /* Release Lock */
662  __HAL_UNLOCK(husart);
663 
664  return status;
665 }
666 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */
667 
668 
758 HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size, uint32_t Timeout)
759 {
760  uint8_t *ptxdata8bits;
761  uint16_t *ptxdata16bits;
762  uint32_t tickstart;
763 
764  if (husart->State == HAL_USART_STATE_READY)
765  {
766  if ((pTxData == NULL) || (Size == 0U))
767  {
768  return HAL_ERROR;
769  }
770 
771  /* Process Locked */
772  __HAL_LOCK(husart);
773 
774  husart->ErrorCode = HAL_USART_ERROR_NONE;
775  husart->State = HAL_USART_STATE_BUSY_TX;
776 
777  /* Init tickstart for timeout managment*/
778  tickstart = HAL_GetTick();
779 
780  husart->TxXferSize = Size;
781  husart->TxXferCount = Size;
782 
783  /* In case of 9bits/No Parity transfer, pTxData needs to be handled as a uint16_t pointer */
784  if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
785  {
786  ptxdata8bits = NULL;
787  ptxdata16bits = (uint16_t *) pTxData;
788  }
789  else
790  {
791  ptxdata8bits = pTxData;
792  ptxdata16bits = NULL;
793  }
794 
795  /* Check the remaining data to be sent */
796  while (husart->TxXferCount > 0U)
797  {
798  if (USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
799  {
800  return HAL_TIMEOUT;
801  }
802  if (ptxdata8bits == NULL)
803  {
804  husart->Instance->TDR = (uint16_t)(*ptxdata16bits & 0x01FFU);
805  ptxdata16bits++;
806  }
807  else
808  {
809  husart->Instance->TDR = (uint8_t)(*ptxdata8bits & 0xFFU);
810  ptxdata8bits++;
811  }
812 
813  husart->TxXferCount--;
814  }
815 
816  if (USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
817  {
818  return HAL_TIMEOUT;
819  }
820 
821  /* Clear Transmission Complete Flag */
822  __HAL_USART_CLEAR_FLAG(husart, USART_CLEAR_TCF);
823 
824  /* Clear overrun flag and discard the received data */
825  __HAL_USART_CLEAR_OREFLAG(husart);
826  __HAL_USART_SEND_REQ(husart, USART_RXDATA_FLUSH_REQUEST);
827  __HAL_USART_SEND_REQ(husart, USART_TXDATA_FLUSH_REQUEST);
828 
829  /* At end of Tx process, restore husart->State to Ready */
830  husart->State = HAL_USART_STATE_READY;
831 
832  /* Process Unlocked */
833  __HAL_UNLOCK(husart);
834 
835  return HAL_OK;
836  }
837  else
838  {
839  return HAL_BUSY;
840  }
841 }
842 
852 HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size, uint32_t Timeout)
853 {
854  uint8_t *prxdata8bits;
855  uint16_t *prxdata16bits;
856  uint16_t uhMask;
857  uint32_t tickstart;
858 
859  if (husart->State == HAL_USART_STATE_READY)
860  {
861  if ((pRxData == NULL) || (Size == 0U))
862  {
863  return HAL_ERROR;
864  }
865 
866  /* Process Locked */
867  __HAL_LOCK(husart);
868 
869  husart->ErrorCode = HAL_USART_ERROR_NONE;
870  husart->State = HAL_USART_STATE_BUSY_RX;
871 
872  /* Init tickstart for timeout managment*/
873  tickstart = HAL_GetTick();
874 
875  husart->RxXferSize = Size;
876  husart->RxXferCount = Size;
877 
878  /* Computation of USART mask to apply to RDR register */
879  USART_MASK_COMPUTATION(husart);
880  uhMask = husart->Mask;
881 
882  /* In case of 9bits/No Parity transfer, pRxData needs to be handled as a uint16_t pointer */
883  if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
884  {
885  prxdata8bits = NULL;
886  prxdata16bits = (uint16_t *) pRxData;
887  }
888  else
889  {
890  prxdata8bits = pRxData;
891  prxdata16bits = NULL;
892  }
893 
894  /* as long as data have to be received */
895  while (husart->RxXferCount > 0U)
896  {
897 #if defined(USART_CR2_SLVEN)
898  if (husart->SlaveMode == USART_SLAVEMODE_DISABLE)
899 #endif /* USART_CR2_SLVEN */
900  {
901  /* Wait until TXE flag is set to send dummy byte in order to generate the
902  * clock for the slave to send data.
903  * Whatever the frame length (7, 8 or 9-bit long), the same dummy value
904  * can be written for all the cases. */
905  if (USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
906  {
907  return HAL_TIMEOUT;
908  }
909  husart->Instance->TDR = (USART_DUMMY_DATA & (uint16_t)0x0FF);
910  }
911 
912  /* Wait for RXNE Flag */
913  if (USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
914  {
915  return HAL_TIMEOUT;
916  }
917 
918  if (prxdata8bits == NULL)
919  {
920  *prxdata16bits = (uint16_t)(husart->Instance->RDR & uhMask);
921  prxdata16bits++;
922  }
923  else
924  {
925  *prxdata8bits = (uint8_t)(husart->Instance->RDR & (uint8_t)(uhMask & 0xFFU));
926  prxdata8bits++;
927  }
928 
929  husart->RxXferCount--;
930 
931  }
932 
933 #if defined(USART_CR2_SLVEN)
934  /* Clear SPI slave underrun flag and discard transmit data */
935  if (husart->SlaveMode == USART_SLAVEMODE_ENABLE)
936  {
937  __HAL_USART_CLEAR_UDRFLAG(husart);
938  __HAL_USART_SEND_REQ(husart, USART_TXDATA_FLUSH_REQUEST);
939  }
940 #endif /* USART_CR2_SLVEN */
941 
942  /* At end of Rx process, restore husart->State to Ready */
943  husart->State = HAL_USART_STATE_READY;
944 
945  /* Process Unlocked */
946  __HAL_UNLOCK(husart);
947 
948  return HAL_OK;
949  }
950  else
951  {
952  return HAL_BUSY;
953  }
954 }
955 
965 HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData,
966  uint16_t Size, uint32_t Timeout)
967 {
968  uint8_t *prxdata8bits;
969  uint16_t *prxdata16bits;
970  uint8_t *ptxdata8bits;
971  uint16_t *ptxdata16bits;
972  uint16_t uhMask;
973  uint16_t rxdatacount;
974  uint32_t tickstart;
975 
976  if (husart->State == HAL_USART_STATE_READY)
977  {
978  if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U))
979  {
980  return HAL_ERROR;
981  }
982 
983  /* Process Locked */
984  __HAL_LOCK(husart);
985 
986  husart->ErrorCode = HAL_USART_ERROR_NONE;
987  husart->State = HAL_USART_STATE_BUSY_RX;
988 
989  /* Init tickstart for timeout managment*/
990  tickstart = HAL_GetTick();
991 
992  husart->RxXferSize = Size;
993  husart->TxXferSize = Size;
994  husart->TxXferCount = Size;
995  husart->RxXferCount = Size;
996 
997  /* Computation of USART mask to apply to RDR register */
998  USART_MASK_COMPUTATION(husart);
999  uhMask = husart->Mask;
1000 
1001  /* In case of 9bits/No Parity transfer, pRxData needs to be handled as a uint16_t pointer */
1002  if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
1003  {
1004  prxdata8bits = NULL;
1005  ptxdata8bits = NULL;
1006  ptxdata16bits = (uint16_t *) pTxData;
1007  prxdata16bits = (uint16_t *) pRxData;
1008  }
1009  else
1010  {
1011  prxdata8bits = pRxData;
1012  ptxdata8bits = pTxData;
1013  ptxdata16bits = NULL;
1014  prxdata16bits = NULL;
1015  }
1016 
1017 #if defined(USART_CR2_SLVEN)
1018  if ((husart->TxXferCount == 0x01U) || (husart->SlaveMode == USART_SLAVEMODE_ENABLE))
1019 #else
1020  if (husart->TxXferCount == 0x01U)
1021 #endif /* USART_CR2_SLVEN */
1022  {
1023  /* Wait until TXE flag is set to send data */
1024  if (USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
1025  {
1026  return HAL_TIMEOUT;
1027  }
1028  if (ptxdata8bits == NULL)
1029  {
1030  husart->Instance->TDR = (uint16_t)(*ptxdata16bits & uhMask);
1031  ptxdata16bits++;
1032  }
1033  else
1034  {
1035  husart->Instance->TDR = (uint8_t)(*ptxdata8bits & (uint8_t)(uhMask & 0xFFU));
1036  ptxdata8bits++;
1037  }
1038 
1039  husart->TxXferCount--;
1040  }
1041 
1042  /* Check the remain data to be sent */
1043  /* rxdatacount is a temporary variable for MISRAC2012-Rule-13.5 */
1044  rxdatacount = husart->RxXferCount;
1045  while ((husart->TxXferCount > 0U) || (rxdatacount > 0U))
1046  {
1047  if (husart->TxXferCount > 0U)
1048  {
1049  /* Wait until TXE flag is set to send data */
1050  if (USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
1051  {
1052  return HAL_TIMEOUT;
1053  }
1054  if (ptxdata8bits == NULL)
1055  {
1056  husart->Instance->TDR = (uint16_t)(*ptxdata16bits & uhMask);
1057  ptxdata16bits++;
1058  }
1059  else
1060  {
1061  husart->Instance->TDR = (uint8_t)(*ptxdata8bits & (uint8_t)(uhMask & 0xFFU));
1062  ptxdata8bits++;
1063  }
1064 
1065  husart->TxXferCount--;
1066  }
1067 
1068  if (husart->RxXferCount > 0U)
1069  {
1070  /* Wait for RXNE Flag */
1071  if (USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
1072  {
1073  return HAL_TIMEOUT;
1074  }
1075 
1076  if (prxdata8bits == NULL)
1077  {
1078  *prxdata16bits = (uint16_t)(husart->Instance->RDR & uhMask);
1079  prxdata16bits++;
1080  }
1081  else
1082  {
1083  *prxdata8bits = (uint8_t)(husart->Instance->RDR & (uint8_t)(uhMask & 0xFFU));
1084  prxdata8bits++;
1085  }
1086 
1087  husart->RxXferCount--;
1088  }
1089  rxdatacount = husart->RxXferCount;
1090  }
1091 
1092  /* At end of TxRx process, restore husart->State to Ready */
1093  husart->State = HAL_USART_STATE_READY;
1094 
1095  /* Process Unlocked */
1096  __HAL_UNLOCK(husart);
1097 
1098  return HAL_OK;
1099  }
1100  else
1101  {
1102  return HAL_BUSY;
1103  }
1104 }
1105 
1113 HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size)
1114 {
1115  if (husart->State == HAL_USART_STATE_READY)
1116  {
1117  if ((pTxData == NULL) || (Size == 0U))
1118  {
1119  return HAL_ERROR;
1120  }
1121 
1122  /* Process Locked */
1123  __HAL_LOCK(husart);
1124 
1125  husart->pTxBuffPtr = pTxData;
1126  husart->TxXferSize = Size;
1127  husart->TxXferCount = Size;
1128  husart->TxISR = NULL;
1129 
1130  husart->ErrorCode = HAL_USART_ERROR_NONE;
1131  husart->State = HAL_USART_STATE_BUSY_TX;
1132 
1133  /* The USART Error Interrupts: (Frame error, noise error, overrun error)
1134  are not managed by the USART Transmit Process to avoid the overrun interrupt
1135  when the usart mode is configured for transmit and receive "USART_MODE_TX_RX"
1136  to benefit for the frame error and noise interrupts the usart mode should be
1137  configured only for transmit "USART_MODE_TX" */
1138 
1139 #if defined(USART_CR1_FIFOEN)
1140  /* Configure Tx interrupt processing */
1141  if (husart->FifoMode == USART_FIFOMODE_ENABLE)
1142  {
1143  /* Set the Tx ISR function pointer according to the data word length */
1144  if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
1145  {
1146  husart->TxISR = USART_TxISR_16BIT_FIFOEN;
1147  }
1148  else
1149  {
1150  husart->TxISR = USART_TxISR_8BIT_FIFOEN;
1151  }
1152 
1153  /* Process Unlocked */
1154  __HAL_UNLOCK(husart);
1155 
1156  /* Enable the TX FIFO threshold interrupt */
1157  __HAL_USART_ENABLE_IT(husart, USART_IT_TXFT);
1158  }
1159  else
1160 #endif /* USART_CR1_FIFOEN */
1161  {
1162  /* Set the Tx ISR function pointer according to the data word length */
1163  if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
1164  {
1165  husart->TxISR = USART_TxISR_16BIT;
1166  }
1167  else
1168  {
1169  husart->TxISR = USART_TxISR_8BIT;
1170  }
1171 
1172  /* Process Unlocked */
1173  __HAL_UNLOCK(husart);
1174 
1175  /* Enable the USART Transmit Data Register Empty Interrupt */
1176  __HAL_USART_ENABLE_IT(husart, USART_IT_TXE);
1177  }
1178 
1179  return HAL_OK;
1180  }
1181  else
1182  {
1183  return HAL_BUSY;
1184  }
1185 }
1186 
1195 HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size)
1196 {
1197 #if defined(USART_CR1_FIFOEN)
1198  uint16_t nb_dummy_data;
1199 #endif /* USART_CR1_FIFOEN */
1200 
1201  if (husart->State == HAL_USART_STATE_READY)
1202  {
1203  if ((pRxData == NULL) || (Size == 0U))
1204  {
1205  return HAL_ERROR;
1206  }
1207 
1208  /* Process Locked */
1209  __HAL_LOCK(husart);
1210 
1211  husart->pRxBuffPtr = pRxData;
1212  husart->RxXferSize = Size;
1213  husart->RxXferCount = Size;
1214  husart->RxISR = NULL;
1215 
1216  USART_MASK_COMPUTATION(husart);
1217 
1218  husart->ErrorCode = HAL_USART_ERROR_NONE;
1219  husart->State = HAL_USART_STATE_BUSY_RX;
1220 
1221  /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */
1222  SET_BIT(husart->Instance->CR3, USART_CR3_EIE);
1223 
1224 #if defined(USART_CR1_FIFOEN)
1225  /* Configure Rx interrupt processing */
1226  if ((husart->FifoMode == USART_FIFOMODE_ENABLE) && (Size >= husart->NbRxDataToProcess))
1227  {
1228  /* Set the Rx ISR function pointer according to the data word length */
1229  if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
1230  {
1231  husart->RxISR = USART_RxISR_16BIT_FIFOEN;
1232  }
1233  else
1234  {
1235  husart->RxISR = USART_RxISR_8BIT_FIFOEN;
1236  }
1237 
1238  /* Process Unlocked */
1239  __HAL_UNLOCK(husart);
1240 
1241  /* Enable the USART Parity Error interrupt and RX FIFO Threshold interrupt */
1242  SET_BIT(husart->Instance->CR1, USART_CR1_PEIE);
1243  SET_BIT(husart->Instance->CR3, USART_CR3_RXFTIE);
1244  }
1245  else
1246 #endif /* USART_CR1_FIFOEN */
1247  {
1248  /* Set the Rx ISR function pointer according to the data word length */
1249  if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
1250  {
1251  husart->RxISR = USART_RxISR_16BIT;
1252  }
1253  else
1254  {
1255  husart->RxISR = USART_RxISR_8BIT;
1256  }
1257 
1258  /* Process Unlocked */
1259  __HAL_UNLOCK(husart);
1260 
1261  /* Enable the USART Parity Error and Data Register not empty Interrupts */
1262 #if defined(USART_CR1_FIFOEN)
1263  SET_BIT(husart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE);
1264 #else
1265  SET_BIT(husart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE);
1266 #endif /* USART_CR1_FIFOEN */
1267  }
1268 
1269 #if defined(USART_CR2_SLVEN)
1270  if (husart->SlaveMode == USART_SLAVEMODE_DISABLE)
1271 #endif /* USART_CR2_SLVEN */
1272  {
1273  /* Send dummy data in order to generate the clock for the Slave to send the next data.
1274  When FIFO mode is disabled only one data must be transferred.
1275  When FIFO mode is enabled data must be transmitted until the RX FIFO reaches its threshold.
1276  */
1277 #if defined(USART_CR1_FIFOEN)
1278  if ((husart->FifoMode == USART_FIFOMODE_ENABLE) && (Size >= husart->NbRxDataToProcess))
1279  {
1280  for (nb_dummy_data = husart->NbRxDataToProcess ; nb_dummy_data > 0U ; nb_dummy_data--)
1281  {
1282  husart->Instance->TDR = (USART_DUMMY_DATA & (uint16_t)0x00FF);
1283  }
1284  }
1285  else
1286 #endif /* USART_CR1_FIFOEN */
1287  {
1288  husart->Instance->TDR = (USART_DUMMY_DATA & (uint16_t)0x00FF);
1289  }
1290  }
1291 
1292  return HAL_OK;
1293  }
1294  else
1295  {
1296  return HAL_BUSY;
1297  }
1298 }
1299 
1308 HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData,
1309  uint16_t Size)
1310 {
1311 
1312  if (husart->State == HAL_USART_STATE_READY)
1313  {
1314  if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U))
1315  {
1316  return HAL_ERROR;
1317  }
1318 
1319  /* Process Locked */
1320  __HAL_LOCK(husart);
1321 
1322  husart->pRxBuffPtr = pRxData;
1323  husart->RxXferSize = Size;
1324  husart->RxXferCount = Size;
1325  husart->pTxBuffPtr = pTxData;
1326  husart->TxXferSize = Size;
1327  husart->TxXferCount = Size;
1328 
1329  /* Computation of USART mask to apply to RDR register */
1330  USART_MASK_COMPUTATION(husart);
1331 
1332  husart->ErrorCode = HAL_USART_ERROR_NONE;
1334 
1335 #if defined(USART_CR1_FIFOEN)
1336  /* Configure TxRx interrupt processing */
1337  if ((husart->FifoMode == USART_FIFOMODE_ENABLE) && (Size >= husart->NbRxDataToProcess))
1338  {
1339  /* Set the Rx ISR function pointer according to the data word length */
1340  if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
1341  {
1342  husart->TxISR = USART_TxISR_16BIT_FIFOEN;
1343  husart->RxISR = USART_RxISR_16BIT_FIFOEN;
1344  }
1345  else
1346  {
1347  husart->TxISR = USART_TxISR_8BIT_FIFOEN;
1348  husart->RxISR = USART_RxISR_8BIT_FIFOEN;
1349  }
1350 
1351  /* Process Locked */
1352  __HAL_UNLOCK(husart);
1353 
1354  /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */
1355  SET_BIT(husart->Instance->CR3, USART_CR3_EIE);
1356 
1357  /* Enable the USART Parity Error interrupt */
1358  SET_BIT(husart->Instance->CR1, USART_CR1_PEIE);
1359 
1360  /* Enable the TX and RX FIFO Threshold interrupts */
1361  SET_BIT(husart->Instance->CR3, (USART_CR3_TXFTIE | USART_CR3_RXFTIE));
1362  }
1363  else
1364 #endif /* USART_CR1_FIFOEN */
1365  {
1366  if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
1367  {
1368  husart->TxISR = USART_TxISR_16BIT;
1369  husart->RxISR = USART_RxISR_16BIT;
1370  }
1371  else
1372  {
1373  husart->TxISR = USART_TxISR_8BIT;
1374  husart->RxISR = USART_RxISR_8BIT;
1375  }
1376 
1377  /* Process Locked */
1378  __HAL_UNLOCK(husart);
1379 
1380  /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */
1381  SET_BIT(husart->Instance->CR3, USART_CR3_EIE);
1382 
1383  /* Enable the USART Parity Error and USART Data Register not empty Interrupts */
1384 #if defined(USART_CR1_FIFOEN)
1385  SET_BIT(husart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE);
1386 #else
1387  SET_BIT(husart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE);
1388 #endif /* USART_CR1_FIFOEN */
1389 
1390  /* Enable the USART Transmit Data Register Empty Interrupt */
1391 #if defined(USART_CR1_FIFOEN)
1392  SET_BIT(husart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
1393 #else
1394  SET_BIT(husart->Instance->CR1, USART_CR1_TXEIE);
1395 #endif /* USART_CR1_FIFOEN */
1396  }
1397 
1398  return HAL_OK;
1399  }
1400  else
1401  {
1402  return HAL_BUSY;
1403  }
1404 }
1405 
1413 HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size)
1414 {
1415  HAL_StatusTypeDef status = HAL_OK;
1416  uint32_t *tmp;
1417 
1418  if (husart->State == HAL_USART_STATE_READY)
1419  {
1420  if ((pTxData == NULL) || (Size == 0U))
1421  {
1422  return HAL_ERROR;
1423  }
1424 
1425  /* Process Locked */
1426  __HAL_LOCK(husart);
1427 
1428  husart->pTxBuffPtr = pTxData;
1429  husart->TxXferSize = Size;
1430  husart->TxXferCount = Size;
1431 
1432  husart->ErrorCode = HAL_USART_ERROR_NONE;
1433  husart->State = HAL_USART_STATE_BUSY_TX;
1434 
1435  if (husart->hdmatx != NULL)
1436  {
1437  /* Set the USART DMA transfer complete callback */
1439 
1440  /* Set the USART DMA Half transfer complete callback */
1442 
1443  /* Set the DMA error callback */
1445 
1446  /* Enable the USART transmit DMA channel */
1447  tmp = (uint32_t *)&pTxData;
1448  status = HAL_DMA_Start_IT(husart->hdmatx, *(uint32_t *)tmp, (uint32_t)&husart->Instance->TDR, Size);
1449  }
1450 
1451  if (status == HAL_OK)
1452  {
1453  /* Clear the TC flag in the ICR register */
1454  __HAL_USART_CLEAR_FLAG(husart, USART_CLEAR_TCF);
1455 
1456  /* Process Unlocked */
1457  __HAL_UNLOCK(husart);
1458 
1459  /* Enable the DMA transfer for transmit request by setting the DMAT bit
1460  in the USART CR3 register */
1461  SET_BIT(husart->Instance->CR3, USART_CR3_DMAT);
1462 
1463  return HAL_OK;
1464  }
1465  else
1466  {
1467  /* Set error code to DMA */
1468  husart->ErrorCode = HAL_USART_ERROR_DMA;
1469 
1470  /* Process Unlocked */
1471  __HAL_UNLOCK(husart);
1472 
1473  /* Restore husart->State to ready */
1474  husart->State = HAL_USART_STATE_READY;
1475 
1476  return HAL_ERROR;
1477  }
1478  }
1479  else
1480  {
1481  return HAL_BUSY;
1482  }
1483 }
1484 
1495 HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size)
1496 {
1497  HAL_StatusTypeDef status = HAL_OK;
1498  uint32_t *tmp = (uint32_t *)&pRxData;
1499 
1500  /* Check that a Rx process is not already ongoing */
1501  if (husart->State == HAL_USART_STATE_READY)
1502  {
1503  if ((pRxData == NULL) || (Size == 0U))
1504  {
1505  return HAL_ERROR;
1506  }
1507 
1508  /* Process Locked */
1509  __HAL_LOCK(husart);
1510 
1511  husart->pRxBuffPtr = pRxData;
1512  husart->RxXferSize = Size;
1513  husart->pTxBuffPtr = pRxData;
1514  husart->TxXferSize = Size;
1515 
1516  husart->ErrorCode = HAL_USART_ERROR_NONE;
1517  husart->State = HAL_USART_STATE_BUSY_RX;
1518 
1519  if (husart->hdmarx != NULL)
1520  {
1521  /* Set the USART DMA Rx transfer complete callback */
1523 
1524  /* Set the USART DMA Half transfer complete callback */
1526 
1527  /* Set the USART DMA Rx transfer error callback */
1529 
1530  /* Enable the USART receive DMA channel */
1531  status = HAL_DMA_Start_IT(husart->hdmarx, (uint32_t)&husart->Instance->RDR, *(uint32_t *)tmp, Size);
1532  }
1533 
1534 #if defined(USART_CR2_SLVEN)
1535  if ((status == HAL_OK) &&
1536  (husart->SlaveMode == USART_SLAVEMODE_DISABLE))
1537 #endif /* USART_CR2_SLVEN */
1538  {
1539  /* Enable the USART transmit DMA channel: the transmit channel is used in order
1540  to generate in the non-blocking mode the clock to the slave device,
1541  this mode isn't a simplex receive mode but a full-duplex receive mode */
1542 
1543  /* Set the USART DMA Tx Complete and Error callback to Null */
1544  if (husart->hdmatx != NULL)
1545  {
1546  husart->hdmatx->XferErrorCallback = NULL;
1547  husart->hdmatx->XferHalfCpltCallback = NULL;
1548  husart->hdmatx->XferCpltCallback = NULL;
1549  status = HAL_DMA_Start_IT(husart->hdmatx, *(uint32_t *)tmp, (uint32_t)&husart->Instance->TDR, Size);
1550  }
1551  }
1552 
1553  if (status == HAL_OK)
1554  {
1555  /* Process Unlocked */
1556  __HAL_UNLOCK(husart);
1557 
1558  /* Enable the USART Parity Error Interrupt */
1559  SET_BIT(husart->Instance->CR1, USART_CR1_PEIE);
1560 
1561  /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */
1562  SET_BIT(husart->Instance->CR3, USART_CR3_EIE);
1563 
1564  /* Enable the DMA transfer for the receiver request by setting the DMAR bit
1565  in the USART CR3 register */
1566  SET_BIT(husart->Instance->CR3, USART_CR3_DMAR);
1567 
1568  /* Enable the DMA transfer for transmit request by setting the DMAT bit
1569  in the USART CR3 register */
1570  SET_BIT(husart->Instance->CR3, USART_CR3_DMAT);
1571 
1572  return HAL_OK;
1573  }
1574  else
1575  {
1576  if (husart->hdmarx != NULL)
1577  {
1578  status = HAL_DMA_Abort(husart->hdmarx);
1579  }
1580 
1581  /* No need to check on error code */
1582  UNUSED(status);
1583 
1584  /* Set error code to DMA */
1585  husart->ErrorCode = HAL_USART_ERROR_DMA;
1586 
1587  /* Process Unlocked */
1588  __HAL_UNLOCK(husart);
1589 
1590  /* Restore husart->State to ready */
1591  husart->State = HAL_USART_STATE_READY;
1592 
1593  return HAL_ERROR;
1594  }
1595  }
1596  else
1597  {
1598  return HAL_BUSY;
1599  }
1600 }
1601 
1611 HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData,
1612  uint16_t Size)
1613 {
1614  HAL_StatusTypeDef status;
1615  uint32_t *tmp;
1616 
1617  if (husart->State == HAL_USART_STATE_READY)
1618  {
1619  if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U))
1620  {
1621  return HAL_ERROR;
1622  }
1623 
1624  /* Process Locked */
1625  __HAL_LOCK(husart);
1626 
1627  husart->pRxBuffPtr = pRxData;
1628  husart->RxXferSize = Size;
1629  husart->pTxBuffPtr = pTxData;
1630  husart->TxXferSize = Size;
1631 
1632  husart->ErrorCode = HAL_USART_ERROR_NONE;
1634 
1635  if ((husart->hdmarx != NULL) && (husart->hdmatx != NULL))
1636  {
1637  /* Set the USART DMA Rx transfer complete callback */
1639 
1640  /* Set the USART DMA Half transfer complete callback */
1642 
1643  /* Set the USART DMA Tx transfer complete callback */
1645 
1646  /* Set the USART DMA Half transfer complete callback */
1648 
1649  /* Set the USART DMA Tx transfer error callback */
1651 
1652  /* Set the USART DMA Rx transfer error callback */
1654 
1655  /* Enable the USART receive DMA channel */
1656  tmp = (uint32_t *)&pRxData;
1657  status = HAL_DMA_Start_IT(husart->hdmarx, (uint32_t)&husart->Instance->RDR, *(uint32_t *)tmp, Size);
1658 
1659  /* Enable the USART transmit DMA channel */
1660  if (status == HAL_OK)
1661  {
1662  tmp = (uint32_t *)&pTxData;
1663  status = HAL_DMA_Start_IT(husart->hdmatx, *(uint32_t *)tmp, (uint32_t)&husart->Instance->TDR, Size);
1664  }
1665  }
1666  else
1667  {
1668  status = HAL_ERROR;
1669  }
1670 
1671  if (status == HAL_OK)
1672  {
1673  /* Process Unlocked */
1674  __HAL_UNLOCK(husart);
1675 
1676  /* Enable the USART Parity Error Interrupt */
1677  SET_BIT(husart->Instance->CR1, USART_CR1_PEIE);
1678 
1679  /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */
1680  SET_BIT(husart->Instance->CR3, USART_CR3_EIE);
1681 
1682  /* Clear the TC flag in the ICR register */
1683  __HAL_USART_CLEAR_FLAG(husart, USART_CLEAR_TCF);
1684 
1685  /* Enable the DMA transfer for the receiver request by setting the DMAR bit
1686  in the USART CR3 register */
1687  SET_BIT(husart->Instance->CR3, USART_CR3_DMAR);
1688 
1689  /* Enable the DMA transfer for transmit request by setting the DMAT bit
1690  in the USART CR3 register */
1691  SET_BIT(husart->Instance->CR3, USART_CR3_DMAT);
1692 
1693  return HAL_OK;
1694  }
1695  else
1696  {
1697  if (husart->hdmarx != NULL)
1698  {
1699  status = HAL_DMA_Abort(husart->hdmarx);
1700  }
1701 
1702  /* No need to check on error code */
1703  UNUSED(status);
1704 
1705  /* Set error code to DMA */
1706  husart->ErrorCode = HAL_USART_ERROR_DMA;
1707 
1708  /* Process Unlocked */
1709  __HAL_UNLOCK(husart);
1710 
1711  /* Restore husart->State to ready */
1712  husart->State = HAL_USART_STATE_READY;
1713 
1714  return HAL_ERROR;
1715  }
1716  }
1717  else
1718  {
1719  return HAL_BUSY;
1720  }
1721 }
1722 
1728 HAL_StatusTypeDef HAL_USART_DMAPause(USART_HandleTypeDef *husart)
1729 {
1730  const HAL_USART_StateTypeDef state = husart->State;
1731 
1732  /* Process Locked */
1733  __HAL_LOCK(husart);
1734 
1735  if ((HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAT)) &&
1736  (state == HAL_USART_STATE_BUSY_TX))
1737  {
1738  /* Disable the USART DMA Tx request */
1739  CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
1740  }
1741  else if ((state == HAL_USART_STATE_BUSY_RX) ||
1742  (state == HAL_USART_STATE_BUSY_TX_RX))
1743  {
1744  if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAT))
1745  {
1746  /* Disable the USART DMA Tx request */
1747  CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
1748  }
1749  if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR))
1750  {
1751  /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
1752  CLEAR_BIT(husart->Instance->CR1, USART_CR1_PEIE);
1753  CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
1754 
1755  /* Disable the USART DMA Rx request */
1756  CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR);
1757  }
1758  }
1759  else
1760  {
1761  /* Nothing to do */
1762  }
1763 
1764  /* Process Unlocked */
1765  __HAL_UNLOCK(husart);
1766 
1767  return HAL_OK;
1768 }
1769 
1775 HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *husart)
1776 {
1777  const HAL_USART_StateTypeDef state = husart->State;
1778 
1779  /* Process Locked */
1780  __HAL_LOCK(husart);
1781 
1782  if (state == HAL_USART_STATE_BUSY_TX)
1783  {
1784  /* Enable the USART DMA Tx request */
1785  SET_BIT(husart->Instance->CR3, USART_CR3_DMAT);
1786  }
1787  else if ((state == HAL_USART_STATE_BUSY_RX) ||
1788  (state == HAL_USART_STATE_BUSY_TX_RX))
1789  {
1790  /* Clear the Overrun flag before resuming the Rx transfer*/
1791  __HAL_USART_CLEAR_FLAG(husart, USART_CLEAR_OREF);
1792 
1793  /* Reenable PE and ERR (Frame error, noise error, overrun error) interrupts */
1794  SET_BIT(husart->Instance->CR1, USART_CR1_PEIE);
1795  SET_BIT(husart->Instance->CR3, USART_CR3_EIE);
1796 
1797  /* Enable the USART DMA Rx request before the DMA Tx request */
1798  SET_BIT(husart->Instance->CR3, USART_CR3_DMAR);
1799 
1800  /* Enable the USART DMA Tx request */
1801  SET_BIT(husart->Instance->CR3, USART_CR3_DMAT);
1802  }
1803  else
1804  {
1805  /* Nothing to do */
1806  }
1807 
1808  /* Process Unlocked */
1809  __HAL_UNLOCK(husart);
1810 
1811  return HAL_OK;
1812 }
1813 
1819 HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart)
1820 {
1821  /* The Lock is not implemented on this API to allow the user application
1822  to call the HAL USART API under callbacks HAL_USART_TxCpltCallback() / HAL_USART_RxCpltCallback() /
1823  HAL_USART_TxHalfCpltCallback / HAL_USART_RxHalfCpltCallback:
1824  indeed, when HAL_DMA_Abort() API is called, the DMA TX/RX Transfer or Half Transfer complete
1825  interrupt is generated if the DMA transfer interruption occurs at the middle or at the end of
1826  the stream and the corresponding call back is executed. */
1827 
1828  /* Disable the USART Tx/Rx DMA requests */
1829  CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
1830  CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR);
1831 
1832  /* Abort the USART DMA tx channel */
1833  if (husart->hdmatx != NULL)
1834  {
1835  if (HAL_DMA_Abort(husart->hdmatx) != HAL_OK)
1836  {
1837  if (HAL_DMA_GetError(husart->hdmatx) == HAL_DMA_ERROR_TIMEOUT)
1838  {
1839  /* Set error code to DMA */
1840  husart->ErrorCode = HAL_USART_ERROR_DMA;
1841 
1842  return HAL_TIMEOUT;
1843  }
1844  }
1845  }
1846  /* Abort the USART DMA rx channel */
1847  if (husart->hdmarx != NULL)
1848  {
1849  if (HAL_DMA_Abort(husart->hdmarx) != HAL_OK)
1850  {
1851  if (HAL_DMA_GetError(husart->hdmarx) == HAL_DMA_ERROR_TIMEOUT)
1852  {
1853  /* Set error code to DMA */
1854  husart->ErrorCode = HAL_USART_ERROR_DMA;
1855 
1856  return HAL_TIMEOUT;
1857  }
1858  }
1859  }
1860 
1861  USART_EndTransfer(husart);
1862  husart->State = HAL_USART_STATE_READY;
1863 
1864  return HAL_OK;
1865 }
1866 
1879 HAL_StatusTypeDef HAL_USART_Abort(USART_HandleTypeDef *husart)
1880 {
1881 #if defined(USART_CR1_FIFOEN)
1882  /* Disable TXEIE, TCIE, RXNE, RXFT, TXFT, PE and ERR (Frame error, noise error, overrun error) interrupts */
1883  CLEAR_BIT(husart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | USART_CR1_TXEIE_TXFNFIE |
1884  USART_CR1_TCIE));
1885  CLEAR_BIT(husart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE | USART_CR3_TXFTIE));
1886 #else
1887  CLEAR_BIT(husart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE));
1888  CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
1889 #endif /* USART_CR1_FIFOEN */
1890 
1891  /* Disable the USART DMA Tx request if enabled */
1892  if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAT))
1893  {
1894  CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
1895 
1896  /* Abort the USART DMA Tx channel : use blocking DMA Abort API (no callback) */
1897  if (husart->hdmatx != NULL)
1898  {
1899  /* Set the USART DMA Abort callback to Null.
1900  No call back execution at end of DMA abort procedure */
1901  husart->hdmatx->XferAbortCallback = NULL;
1902 
1903  if (HAL_DMA_Abort(husart->hdmatx) != HAL_OK)
1904  {
1905  if (HAL_DMA_GetError(husart->hdmatx) == HAL_DMA_ERROR_TIMEOUT)
1906  {
1907  /* Set error code to DMA */
1908  husart->ErrorCode = HAL_USART_ERROR_DMA;
1909 
1910  return HAL_TIMEOUT;
1911  }
1912  }
1913  }
1914  }
1915 
1916  /* Disable the USART DMA Rx request if enabled */
1917  if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR))
1918  {
1919  CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR);
1920 
1921  /* Abort the USART DMA Rx channel : use blocking DMA Abort API (no callback) */
1922  if (husart->hdmarx != NULL)
1923  {
1924  /* Set the USART DMA Abort callback to Null.
1925  No call back execution at end of DMA abort procedure */
1926  husart->hdmarx->XferAbortCallback = NULL;
1927 
1928  if (HAL_DMA_Abort(husart->hdmarx) != HAL_OK)
1929  {
1930  if (HAL_DMA_GetError(husart->hdmarx) == HAL_DMA_ERROR_TIMEOUT)
1931  {
1932  /* Set error code to DMA */
1933  husart->ErrorCode = HAL_USART_ERROR_DMA;
1934 
1935  return HAL_TIMEOUT;
1936  }
1937  }
1938  }
1939  }
1940 
1941  /* Reset Tx and Rx transfer counters */
1942  husart->TxXferCount = 0U;
1943  husart->RxXferCount = 0U;
1944 
1945  /* Clear the Error flags in the ICR register */
1946  __HAL_USART_CLEAR_FLAG(husart, USART_CLEAR_OREF | USART_CLEAR_NEF | USART_CLEAR_PEF | USART_CLEAR_FEF);
1947 
1948 #if defined(USART_CR1_FIFOEN)
1949  /* Flush the whole TX FIFO (if needed) */
1950  if (husart->FifoMode == USART_FIFOMODE_ENABLE)
1951  {
1952  __HAL_USART_SEND_REQ(husart, USART_TXDATA_FLUSH_REQUEST);
1953  }
1954 #endif /* USART_CR1_FIFOEN */
1955 
1956  /* Discard the received data */
1957  __HAL_USART_SEND_REQ(husart, USART_RXDATA_FLUSH_REQUEST);
1958 
1959  /* Restore husart->State to Ready */
1960  husart->State = HAL_USART_STATE_READY;
1961 
1962  /* Reset Handle ErrorCode to No Error */
1963  husart->ErrorCode = HAL_USART_ERROR_NONE;
1964 
1965  return HAL_OK;
1966 }
1967 
1982 HAL_StatusTypeDef HAL_USART_Abort_IT(USART_HandleTypeDef *husart)
1983 {
1984  uint32_t abortcplt = 1U;
1985 
1986 #if defined(USART_CR1_FIFOEN)
1987  /* Disable TXEIE, TCIE, RXNE, RXFT, TXFT, PE and ERR (Frame error, noise error, overrun error) interrupts */
1988  CLEAR_BIT(husart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | USART_CR1_TXEIE_TXFNFIE |
1989  USART_CR1_TCIE));
1990  CLEAR_BIT(husart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE | USART_CR3_TXFTIE));
1991 #else
1992  CLEAR_BIT(husart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE));
1993  CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
1994 #endif /* USART_CR1_FIFOEN */
1995 
1996  /* If DMA Tx and/or DMA Rx Handles are associated to USART Handle, DMA Abort complete callbacks should be initialised
1997  before any call to DMA Abort functions */
1998  /* DMA Tx Handle is valid */
1999  if (husart->hdmatx != NULL)
2000  {
2001  /* Set DMA Abort Complete callback if USART DMA Tx request if enabled.
2002  Otherwise, set it to NULL */
2003  if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAT))
2004  {
2006  }
2007  else
2008  {
2009  husart->hdmatx->XferAbortCallback = NULL;
2010  }
2011  }
2012  /* DMA Rx Handle is valid */
2013  if (husart->hdmarx != NULL)
2014  {
2015  /* Set DMA Abort Complete callback if USART DMA Rx request if enabled.
2016  Otherwise, set it to NULL */
2017  if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR))
2018  {
2020  }
2021  else
2022  {
2023  husart->hdmarx->XferAbortCallback = NULL;
2024  }
2025  }
2026 
2027  /* Disable the USART DMA Tx request if enabled */
2028  if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAT))
2029  {
2030  /* Disable DMA Tx at USART level */
2031  CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
2032 
2033  /* Abort the USART DMA Tx channel : use non blocking DMA Abort API (callback) */
2034  if (husart->hdmatx != NULL)
2035  {
2036  /* USART Tx DMA Abort callback has already been initialised :
2037  will lead to call HAL_USART_AbortCpltCallback() at end of DMA abort procedure */
2038 
2039  /* Abort DMA TX */
2040  if (HAL_DMA_Abort_IT(husart->hdmatx) != HAL_OK)
2041  {
2042  husart->hdmatx->XferAbortCallback = NULL;
2043  }
2044  else
2045  {
2046  abortcplt = 0U;
2047  }
2048  }
2049  }
2050 
2051  /* Disable the USART DMA Rx request if enabled */
2052  if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR))
2053  {
2054  CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR);
2055 
2056  /* Abort the USART DMA Rx channel : use non blocking DMA Abort API (callback) */
2057  if (husart->hdmarx != NULL)
2058  {
2059  /* USART Rx DMA Abort callback has already been initialised :
2060  will lead to call HAL_USART_AbortCpltCallback() at end of DMA abort procedure */
2061 
2062  /* Abort DMA RX */
2063  if (HAL_DMA_Abort_IT(husart->hdmarx) != HAL_OK)
2064  {
2065  husart->hdmarx->XferAbortCallback = NULL;
2066  abortcplt = 1U;
2067  }
2068  else
2069  {
2070  abortcplt = 0U;
2071  }
2072  }
2073  }
2074 
2075  /* if no DMA abort complete callback execution is required => call user Abort Complete callback */
2076  if (abortcplt == 1U)
2077  {
2078  /* Reset Tx and Rx transfer counters */
2079  husart->TxXferCount = 0U;
2080  husart->RxXferCount = 0U;
2081 
2082  /* Reset errorCode */
2083  husart->ErrorCode = HAL_USART_ERROR_NONE;
2084 
2085  /* Clear the Error flags in the ICR register */
2086  __HAL_USART_CLEAR_FLAG(husart, USART_CLEAR_OREF | USART_CLEAR_NEF | USART_CLEAR_PEF | USART_CLEAR_FEF);
2087 
2088 #if defined(USART_CR1_FIFOEN)
2089  /* Flush the whole TX FIFO (if needed) */
2090  if (husart->FifoMode == USART_FIFOMODE_ENABLE)
2091  {
2092  __HAL_USART_SEND_REQ(husart, USART_TXDATA_FLUSH_REQUEST);
2093  }
2094 #endif /* USART_CR1_FIFOEN */
2095 
2096  /* Discard the received data */
2097  __HAL_USART_SEND_REQ(husart, USART_RXDATA_FLUSH_REQUEST);
2098 
2099  /* Restore husart->State to Ready */
2100  husart->State = HAL_USART_STATE_READY;
2101 
2102  /* As no DMA to be aborted, call directly user Abort complete callback */
2103 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
2104  /* Call registered Abort Complete Callback */
2105  husart->AbortCpltCallback(husart);
2106 #else
2107  /* Call legacy weak Abort Complete Callback */
2109 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */
2110  }
2111 
2112  return HAL_OK;
2113 }
2114 
2121 {
2122  uint32_t isrflags = READ_REG(husart->Instance->ISR);
2123  uint32_t cr1its = READ_REG(husart->Instance->CR1);
2124  uint32_t cr3its = READ_REG(husart->Instance->CR3);
2125 
2126  uint32_t errorflags;
2127  uint32_t errorcode;
2128 
2129  /* If no error occurs */
2130 #if defined(USART_CR2_SLVEN)
2131  errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE | USART_ISR_UDR));
2132 #else
2133  errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE));
2134 #endif /* USART_CR2_SLVEN */
2135  if (errorflags == 0U)
2136  {
2137  /* USART in mode Receiver ---------------------------------------------------*/
2138 #if defined(USART_CR1_FIFOEN)
2139  if (((isrflags & USART_ISR_RXNE_RXFNE) != 0U)
2140  && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U)
2141  || ((cr3its & USART_CR3_RXFTIE) != 0U)))
2142 #else
2143  if (((isrflags & USART_ISR_RXNE) != 0U)
2144  && ((cr1its & USART_CR1_RXNEIE) != 0U))
2145 #endif /* USART_CR1_FIFOEN */
2146  {
2147  if (husart->RxISR != NULL)
2148  {
2149  husart->RxISR(husart);
2150  }
2151  return;
2152  }
2153  }
2154 
2155  /* If some errors occur */
2156 #if defined(USART_CR1_FIFOEN)
2157  if ((errorflags != 0U)
2158  && (((cr3its & (USART_CR3_RXFTIE | USART_CR3_EIE)) != 0U)
2159  || ((cr1its & (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE)) != 0U)))
2160 #else
2161  if ((errorflags != 0U)
2162  && (((cr3its & USART_CR3_EIE) != 0U)
2163  || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != 0U)))
2164 #endif /* USART_CR1_FIFOEN */
2165  {
2166  /* USART parity error interrupt occurred -------------------------------------*/
2167  if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U))
2168  {
2169  __HAL_USART_CLEAR_IT(husart, USART_CLEAR_PEF);
2170 
2171  husart->ErrorCode |= HAL_USART_ERROR_PE;
2172  }
2173 
2174  /* USART frame error interrupt occurred --------------------------------------*/
2175  if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
2176  {
2177  __HAL_USART_CLEAR_IT(husart, USART_CLEAR_FEF);
2178 
2179  husart->ErrorCode |= HAL_USART_ERROR_FE;
2180  }
2181 
2182  /* USART noise error interrupt occurred --------------------------------------*/
2183  if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
2184  {
2185  __HAL_USART_CLEAR_IT(husart, USART_CLEAR_NEF);
2186 
2187  husart->ErrorCode |= HAL_USART_ERROR_NE;
2188  }
2189 
2190  /* USART Over-Run interrupt occurred -----------------------------------------*/
2191 #if defined(USART_CR1_FIFOEN)
2192  if (((isrflags & USART_ISR_ORE) != 0U)
2193  && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U) ||
2194  ((cr3its & (USART_CR3_RXFTIE | USART_CR3_EIE)) != 0U)))
2195 #else
2196  if (((isrflags & USART_ISR_ORE) != 0U)
2197  && (((cr1its & USART_CR1_RXNEIE) != 0U) ||
2198  ((cr3its & USART_CR3_EIE) != 0U)))
2199 #endif /* USART_CR1_FIFOEN */
2200  {
2201  __HAL_USART_CLEAR_IT(husart, USART_CLEAR_OREF);
2202 
2203  husart->ErrorCode |= HAL_USART_ERROR_ORE;
2204  }
2205 
2206 #if defined(USART_CR2_SLVEN)
2207  /* USART SPI slave underrun error interrupt occurred -------------------------*/
2208  if (((isrflags & USART_ISR_UDR) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
2209  {
2210  /* Ignore SPI slave underrun errors when reception is going on */
2211  if (husart->State == HAL_USART_STATE_BUSY_RX)
2212  {
2213  __HAL_USART_CLEAR_UDRFLAG(husart);
2214  return;
2215  }
2216  else
2217  {
2218  __HAL_USART_CLEAR_UDRFLAG(husart);
2219  husart->ErrorCode |= HAL_USART_ERROR_UDR;
2220  }
2221  }
2222 #endif /* USART_CR2_SLVEN */
2223 
2224  /* Call USART Error Call back function if need be --------------------------*/
2225  if (husart->ErrorCode != HAL_USART_ERROR_NONE)
2226  {
2227  /* USART in mode Receiver ---------------------------------------------------*/
2228 #if defined(USART_CR1_FIFOEN)
2229  if (((isrflags & USART_ISR_RXNE_RXFNE) != 0U)
2230  && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U)
2231  || ((cr3its & USART_CR3_RXFTIE) != 0U)))
2232 #else
2233  if (((isrflags & USART_ISR_RXNE) != 0U)
2234  && ((cr1its & USART_CR1_RXNEIE) != 0U))
2235 #endif /* USART_CR1_FIFOEN */
2236  {
2237  if (husart->RxISR != NULL)
2238  {
2239  husart->RxISR(husart);
2240  }
2241  }
2242 
2243  /* If Overrun error occurs, or if any error occurs in DMA mode reception,
2244  consider error as blocking */
2245  errorcode = husart->ErrorCode & HAL_USART_ERROR_ORE;
2246  if ((HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR)) ||
2247  (errorcode != 0U))
2248  {
2249  /* Blocking error : transfer is aborted
2250  Set the USART state ready to be able to start again the process,
2251  Disable Interrupts, and disable DMA requests, if ongoing */
2252  USART_EndTransfer(husart);
2253 
2254  /* Disable the USART DMA Rx request if enabled */
2255  if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR))
2256  {
2257  CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR | USART_CR3_DMAR);
2258 
2259  /* Abort the USART DMA Tx channel */
2260  if (husart->hdmatx != NULL)
2261  {
2262  /* Set the USART Tx DMA Abort callback to NULL : no callback
2263  executed at end of DMA abort procedure */
2264  husart->hdmatx->XferAbortCallback = NULL;
2265 
2266  /* Abort DMA TX */
2267  (void)HAL_DMA_Abort_IT(husart->hdmatx);
2268  }
2269 
2270  /* Abort the USART DMA Rx channel */
2271  if (husart->hdmarx != NULL)
2272  {
2273  /* Set the USART Rx DMA Abort callback :
2274  will lead to call HAL_USART_ErrorCallback() at end of DMA abort procedure */
2276 
2277  /* Abort DMA RX */
2278  if (HAL_DMA_Abort_IT(husart->hdmarx) != HAL_OK)
2279  {
2280  /* Call Directly husart->hdmarx->XferAbortCallback function in case of error */
2281  husart->hdmarx->XferAbortCallback(husart->hdmarx);
2282  }
2283  }
2284  else
2285  {
2286  /* Call user error callback */
2287 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
2288  /* Call registered Error Callback */
2289  husart->ErrorCallback(husart);
2290 #else
2291  /* Call legacy weak Error Callback */
2292  HAL_USART_ErrorCallback(husart);
2293 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */
2294  }
2295  }
2296  else
2297  {
2298  /* Call user error callback */
2299 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
2300  /* Call registered Error Callback */
2301  husart->ErrorCallback(husart);
2302 #else
2303  /* Call legacy weak Error Callback */
2304  HAL_USART_ErrorCallback(husart);
2305 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */
2306  }
2307  }
2308  else
2309  {
2310  /* Non Blocking error : transfer could go on.
2311  Error is notified to user through user error callback */
2312 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
2313  /* Call registered Error Callback */
2314  husart->ErrorCallback(husart);
2315 #else
2316  /* Call legacy weak Error Callback */
2317  HAL_USART_ErrorCallback(husart);
2318 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */
2319  husart->ErrorCode = HAL_USART_ERROR_NONE;
2320  }
2321  }
2322  return;
2323 
2324  } /* End if some error occurs */
2325 
2326 
2327  /* USART in mode Transmitter ------------------------------------------------*/
2328 #if defined(USART_CR1_FIFOEN)
2329  if (((isrflags & USART_ISR_TXE_TXFNF) != 0U)
2330  && (((cr1its & USART_CR1_TXEIE_TXFNFIE) != 0U)
2331  || ((cr3its & USART_CR3_TXFTIE) != 0U)))
2332 #else
2333  if (((isrflags & USART_ISR_TXE) != 0U)
2334  && ((cr1its & USART_CR1_TXEIE) != 0U))
2335 #endif /* USART_CR1_FIFOEN */
2336  {
2337  if (husart->TxISR != NULL)
2338  {
2339  husart->TxISR(husart);
2340  }
2341  return;
2342  }
2343 
2344  /* USART in mode Transmitter (transmission end) -----------------------------*/
2345  if (((isrflags & USART_ISR_TC) != 0U) && ((cr1its & USART_CR1_TCIE) != 0U))
2346  {
2347  USART_EndTransmit_IT(husart);
2348  return;
2349  }
2350 
2351 #if defined(USART_CR1_FIFOEN)
2352  /* USART TX Fifo Empty occurred ----------------------------------------------*/
2353  if (((isrflags & USART_ISR_TXFE) != 0U) && ((cr1its & USART_CR1_TXFEIE) != 0U))
2354  {
2355 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
2356  /* Call registered Tx Fifo Empty Callback */
2357  husart->TxFifoEmptyCallback(husart);
2358 #else
2359  /* Call legacy weak Tx Fifo Empty Callback */
2361 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */
2362  return;
2363  }
2364 
2365  /* USART RX Fifo Full occurred ----------------------------------------------*/
2366  if (((isrflags & USART_ISR_RXFF) != 0U) && ((cr1its & USART_CR1_RXFFIE) != 0U))
2367  {
2368 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
2369  /* Call registered Rx Fifo Full Callback */
2370  husart->RxFifoFullCallback(husart);
2371 #else
2372  /* Call legacy weak Rx Fifo Full Callback */
2374 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */
2375  return;
2376  }
2377 #endif /* USART_CR1_FIFOEN */
2378 }
2379 
2386 {
2387  /* Prevent unused argument(s) compilation warning */
2388  UNUSED(husart);
2389 
2390  /* NOTE : This function should not be modified, when the callback is needed,
2391  the HAL_USART_TxCpltCallback can be implemented in the user file.
2392  */
2393 }
2394 
2401 {
2402  /* Prevent unused argument(s) compilation warning */
2403  UNUSED(husart);
2404 
2405  /* NOTE: This function should not be modified, when the callback is needed,
2406  the HAL_USART_TxHalfCpltCallback can be implemented in the user file.
2407  */
2408 }
2409 
2416 {
2417  /* Prevent unused argument(s) compilation warning */
2418  UNUSED(husart);
2419 
2420  /* NOTE: This function should not be modified, when the callback is needed,
2421  the HAL_USART_RxCpltCallback can be implemented in the user file.
2422  */
2423 }
2424 
2431 {
2432  /* Prevent unused argument(s) compilation warning */
2433  UNUSED(husart);
2434 
2435  /* NOTE : This function should not be modified, when the callback is needed,
2436  the HAL_USART_RxHalfCpltCallback can be implemented in the user file
2437  */
2438 }
2439 
2446 {
2447  /* Prevent unused argument(s) compilation warning */
2448  UNUSED(husart);
2449 
2450  /* NOTE : This function should not be modified, when the callback is needed,
2451  the HAL_USART_TxRxCpltCallback can be implemented in the user file
2452  */
2453 }
2454 
2461 {
2462  /* Prevent unused argument(s) compilation warning */
2463  UNUSED(husart);
2464 
2465  /* NOTE : This function should not be modified, when the callback is needed,
2466  the HAL_USART_ErrorCallback can be implemented in the user file.
2467  */
2468 }
2469 
2476 {
2477  /* Prevent unused argument(s) compilation warning */
2478  UNUSED(husart);
2479 
2480  /* NOTE : This function should not be modified, when the callback is needed,
2481  the HAL_USART_AbortCpltCallback can be implemented in the user file.
2482  */
2483 }
2484 
2513 {
2514  return husart->State;
2515 }
2516 
2524 {
2525  return husart->ErrorCode;
2526 }
2527 
2545 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
2547 {
2548  /* Init the USART Callback settings */
2549  husart->TxHalfCpltCallback = HAL_USART_TxHalfCpltCallback; /* Legacy weak TxHalfCpltCallback */
2550  husart->TxCpltCallback = HAL_USART_TxCpltCallback; /* Legacy weak TxCpltCallback */
2551  husart->RxHalfCpltCallback = HAL_USART_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallback */
2552  husart->RxCpltCallback = HAL_USART_RxCpltCallback; /* Legacy weak RxCpltCallback */
2553  husart->TxRxCpltCallback = HAL_USART_TxRxCpltCallback; /* Legacy weak TxRxCpltCallback */
2554  husart->ErrorCallback = HAL_USART_ErrorCallback; /* Legacy weak ErrorCallback */
2555  husart->AbortCpltCallback = HAL_USART_AbortCpltCallback; /* Legacy weak AbortCpltCallback */
2556 #if defined(USART_CR1_FIFOEN)
2557  husart->RxFifoFullCallback = HAL_USARTEx_RxFifoFullCallback; /* Legacy weak RxFifoFullCallback */
2558  husart->TxFifoEmptyCallback = HAL_USARTEx_TxFifoEmptyCallback; /* Legacy weak TxFifoEmptyCallback */
2559 #endif /* USART_CR1_FIFOEN */
2560 }
2561 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */
2562 
2569 {
2570 #if defined(USART_CR1_FIFOEN)
2571  /* Disable TXEIE, TCIE, RXNE, RXFT, TXFT, PE and ERR (Frame error, noise error, overrun error) interrupts */
2572  CLEAR_BIT(husart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | USART_CR1_TXEIE_TXFNFIE |
2573  USART_CR1_TCIE));
2574  CLEAR_BIT(husart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE | USART_CR3_TXFTIE));
2575 #else
2576  /* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
2577  CLEAR_BIT(husart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE));
2578  CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
2579 #endif /* USART_CR1_FIFOEN */
2580 
2581  /* At end of process, restore husart->State to Ready */
2582  husart->State = HAL_USART_STATE_READY;
2583 }
2584 
2591 {
2592  USART_HandleTypeDef *husart = (USART_HandleTypeDef *)(hdma->Parent);
2593 
2594  /* DMA Normal mode */
2595  if (HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC))
2596  {
2597  husart->TxXferCount = 0U;
2598 
2599  if (husart->State == HAL_USART_STATE_BUSY_TX)
2600  {
2601  /* Disable the DMA transfer for transmit request by resetting the DMAT bit
2602  in the USART CR3 register */
2603  CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
2604 
2605  /* Enable the USART Transmit Complete Interrupt */
2606  __HAL_USART_ENABLE_IT(husart, USART_IT_TC);
2607  }
2608  }
2609  /* DMA Circular mode */
2610  else
2611  {
2612  if (husart->State == HAL_USART_STATE_BUSY_TX)
2613  {
2614 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
2615  /* Call registered Tx Complete Callback */
2616  husart->TxCpltCallback(husart);
2617 #else
2618  /* Call legacy weak Tx Complete Callback */
2619  HAL_USART_TxCpltCallback(husart);
2620 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */
2621  }
2622  }
2623 }
2624 
2631 {
2632  USART_HandleTypeDef *husart = (USART_HandleTypeDef *)(hdma->Parent);
2633 
2634 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
2635  /* Call registered Tx Half Complete Callback */
2636  husart->TxHalfCpltCallback(husart);
2637 #else
2638  /* Call legacy weak Tx Half Complete Callback */
2640 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */
2641 }
2642 
2649 {
2650  USART_HandleTypeDef *husart = (USART_HandleTypeDef *)(hdma->Parent);
2651 
2652  /* DMA Normal mode */
2653  if (HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC))
2654  {
2655  husart->RxXferCount = 0U;
2656 
2657  /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
2658  CLEAR_BIT(husart->Instance->CR1, USART_CR1_PEIE);
2659  CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
2660 
2661  /* Disable the DMA RX transfer for the receiver request by resetting the DMAR bit
2662  in USART CR3 register */
2663  CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR);
2664  /* similarly, disable the DMA TX transfer that was started to provide the
2665  clock to the slave device */
2666  CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
2667 
2668  if (husart->State == HAL_USART_STATE_BUSY_RX)
2669  {
2670 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
2671  /* Call registered Rx Complete Callback */
2672  husart->RxCpltCallback(husart);
2673 #else
2674  /* Call legacy weak Rx Complete Callback */
2675  HAL_USART_RxCpltCallback(husart);
2676 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */
2677  }
2678  /* The USART state is HAL_USART_STATE_BUSY_TX_RX */
2679  else
2680  {
2681 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
2682  /* Call registered Tx Rx Complete Callback */
2683  husart->TxRxCpltCallback(husart);
2684 #else
2685  /* Call legacy weak Tx Rx Complete Callback */
2687 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */
2688  }
2689  husart->State = HAL_USART_STATE_READY;
2690  }
2691  /* DMA circular mode */
2692  else
2693  {
2694  if (husart->State == HAL_USART_STATE_BUSY_RX)
2695  {
2696 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
2697  /* Call registered Rx Complete Callback */
2698  husart->RxCpltCallback(husart);
2699 #else
2700  /* Call legacy weak Rx Complete Callback */
2701  HAL_USART_RxCpltCallback(husart);
2702 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */
2703  }
2704  /* The USART state is HAL_USART_STATE_BUSY_TX_RX */
2705  else
2706  {
2707 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
2708  /* Call registered Tx Rx Complete Callback */
2709  husart->TxRxCpltCallback(husart);
2710 #else
2711  /* Call legacy weak Tx Rx Complete Callback */
2713 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */
2714  }
2715  }
2716 }
2717 
2724 {
2725  USART_HandleTypeDef *husart = (USART_HandleTypeDef *)(hdma->Parent);
2726 
2727 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
2728  /* Call registered Rx Half Complete Callback */
2729  husart->RxHalfCpltCallback(husart);
2730 #else
2731  /* Call legacy weak Rx Half Complete Callback */
2733 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */
2734 }
2735 
2742 {
2743  USART_HandleTypeDef *husart = (USART_HandleTypeDef *)(hdma->Parent);
2744 
2745  husart->RxXferCount = 0U;
2746  husart->TxXferCount = 0U;
2747  USART_EndTransfer(husart);
2748 
2749  husart->ErrorCode |= HAL_USART_ERROR_DMA;
2750  husart->State = HAL_USART_STATE_READY;
2751 
2752 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
2753  /* Call registered Error Callback */
2754  husart->ErrorCallback(husart);
2755 #else
2756  /* Call legacy weak Error Callback */
2757  HAL_USART_ErrorCallback(husart);
2758 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */
2759 }
2760 
2768 {
2769  USART_HandleTypeDef *husart = (USART_HandleTypeDef *)(hdma->Parent);
2770  husart->RxXferCount = 0U;
2771  husart->TxXferCount = 0U;
2772 
2773 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
2774  /* Call registered Error Callback */
2775  husart->ErrorCallback(husart);
2776 #else
2777  /* Call legacy weak Error Callback */
2778  HAL_USART_ErrorCallback(husart);
2779 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */
2780 }
2781 
2791 {
2792  USART_HandleTypeDef *husart = (USART_HandleTypeDef *)(hdma->Parent);
2793 
2794  husart->hdmatx->XferAbortCallback = NULL;
2795 
2796  /* Check if an Abort process is still ongoing */
2797  if (husart->hdmarx != NULL)
2798  {
2799  if (husart->hdmarx->XferAbortCallback != NULL)
2800  {
2801  return;
2802  }
2803  }
2804 
2805  /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
2806  husart->TxXferCount = 0U;
2807  husart->RxXferCount = 0U;
2808 
2809  /* Reset errorCode */
2810  husart->ErrorCode = HAL_USART_ERROR_NONE;
2811 
2812  /* Clear the Error flags in the ICR register */
2813  __HAL_USART_CLEAR_FLAG(husart, USART_CLEAR_OREF | USART_CLEAR_NEF | USART_CLEAR_PEF | USART_CLEAR_FEF);
2814 
2815  /* Restore husart->State to Ready */
2816  husart->State = HAL_USART_STATE_READY;
2817 
2818  /* Call user Abort complete callback */
2819 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
2820  /* Call registered Abort Complete Callback */
2821  husart->AbortCpltCallback(husart);
2822 #else
2823  /* Call legacy weak Abort Complete Callback */
2825 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */
2826 
2827 }
2828 
2829 
2839 {
2840  USART_HandleTypeDef *husart = (USART_HandleTypeDef *)(hdma->Parent);
2841 
2842  husart->hdmarx->XferAbortCallback = NULL;
2843 
2844  /* Check if an Abort process is still ongoing */
2845  if (husart->hdmatx != NULL)
2846  {
2847  if (husart->hdmatx->XferAbortCallback != NULL)
2848  {
2849  return;
2850  }
2851  }
2852 
2853  /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
2854  husart->TxXferCount = 0U;
2855  husart->RxXferCount = 0U;
2856 
2857  /* Reset errorCode */
2858  husart->ErrorCode = HAL_USART_ERROR_NONE;
2859 
2860  /* Clear the Error flags in the ICR register */
2861  __HAL_USART_CLEAR_FLAG(husart, USART_CLEAR_OREF | USART_CLEAR_NEF | USART_CLEAR_PEF | USART_CLEAR_FEF);
2862 
2863  /* Restore husart->State to Ready */
2864  husart->State = HAL_USART_STATE_READY;
2865 
2866  /* Call user Abort complete callback */
2867 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
2868  /* Call registered Abort Complete Callback */
2869  husart->AbortCpltCallback(husart);
2870 #else
2871  /* Call legacy weak Abort Complete Callback */
2873 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */
2874 }
2875 
2876 
2886 static HAL_StatusTypeDef USART_WaitOnFlagUntilTimeout(USART_HandleTypeDef *husart, uint32_t Flag, FlagStatus Status,
2887  uint32_t Tickstart, uint32_t Timeout)
2888 {
2889  /* Wait until flag is set */
2890  while ((__HAL_USART_GET_FLAG(husart, Flag) ? SET : RESET) == Status)
2891  {
2892  /* Check for the Timeout */
2893  if (Timeout != HAL_MAX_DELAY)
2894  {
2895  if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
2896  {
2897  husart->State = HAL_USART_STATE_READY;
2898 
2899  /* Process Unlocked */
2900  __HAL_UNLOCK(husart);
2901 
2902  return HAL_TIMEOUT;
2903  }
2904  }
2905  }
2906  return HAL_OK;
2907 }
2908 
2914 static HAL_StatusTypeDef USART_SetConfig(USART_HandleTypeDef *husart)
2915 {
2916  uint32_t tmpreg;
2917  USART_ClockSourceTypeDef clocksource;
2918  HAL_StatusTypeDef ret = HAL_OK;
2919  uint16_t brrtemp;
2920  uint32_t usartdiv = 0x00000000;
2921 
2922  /* Check the parameters */
2923  assert_param(IS_USART_POLARITY(husart->Init.CLKPolarity));
2924  assert_param(IS_USART_PHASE(husart->Init.CLKPhase));
2925  assert_param(IS_USART_LASTBIT(husart->Init.CLKLastBit));
2926  assert_param(IS_USART_BAUDRATE(husart->Init.BaudRate));
2927  assert_param(IS_USART_WORD_LENGTH(husart->Init.WordLength));
2928  assert_param(IS_USART_STOPBITS(husart->Init.StopBits));
2929  assert_param(IS_USART_PARITY(husart->Init.Parity));
2930  assert_param(IS_USART_MODE(husart->Init.Mode));
2931 #if defined(USART_PRESC_PRESCALER)
2932  assert_param(IS_USART_PRESCALER(husart->Init.ClockPrescaler));
2933 #endif /* USART_PRESC_PRESCALER */
2934 
2935  /*-------------------------- USART CR1 Configuration -----------------------*/
2936  /* Clear M, PCE, PS, TE and RE bits and configure
2937  * the USART Word Length, Parity and Mode:
2938  * set the M bits according to husart->Init.WordLength value
2939  * set PCE and PS bits according to husart->Init.Parity value
2940  * set TE and RE bits according to husart->Init.Mode value
2941  * force OVER8 to 1 to allow to reach the maximum speed (Fclock/8) */
2942  tmpreg = (uint32_t)husart->Init.WordLength | husart->Init.Parity | husart->Init.Mode | USART_CR1_OVER8;
2943  MODIFY_REG(husart->Instance->CR1, USART_CR1_FIELDS, tmpreg);
2944 
2945  /*---------------------------- USART CR2 Configuration ---------------------*/
2946  /* Clear and configure the USART Clock, CPOL, CPHA, LBCL STOP and SLVEN bits:
2947  * set CPOL bit according to husart->Init.CLKPolarity value
2948  * set CPHA bit according to husart->Init.CLKPhase value
2949  * set LBCL bit according to husart->Init.CLKLastBit value (used in SPI master mode only)
2950  * set STOP[13:12] bits according to husart->Init.StopBits value */
2951  tmpreg = (uint32_t)(USART_CLOCK_ENABLE);
2952  tmpreg |= (uint32_t)husart->Init.CLKLastBit;
2953  tmpreg |= ((uint32_t)husart->Init.CLKPolarity | (uint32_t)husart->Init.CLKPhase);
2954  tmpreg |= (uint32_t)husart->Init.StopBits;
2955  MODIFY_REG(husart->Instance->CR2, USART_CR2_FIELDS, tmpreg);
2956 
2957 #if defined(USART_PRESC_PRESCALER)
2958  /*-------------------------- USART PRESC Configuration -----------------------*/
2959  /* Configure
2960  * - USART Clock Prescaler : set PRESCALER according to husart->Init.ClockPrescaler value */
2961  MODIFY_REG(husart->Instance->PRESC, USART_PRESC_PRESCALER, husart->Init.ClockPrescaler);
2962 #endif /* USART_PRESC_PRESCALER */
2963 
2964  /*-------------------------- USART BRR Configuration -----------------------*/
2965  /* BRR is filled-up according to OVER8 bit setting which is forced to 1 */
2966  USART_GETCLOCKSOURCE(husart, clocksource);
2967 
2968  switch (clocksource)
2969  {
2971 #if defined(USART_PRESC_PRESCALER)
2972  usartdiv = (uint32_t)(USART_DIV_SAMPLING8(HAL_RCC_GetPCLK1Freq(), husart->Init.BaudRate, husart->Init.ClockPrescaler));
2973 #else
2974  usartdiv = (uint32_t)(USART_DIV_SAMPLING8(HAL_RCC_GetPCLK1Freq(), husart->Init.BaudRate));
2975 #endif /* USART_PRESC_PRESCALER */
2976  break;
2978 #if defined(USART_PRESC_PRESCALER)
2979  usartdiv = (uint32_t)(USART_DIV_SAMPLING8(HAL_RCC_GetPCLK2Freq(), husart->Init.BaudRate, husart->Init.ClockPrescaler));
2980 #else
2981  usartdiv = (uint32_t)(USART_DIV_SAMPLING8(HAL_RCC_GetPCLK2Freq(), husart->Init.BaudRate));
2982 #endif /* USART_PRESC_PRESCALER */
2983  break;
2984  case USART_CLOCKSOURCE_HSI:
2985 #if defined(USART_PRESC_PRESCALER)
2986  usartdiv = (uint32_t)(USART_DIV_SAMPLING8(HSI_VALUE, husart->Init.BaudRate, husart->Init.ClockPrescaler));
2987 #else
2988  usartdiv = (uint32_t)(USART_DIV_SAMPLING8(HSI_VALUE, husart->Init.BaudRate));
2989 #endif /* USART_PRESC_PRESCALER */
2990  break;
2992 #if defined(USART_PRESC_PRESCALER)
2993  usartdiv = (uint32_t)(USART_DIV_SAMPLING8(HAL_RCC_GetSysClockFreq(), husart->Init.BaudRate, husart->Init.ClockPrescaler));
2994 #else
2995  usartdiv = (uint32_t)(USART_DIV_SAMPLING8(HAL_RCC_GetSysClockFreq(), husart->Init.BaudRate));
2996 #endif /* USART_PRESC_PRESCALER */
2997  break;
2998  case USART_CLOCKSOURCE_LSE:
2999 #if defined(USART_PRESC_PRESCALER)
3000  usartdiv = (uint32_t)(USART_DIV_SAMPLING8(LSE_VALUE, husart->Init.BaudRate, husart->Init.ClockPrescaler));
3001 #else
3002  usartdiv = (uint32_t)(USART_DIV_SAMPLING8(LSE_VALUE, husart->Init.BaudRate));
3003 #endif /* USART_PRESC_PRESCALER */
3004  break;
3005  default:
3006  ret = HAL_ERROR;
3007  break;
3008  }
3009 
3010  /* USARTDIV must be greater than or equal to 0d16 and smaller than or equal to ffff */
3011  if ((usartdiv >= USART_BRR_MIN) && (usartdiv <= USART_BRR_MAX))
3012  {
3013  brrtemp = (uint16_t)(usartdiv & 0xFFF0U);
3014  brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U);
3015  husart->Instance->BRR = brrtemp;
3016  }
3017  else
3018  {
3019  ret = HAL_ERROR;
3020  }
3021 
3022 #if defined(USART_CR1_FIFOEN)
3023  /* Initialize the number of data to process during RX/TX ISR execution */
3024  husart->NbTxDataToProcess = 1U;
3025  husart->NbRxDataToProcess = 1U;
3026 #endif /* USART_CR1_FIFOEN */
3027 
3028  /* Clear ISR function pointers */
3029  husart->RxISR = NULL;
3030  husart->TxISR = NULL;
3031 
3032  return ret;
3033 }
3034 
3040 static HAL_StatusTypeDef USART_CheckIdleState(USART_HandleTypeDef *husart)
3041 {
3042  uint32_t tickstart;
3043 
3044  /* Initialize the USART ErrorCode */
3045  husart->ErrorCode = HAL_USART_ERROR_NONE;
3046 
3047  /* Init tickstart for timeout managment*/
3048  tickstart = HAL_GetTick();
3049 
3050  /* Check if the Transmitter is enabled */
3051  if ((husart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
3052  {
3053  /* Wait until TEACK flag is set */
3054  if (USART_WaitOnFlagUntilTimeout(husart, USART_ISR_TEACK, RESET, tickstart, USART_TEACK_REACK_TIMEOUT) != HAL_OK)
3055  {
3056  /* Timeout occurred */
3057  return HAL_TIMEOUT;
3058  }
3059  }
3060  /* Check if the Receiver is enabled */
3061  if ((husart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE)
3062  {
3063  /* Wait until REACK flag is set */
3064  if (USART_WaitOnFlagUntilTimeout(husart, USART_ISR_REACK, RESET, tickstart, USART_TEACK_REACK_TIMEOUT) != HAL_OK)
3065  {
3066  /* Timeout occurred */
3067  return HAL_TIMEOUT;
3068  }
3069  }
3070 
3071  /* Initialize the USART state*/
3072  husart->State = HAL_USART_STATE_READY;
3073 
3074  /* Process Unlocked */
3075  __HAL_UNLOCK(husart);
3076 
3077  return HAL_OK;
3078 }
3079 
3091 {
3092  const HAL_USART_StateTypeDef state = husart->State;
3093 
3094  /* Check that a Tx process is ongoing */
3095  if ((state == HAL_USART_STATE_BUSY_TX) ||
3096  (state == HAL_USART_STATE_BUSY_TX_RX))
3097  {
3098  if (husart->TxXferCount == 0U)
3099  {
3100  /* Disable the USART Transmit data register empty interrupt */
3101  __HAL_USART_DISABLE_IT(husart, USART_IT_TXE);
3102 
3103  /* Enable the USART Transmit Complete Interrupt */
3104  __HAL_USART_ENABLE_IT(husart, USART_IT_TC);
3105  }
3106  else
3107  {
3108  husart->Instance->TDR = (uint8_t)(*husart->pTxBuffPtr & (uint8_t)0xFF);
3109  husart->pTxBuffPtr++;
3110  husart->TxXferCount--;
3111  }
3112  }
3113 }
3114 
3126 {
3127  const HAL_USART_StateTypeDef state = husart->State;
3128  uint16_t *tmp;
3129 
3130  if ((state == HAL_USART_STATE_BUSY_TX) ||
3131  (state == HAL_USART_STATE_BUSY_TX_RX))
3132  {
3133  if (husart->TxXferCount == 0U)
3134  {
3135  /* Disable the USART Transmit data register empty interrupt */
3136  __HAL_USART_DISABLE_IT(husart, USART_IT_TXE);
3137 
3138  /* Enable the USART Transmit Complete Interrupt */
3139  __HAL_USART_ENABLE_IT(husart, USART_IT_TC);
3140  }
3141  else
3142  {
3143  tmp = (uint16_t *) husart->pTxBuffPtr;
3144  husart->Instance->TDR = (uint16_t)(*tmp & 0x01FFU);
3145  husart->pTxBuffPtr += 2U;
3146  husart->TxXferCount--;
3147  }
3148  }
3149 }
3150 
3151 #if defined(USART_CR1_FIFOEN)
3152 
3163 {
3164  const HAL_USART_StateTypeDef state = husart->State;
3165  uint16_t nb_tx_data;
3166 
3167  /* Check that a Tx process is ongoing */
3168  if ((state == HAL_USART_STATE_BUSY_TX) ||
3169  (state == HAL_USART_STATE_BUSY_TX_RX))
3170  {
3171  for (nb_tx_data = husart->NbTxDataToProcess ; nb_tx_data > 0U ; nb_tx_data--)
3172  {
3173  if (husart->TxXferCount == 0U)
3174  {
3175  /* Disable the TX FIFO threshold interrupt */
3176  __HAL_USART_DISABLE_IT(husart, USART_IT_TXFT);
3177 
3178  /* Enable the USART Transmit Complete Interrupt */
3179  __HAL_USART_ENABLE_IT(husart, USART_IT_TC);
3180 
3181  break; /* force exit loop */
3182  }
3183  else if (__HAL_USART_GET_FLAG(husart, USART_FLAG_TXFNF) == SET)
3184  {
3185  husart->Instance->TDR = (uint8_t)(*husart->pTxBuffPtr & (uint8_t)0xFF);
3186  husart->pTxBuffPtr++;
3187  husart->TxXferCount--;
3188  }
3189  else
3190  {
3191  /* Nothing to do */
3192  }
3193  }
3194  }
3195 }
3196 
3208 {
3209  const HAL_USART_StateTypeDef state = husart->State;
3210  uint16_t *tmp;
3211  uint16_t nb_tx_data;
3212 
3213  /* Check that a Tx process is ongoing */
3214  if ((state == HAL_USART_STATE_BUSY_TX) ||
3215  (state == HAL_USART_STATE_BUSY_TX_RX))
3216  {
3217  for (nb_tx_data = husart->NbTxDataToProcess ; nb_tx_data > 0U ; nb_tx_data--)
3218  {
3219  if (husart->TxXferCount == 0U)
3220  {
3221  /* Disable the TX FIFO threshold interrupt */
3222  __HAL_USART_DISABLE_IT(husart, USART_IT_TXFT);
3223 
3224  /* Enable the USART Transmit Complete Interrupt */
3225  __HAL_USART_ENABLE_IT(husart, USART_IT_TC);
3226 
3227  break; /* force exit loop */
3228  }
3229  else if (__HAL_USART_GET_FLAG(husart, USART_FLAG_TXFNF) == SET)
3230  {
3231  tmp = (uint16_t *) husart->pTxBuffPtr;
3232  husart->Instance->TDR = (uint16_t)(*tmp & 0x01FFU);
3233  husart->pTxBuffPtr += 2U;
3234  husart->TxXferCount--;
3235  }
3236  else
3237  {
3238  /* Nothing to do */
3239  }
3240  }
3241  }
3242 }
3243 #endif /* USART_CR1_FIFOEN */
3244 
3252 {
3253  /* Disable the USART Transmit Complete Interrupt */
3254  __HAL_USART_DISABLE_IT(husart, USART_IT_TC);
3255 
3256  /* Disable the USART Error Interrupt: (Frame error, noise error, overrun error) */
3257  __HAL_USART_DISABLE_IT(husart, USART_IT_ERR);
3258 
3259  /* Clear TxISR function pointer */
3260  husart->TxISR = NULL;
3261 
3262  if (husart->State == HAL_USART_STATE_BUSY_TX)
3263  {
3264  /* Clear overrun flag and discard the received data */
3265  __HAL_USART_CLEAR_OREFLAG(husart);
3266  __HAL_USART_SEND_REQ(husart, USART_RXDATA_FLUSH_REQUEST);
3267 
3268  /* Tx process is completed, restore husart->State to Ready */
3269  husart->State = HAL_USART_STATE_READY;
3270 
3271 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
3272  /* Call registered Tx Complete Callback */
3273  husart->TxCpltCallback(husart);
3274 #else
3275  /* Call legacy weak Tx Complete Callback */
3276  HAL_USART_TxCpltCallback(husart);
3277 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */
3278  }
3279  else if (husart->RxXferCount == 0U)
3280  {
3281  /* TxRx process is completed, restore husart->State to Ready */
3282  husart->State = HAL_USART_STATE_READY;
3283 
3284 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
3285  /* Call registered Tx Rx Complete Callback */
3286  husart->TxRxCpltCallback(husart);
3287 #else
3288  /* Call legacy weak Tx Rx Complete Callback */
3290 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */
3291  }
3292  else
3293  {
3294  /* Nothing to do */
3295  }
3296 }
3297 
3298 
3309 {
3310  const HAL_USART_StateTypeDef state = husart->State;
3311  uint16_t txdatacount;
3312  uint16_t uhMask = husart->Mask;
3313 #if defined(USART_CR1_FIFOEN)
3314  uint32_t txftie;
3315 #endif /* USART_CR1_FIFOEN */
3316 
3317  if ((state == HAL_USART_STATE_BUSY_RX) ||
3318  (state == HAL_USART_STATE_BUSY_TX_RX))
3319  {
3320  *husart->pRxBuffPtr = (uint8_t)(husart->Instance->RDR & (uint8_t)uhMask);
3321  husart->pRxBuffPtr++;
3322  husart->RxXferCount--;
3323 
3324  if (husart->RxXferCount == 0U)
3325  {
3326  /* Disable the USART Parity Error Interrupt and RXNE interrupt*/
3327 #if defined(USART_CR1_FIFOEN)
3328  CLEAR_BIT(husart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
3329 #else
3330  CLEAR_BIT(husart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
3331 #endif /* USART_CR1_FIFOEN */
3332 
3333  /* Disable the USART Error Interrupt: (Frame error, noise error, overrun error) */
3334  CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
3335 
3336  /* Clear RxISR function pointer */
3337  husart->RxISR = NULL;
3338 
3339 #if defined(USART_CR1_FIFOEN)
3340  /* txftie and txdatacount are temporary variables for MISRAC2012-Rule-13.5 */
3341  txftie = READ_BIT(husart->Instance->CR3, USART_CR3_TXFTIE);
3342 #else
3343  /* txdatacount is a temporary variable for MISRAC2012-Rule-13.5 */
3344 #endif /* USART_CR1_FIFOEN */
3345  txdatacount = husart->TxXferCount;
3346 
3347  if (state == HAL_USART_STATE_BUSY_RX)
3348  {
3349 #if defined(USART_CR2_SLVEN)
3350  /* Clear SPI slave underrun flag and discard transmit data */
3351  if (husart->SlaveMode == USART_SLAVEMODE_ENABLE)
3352  {
3353  __HAL_USART_CLEAR_UDRFLAG(husart);
3354  __HAL_USART_SEND_REQ(husart, USART_TXDATA_FLUSH_REQUEST);
3355  }
3356 #endif /* USART_CR2_SLVEN */
3357 
3358  /* Rx process is completed, restore husart->State to Ready */
3359  husart->State = HAL_USART_STATE_READY;
3360 
3361 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
3362  /* Call registered Rx Complete Callback */
3363  husart->RxCpltCallback(husart);
3364 #else
3365  /* Call legacy weak Rx Complete Callback */
3366  HAL_USART_RxCpltCallback(husart);
3367 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */
3368  }
3369 #if defined(USART_CR1_FIFOEN)
3370  else if ((READ_BIT(husart->Instance->CR1, USART_CR1_TCIE) != USART_CR1_TCIE) &&
3371  (txftie != USART_CR3_TXFTIE) &&
3372  (txdatacount == 0U))
3373 #else
3374  else if ((READ_BIT(husart->Instance->CR1, USART_CR1_TCIE) != USART_CR1_TCIE) &&
3375  (txdatacount == 0U))
3376 #endif /* USART_CR1_FIFOEN */
3377  {
3378  /* TxRx process is completed, restore husart->State to Ready */
3379  husart->State = HAL_USART_STATE_READY;
3380 
3381 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
3382  /* Call registered Tx Rx Complete Callback */
3383  husart->TxRxCpltCallback(husart);
3384 #else
3385  /* Call legacy weak Tx Rx Complete Callback */
3387 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */
3388  }
3389  else
3390  {
3391  /* Nothing to do */
3392  }
3393  }
3394 #if defined(USART_CR2_SLVEN)
3395  else if ((state == HAL_USART_STATE_BUSY_RX) &&
3396  (husart->SlaveMode == USART_SLAVEMODE_DISABLE))
3397 #else
3398  else if (state == HAL_USART_STATE_BUSY_RX)
3399 #endif /* USART_CR2_SLVEN */
3400  {
3401  /* Send dummy byte in order to generate the clock for the Slave to Send the next data */
3402  husart->Instance->TDR = (USART_DUMMY_DATA & (uint16_t)0x00FF);
3403  }
3404  else
3405  {
3406  /* Nothing to do */
3407  }
3408  }
3409 }
3410 
3421 {
3422  const HAL_USART_StateTypeDef state = husart->State;
3423  uint16_t txdatacount;
3424  uint16_t *tmp;
3425  uint16_t uhMask = husart->Mask;
3426 #if defined(USART_CR1_FIFOEN)
3427  uint32_t txftie;
3428 #endif /* USART_CR1_FIFOEN */
3429 
3430  if ((state == HAL_USART_STATE_BUSY_RX) ||
3431  (state == HAL_USART_STATE_BUSY_TX_RX))
3432  {
3433  tmp = (uint16_t *) husart->pRxBuffPtr;
3434  *tmp = (uint16_t)(husart->Instance->RDR & uhMask);
3435  husart->pRxBuffPtr += 2U;
3436  husart->RxXferCount--;
3437 
3438  if (husart->RxXferCount == 0U)
3439  {
3440  /* Disable the USART Parity Error Interrupt and RXNE interrupt*/
3441 #if defined(USART_CR1_FIFOEN)
3442  CLEAR_BIT(husart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
3443 #else
3444  CLEAR_BIT(husart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
3445 #endif /* USART_CR1_FIFOEN */
3446 
3447  /* Disable the USART Error Interrupt: (Frame error, noise error, overrun error) */
3448  CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
3449 
3450  /* Clear RxISR function pointer */
3451  husart->RxISR = NULL;
3452 
3453 #if defined(USART_CR1_FIFOEN)
3454  /* txftie and txdatacount are temporary variables for MISRAC2012-Rule-13.5 */
3455  txftie = READ_BIT(husart->Instance->CR3, USART_CR3_TXFTIE);
3456 #else
3457  /* txdatacount is a temporary variable for MISRAC2012-Rule-13.5 */
3458 #endif /* USART_CR1_FIFOEN */
3459  txdatacount = husart->TxXferCount;
3460 
3461  if (state == HAL_USART_STATE_BUSY_RX)
3462  {
3463 #if defined(USART_CR2_SLVEN)
3464  /* Clear SPI slave underrun flag and discard transmit data */
3465  if (husart->SlaveMode == USART_SLAVEMODE_ENABLE)
3466  {
3467  __HAL_USART_CLEAR_UDRFLAG(husart);
3468  __HAL_USART_SEND_REQ(husart, USART_TXDATA_FLUSH_REQUEST);
3469  }
3470 #endif /* USART_CR2_SLVEN */
3471 
3472  /* Rx process is completed, restore husart->State to Ready */
3473  husart->State = HAL_USART_STATE_READY;
3474 
3475 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
3476  /* Call registered Rx Complete Callback */
3477  husart->RxCpltCallback(husart);
3478 #else
3479  /* Call legacy weak Rx Complete Callback */
3480  HAL_USART_RxCpltCallback(husart);
3481 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */
3482  }
3483 #if defined(USART_CR1_FIFOEN)
3484  else if ((READ_BIT(husart->Instance->CR1, USART_CR1_TCIE) != USART_CR1_TCIE) &&
3485  (txftie != USART_CR3_TXFTIE) &&
3486  (txdatacount == 0U))
3487 #else
3488  else if ((READ_BIT(husart->Instance->CR1, USART_CR1_TCIE) != USART_CR1_TCIE) &&
3489  (txdatacount == 0U))
3490 #endif /* USART_CR1_FIFOEN */
3491  {
3492  /* TxRx process is completed, restore husart->State to Ready */
3493  husart->State = HAL_USART_STATE_READY;
3494 
3495 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
3496  /* Call registered Tx Rx Complete Callback */
3497  husart->TxRxCpltCallback(husart);
3498 #else
3499  /* Call legacy weak Tx Rx Complete Callback */
3501 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */
3502  }
3503  else
3504  {
3505  /* Nothing to do */
3506  }
3507  }
3508 #if defined(USART_CR2_SLVEN)
3509  else if ((state == HAL_USART_STATE_BUSY_RX) &&
3510  (husart->SlaveMode == USART_SLAVEMODE_DISABLE))
3511 #else
3512  else if (state == HAL_USART_STATE_BUSY_RX)
3513 #endif /* USART_CR2_SLVEN */
3514  {
3515  /* Send dummy byte in order to generate the clock for the Slave to Send the next data */
3516  husart->Instance->TDR = (USART_DUMMY_DATA & (uint16_t)0x00FF);
3517  }
3518  else
3519  {
3520  /* Nothing to do */
3521  }
3522  }
3523 }
3524 
3525 #if defined(USART_CR1_FIFOEN)
3526 
3536 {
3537  HAL_USART_StateTypeDef state = husart->State;
3538  uint16_t txdatacount;
3539  uint16_t rxdatacount;
3540  uint16_t uhMask = husart->Mask;
3541  uint16_t nb_rx_data;
3542  uint32_t txftie;
3543 
3544  /* Check that a Rx process is ongoing */
3545  if ((state == HAL_USART_STATE_BUSY_RX) ||
3546  (state == HAL_USART_STATE_BUSY_TX_RX))
3547  {
3548  for (nb_rx_data = husart->NbRxDataToProcess ; nb_rx_data > 0U ; nb_rx_data--)
3549  {
3550  if (__HAL_USART_GET_FLAG(husart, USART_FLAG_RXFNE) == SET)
3551  {
3552  *husart->pRxBuffPtr = (uint8_t)(husart->Instance->RDR & (uint8_t)(uhMask & 0xFFU));
3553  husart->pRxBuffPtr++;
3554  husart->RxXferCount--;
3555 
3556  if (husart->RxXferCount == 0U)
3557  {
3558  /* Disable the USART Parity Error Interrupt */
3559  CLEAR_BIT(husart->Instance->CR1, USART_CR1_PEIE);
3560 
3561  /* Disable the USART Error Interrupt: (Frame error, noise error, overrun error) and RX FIFO Threshold interrupt */
3562  CLEAR_BIT(husart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
3563 
3564  /* Clear RxISR function pointer */
3565  husart->RxISR = NULL;
3566 
3567  /* txftie and txdatacount are temporary variables for MISRAC2012-Rule-13.5 */
3568  txftie = READ_BIT(husart->Instance->CR3, USART_CR3_TXFTIE);
3569  txdatacount = husart->TxXferCount;
3570 
3571  if (state == HAL_USART_STATE_BUSY_RX)
3572  {
3573 #if defined(USART_CR2_SLVEN)
3574  /* Clear SPI slave underrun flag and discard transmit data */
3575  if (husart->SlaveMode == USART_SLAVEMODE_ENABLE)
3576  {
3577  __HAL_USART_CLEAR_UDRFLAG(husart);
3578  __HAL_USART_SEND_REQ(husart, USART_TXDATA_FLUSH_REQUEST);
3579  }
3580 #endif /* USART_CR2_SLVEN */
3581 
3582  /* Rx process is completed, restore husart->State to Ready */
3583  husart->State = HAL_USART_STATE_READY;
3584  state = HAL_USART_STATE_READY;
3585 
3586 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
3587  /* Call registered Rx Complete Callback */
3588  husart->RxCpltCallback(husart);
3589 #else
3590  /* Call legacy weak Rx Complete Callback */
3591  HAL_USART_RxCpltCallback(husart);
3592 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */
3593  }
3594  else if ((READ_BIT(husart->Instance->CR1, USART_CR1_TCIE) != USART_CR1_TCIE) &&
3595  (txftie != USART_CR3_TXFTIE) &&
3596  (txdatacount == 0U))
3597  {
3598  /* TxRx process is completed, restore husart->State to Ready */
3599  husart->State = HAL_USART_STATE_READY;
3600  state = HAL_USART_STATE_READY;
3601 
3602 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
3603  /* Call registered Tx Rx Complete Callback */
3604  husart->TxRxCpltCallback(husart);
3605 #else
3606  /* Call legacy weak Tx Rx Complete Callback */
3608 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */
3609  }
3610  else
3611  {
3612  /* Nothing to do */
3613  }
3614  }
3615 #if defined(USART_CR2_SLVEN)
3616  else if ((state == HAL_USART_STATE_BUSY_RX) &&
3617  (husart->SlaveMode == USART_SLAVEMODE_DISABLE))
3618 #else
3619  else if (state == HAL_USART_STATE_BUSY_RX)
3620 #endif /* USART_CR2_SLVEN */
3621  {
3622  /* Send dummy byte in order to generate the clock for the Slave to Send the next data */
3623  husart->Instance->TDR = (USART_DUMMY_DATA & (uint16_t)0x00FF);
3624  }
3625  else
3626  {
3627  /* Nothing to do */
3628  }
3629  }
3630  }
3631 
3632  /* When remaining number of bytes to receive is less than the RX FIFO
3633  threshold, next incoming frames are processed as if FIFO mode was
3634  disabled (i.e. one interrupt per received frame).
3635  */
3636  rxdatacount = husart->RxXferCount;
3637  if (((rxdatacount != 0U)) && (rxdatacount < husart->NbRxDataToProcess))
3638  {
3639  /* Disable the USART RXFT interrupt*/
3640  CLEAR_BIT(husart->Instance->CR3, USART_CR3_RXFTIE);
3641 
3642  /* Update the RxISR function pointer */
3643  husart->RxISR = USART_RxISR_8BIT;
3644 
3645  /* Enable the USART Data Register Not Empty interrupt */
3646  SET_BIT(husart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
3647 
3648 #if defined(USART_CR2_SLVEN)
3649  if ((husart->TxXferCount == 0U) &&
3650  (state == HAL_USART_STATE_BUSY_TX_RX) &&
3651  (husart->SlaveMode == USART_SLAVEMODE_DISABLE))
3652 #else
3653  if ((husart->TxXferCount == 0U) &&
3654  (state == HAL_USART_STATE_BUSY_TX_RX))
3655 #endif /* USART_CR2_SLVEN */
3656  {
3657  /* Send dummy byte in order to generate the clock for the Slave to Send the next data */
3658  husart->Instance->TDR = (USART_DUMMY_DATA & (uint16_t)0x00FF);
3659  }
3660  }
3661  }
3662  else
3663  {
3664  /* Clear RXNE interrupt flag */
3665  __HAL_USART_SEND_REQ(husart, USART_RXDATA_FLUSH_REQUEST);
3666  }
3667 }
3668 
3679 {
3680  HAL_USART_StateTypeDef state = husart->State;
3681  uint16_t txdatacount;
3682  uint16_t rxdatacount;
3683  uint16_t *tmp;
3684  uint16_t uhMask = husart->Mask;
3685  uint16_t nb_rx_data;
3686  uint32_t txftie;
3687 
3688  /* Check that a Tx process is ongoing */
3689  if ((state == HAL_USART_STATE_BUSY_RX) ||
3690  (state == HAL_USART_STATE_BUSY_TX_RX))
3691  {
3692  for (nb_rx_data = husart->NbRxDataToProcess ; nb_rx_data > 0U ; nb_rx_data--)
3693  {
3694  if (__HAL_USART_GET_FLAG(husart, USART_FLAG_RXFNE) == SET)
3695  {
3696  tmp = (uint16_t *) husart->pRxBuffPtr;
3697  *tmp = (uint16_t)(husart->Instance->RDR & uhMask);
3698  husart->pRxBuffPtr += 2U;
3699  husart->RxXferCount--;
3700 
3701  if (husart->RxXferCount == 0U)
3702  {
3703  /* Disable the USART Parity Error Interrupt */
3704  CLEAR_BIT(husart->Instance->CR1, USART_CR1_PEIE);
3705 
3706  /* Disable the USART Error Interrupt: (Frame error, noise error, overrun error) and RX FIFO Threshold interrupt */
3707  CLEAR_BIT(husart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
3708 
3709  /* Clear RxISR function pointer */
3710  husart->RxISR = NULL;
3711 
3712  /* txftie and txdatacount are temporary variables for MISRAC2012-Rule-13.5 */
3713  txftie = READ_BIT(husart->Instance->CR3, USART_CR3_TXFTIE);
3714  txdatacount = husart->TxXferCount;
3715 
3716  if (state == HAL_USART_STATE_BUSY_RX)
3717  {
3718 #if defined(USART_CR2_SLVEN)
3719  /* Clear SPI slave underrun flag and discard transmit data */
3720  if (husart->SlaveMode == USART_SLAVEMODE_ENABLE)
3721  {
3722  __HAL_USART_CLEAR_UDRFLAG(husart);
3723  __HAL_USART_SEND_REQ(husart, USART_TXDATA_FLUSH_REQUEST);
3724  }
3725 #endif /* USART_CR2_SLVEN */
3726 
3727  /* Rx process is completed, restore husart->State to Ready */
3728  husart->State = HAL_USART_STATE_READY;
3729  state = HAL_USART_STATE_READY;
3730 
3731 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
3732  /* Call registered Rx Complete Callback */
3733  husart->RxCpltCallback(husart);
3734 #else
3735  /* Call legacy weak Rx Complete Callback */
3736  HAL_USART_RxCpltCallback(husart);
3737 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */
3738  }
3739  else if ((READ_BIT(husart->Instance->CR1, USART_CR1_TCIE) != USART_CR1_TCIE) &&
3740  (txftie != USART_CR3_TXFTIE) &&
3741  (txdatacount == 0U))
3742  {
3743  /* TxRx process is completed, restore husart->State to Ready */
3744  husart->State = HAL_USART_STATE_READY;
3745  state = HAL_USART_STATE_READY;
3746 
3747 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
3748  /* Call registered Tx Rx Complete Callback */
3749  husart->TxRxCpltCallback(husart);
3750 #else
3751  /* Call legacy weak Tx Rx Complete Callback */
3753 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */
3754  }
3755  else
3756  {
3757  /* Nothing to do */
3758  }
3759  }
3760 #if defined(USART_CR2_SLVEN)
3761  else if ((state == HAL_USART_STATE_BUSY_RX) &&
3762  (husart->SlaveMode == USART_SLAVEMODE_DISABLE))
3763 #else
3764  else if (state == HAL_USART_STATE_BUSY_RX)
3765 #endif /* USART_CR2_SLVEN */
3766  {
3767  /* Send dummy byte in order to generate the clock for the Slave to Send the next data */
3768  husart->Instance->TDR = (USART_DUMMY_DATA & (uint16_t)0x00FF);
3769  }
3770  else
3771  {
3772  /* Nothing to do */
3773  }
3774  }
3775  }
3776 
3777  /* When remaining number of bytes to receive is less than the RX FIFO
3778  threshold, next incoming frames are processed as if FIFO mode was
3779  disabled (i.e. one interrupt per received frame).
3780  */
3781  rxdatacount = husart->RxXferCount;
3782  if (((rxdatacount != 0U)) && (rxdatacount < husart->NbRxDataToProcess))
3783  {
3784  /* Disable the USART RXFT interrupt*/
3785  CLEAR_BIT(husart->Instance->CR3, USART_CR3_RXFTIE);
3786 
3787  /* Update the RxISR function pointer */
3788  husart->RxISR = USART_RxISR_16BIT;
3789 
3790  /* Enable the USART Data Register Not Empty interrupt */
3791  SET_BIT(husart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
3792 
3793 #if defined(USART_CR2_SLVEN)
3794  if ((husart->TxXferCount == 0U) &&
3795  (state == HAL_USART_STATE_BUSY_TX_RX) &&
3796  (husart->SlaveMode == USART_SLAVEMODE_DISABLE))
3797 #else
3798  if ((husart->TxXferCount == 0U) &&
3799  (state == HAL_USART_STATE_BUSY_TX_RX))
3800 #endif /* USART_CR2_SLVEN */
3801  {
3802  /* Send dummy byte in order to generate the clock for the Slave to Send the next data */
3803  husart->Instance->TDR = (USART_DUMMY_DATA & (uint16_t)0x00FF);
3804  }
3805  }
3806  }
3807  else
3808  {
3809  /* Clear RXNE interrupt flag */
3810  __HAL_USART_SEND_REQ(husart, USART_RXDATA_FLUSH_REQUEST);
3811  }
3812 }
3813 #endif /* USART_CR1_FIFOEN */
3814 
3819 #endif /* HAL_USART_MODULE_ENABLED */
3820 
3828 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
static void USART_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
DMA USART receive process half complete callback.
HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size, uint32_t Timeout)
Receive an amount of data in blocking mode.
__IO HAL_USART_StateTypeDef State
register uint32_t brrtemp
void(* XferAbortCallback)(struct __DMA_HandleTypeDef *hdma)
void HAL_USART_IRQHandler(USART_HandleTypeDef *husart)
Handle USART interrupt request.
USART_ClockSourceTypeDef
USART clock sources definitions.
static void USART_RxISR_16BIT_FIFOEN(USART_HandleTypeDef *husart)
Simplex receive an amount of data in non-blocking mode.
void(* MspDeInitCallback)(struct __USART_HandleTypeDef *husart)
static void USART_TxISR_16BIT(USART_HandleTypeDef *husart)
Simplex send an amount of data in non-blocking mode.
static void USART_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
DMA USART receive process complete callback.
DMA handle Structure definition.
HAL_USART_CallbackIDTypeDef
HAL USART Callback ID enumeration definition.
static void USART_RxISR_16BIT(USART_HandleTypeDef *husart)
Simplex receive an amount of data in non-blocking mode.
void(* XferCpltCallback)(struct __DMA_HandleTypeDef *hdma)
void(* TxFifoEmptyCallback)(struct __USART_HandleTypeDef *husart)
HAL_USART_StateTypeDef HAL_USART_GetState(USART_HandleTypeDef *husart)
Return the USART handle state.
This file contains all the functions prototypes for the HAL module driver.
void USART_InitCallbacksToDefault(USART_HandleTypeDef *husart)
Initialize the callbacks to their default values.
void HAL_USART_MspInit(USART_HandleTypeDef *husart)
Initialize the USART MSP.
void(* TxHalfCpltCallback)(struct __USART_HandleTypeDef *husart)
void HAL_USART_TxHalfCpltCallback(USART_HandleTypeDef *husart)
Tx Half Transfer completed callback.
HAL_StatusTypeDef HAL_USART_Abort_IT(USART_HandleTypeDef *husart)
Abort ongoing transfers (Interrupt mode).
HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart)
Initialize the USART mode according to the specified parameters in the USART_InitTypeDef and initiali...
void HAL_USARTEx_TxFifoEmptyCallback(USART_HandleTypeDef *husart)
USART TX Fifo empty callback.
HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart)
Stop the DMA Transfer.
HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size)
Send an amount of data in DMA mode.
uint32_t HAL_GetTick(void)
Provide a tick value in millisecond.
DMA_Channel_TypeDef * Instance
void(* XferErrorCallback)(struct __DMA_HandleTypeDef *hdma)
HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size)
Receive an amount of data in interrupt mode.
HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
Aborts the DMA Transfer in Interrupt mode.
static void USART_RxISR_8BIT_FIFOEN(USART_HandleTypeDef *husart)
Simplex receive an amount of data in non-blocking mode.
__HAL_UNLOCK(hrtc)
HAL_StatusTypeDef HAL_USART_Abort(USART_HandleTypeDef *husart)
Abort ongoing transfers (blocking mode).
void(* XferHalfCpltCallback)(struct __DMA_HandleTypeDef *hdma)
uint32_t HAL_USART_GetError(USART_HandleTypeDef *husart)
Return the USART error code.
static void USART_TxISR_8BIT_FIFOEN(USART_HandleTypeDef *husart)
Simplex send an amount of data in non-blocking mode.
uint32_t HAL_RCC_GetPCLK2Freq(void)
Return the PCLK2 frequency.
HAL_USART_StateTypeDef
HAL USART State structures definition.
void(* TxISR)(struct __USART_HandleTypeDef *husart)
static void USART_DMATransmitCplt(DMA_HandleTypeDef *hdma)
DMA USART transmit process complete callback.
static void USART_DMAAbortOnError(DMA_HandleTypeDef *hdma)
DMA USART communication abort callback, when initiated by HAL services on Error (To be called at end ...
HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
Start the DMA Transfer with interrupt enabled.
HAL_StatusTypeDef HAL_USART_UnRegisterCallback(USART_HandleTypeDef *husart, HAL_USART_CallbackIDTypeDef CallbackID)
Unregister an UART Callback UART callaback is redirected to the weak predefined callback.
void HAL_USART_RxCpltCallback(USART_HandleTypeDef *husart)
Rx Transfer completed callback.
CLEAR_BIT(hrtc->Instance->CR, RTC_CR_WUTE)
static HAL_StatusTypeDef USART_SetConfig(USART_HandleTypeDef *husart)
Configure the USART peripheral.
void HAL_USART_TxCpltCallback(USART_HandleTypeDef *husart)
Tx Transfer completed callback.
__HAL_LOCK(hrtc)
static void USART_TxISR_8BIT(USART_HandleTypeDef *husart)
Simplex send an amount of data in non-blocking mode.
static void USART_DMATxAbortCallback(DMA_HandleTypeDef *hdma)
DMA USART Tx communication abort callback, when initiated by user (To be called at end of DMA Tx Abor...
HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout)
Full-Duplex Send and Receive an amount of data in blocking mode.
static void USART_RxISR_8BIT(USART_HandleTypeDef *husart)
Simplex receive an amount of data in non-blocking mode.
void(* ErrorCallback)(struct __USART_HandleTypeDef *husart)
return HAL_OK
void(* RxHalfCpltCallback)(struct __USART_HandleTypeDef *husart)
void(* pUSART_CallbackTypeDef)(USART_HandleTypeDef *husart)
HAL USART Callback pointer definition.
HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart)
DeInitialize the USART peripheral.
static void USART_TxISR_16BIT_FIFOEN(USART_HandleTypeDef *husart)
Simplex send an amount of data in non-blocking mode.
HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size)
Receive an amount of data in DMA mode.
static void USART_DMAError(DMA_HandleTypeDef *hdma)
DMA USART communication error callback.
HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
Abort the DMA Transfer.
HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
Full-Duplex Transmit Receive an amount of data in non-blocking mode.
static void USART_EndTransfer(USART_HandleTypeDef *husart)
End ongoing transfer on USART peripheral (following error detection or Transfer completion).
static HAL_StatusTypeDef USART_CheckIdleState(USART_HandleTypeDef *husart)
Check the USART Idle State.
DMA_HandleTypeDef * hdmatx
USART handle Structure definition.
void HAL_USART_RxHalfCpltCallback(USART_HandleTypeDef *husart)
Rx Half Transfer completed callback.
HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *husart)
Resume the DMA Transfer.
void(* RxCpltCallback)(struct __USART_HandleTypeDef *husart)
HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size, uint32_t Timeout)
Simplex send an amount of data in blocking mode.
void(* MspInitCallback)(struct __USART_HandleTypeDef *husart)
void(* RxISR)(struct __USART_HandleTypeDef *husart)
HAL_StatusTypeDef HAL_USART_DMAPause(USART_HandleTypeDef *husart)
Pause the DMA Transfer.
void(* RxFifoFullCallback)(struct __USART_HandleTypeDef *husart)
HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
Full-Duplex Send and Receive an amount of data in interrupt mode.
void HAL_USART_AbortCpltCallback(USART_HandleTypeDef *husart)
USART Abort Complete callback.
uint32_t HAL_RCC_GetSysClockFreq(void)
Return the SYSCLK frequency.
void HAL_USART_ErrorCallback(USART_HandleTypeDef *husart)
USART error callback.
void HAL_USART_TxRxCpltCallback(USART_HandleTypeDef *husart)
Tx/Rx Transfers completed callback for the non-blocking process.
MODIFY_REG(hrtc->Instance->CR, RTC_CR_WUCKSEL,(uint32_t) WakeUpClock)
static void USART_EndTransmit_IT(USART_HandleTypeDef *husart)
Wraps up transmission in non-blocking mode.
DMA_HandleTypeDef * hdmarx
void(* TxRxCpltCallback)(struct __USART_HandleTypeDef *husart)
void(* AbortCpltCallback)(struct __USART_HandleTypeDef *husart)
static HAL_StatusTypeDef USART_WaitOnFlagUntilTimeout(USART_HandleTypeDef *husart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)
Handle USART Communication Timeout.
static void USART_DMARxAbortCallback(DMA_HandleTypeDef *hdma)
DMA USART Rx communication abort callback, when initiated by user (To be called at end of DMA Rx Abor...
HAL_StatusTypeDef HAL_USART_RegisterCallback(USART_HandleTypeDef *husart, HAL_USART_CallbackIDTypeDef CallbackID, pUSART_CallbackTypeDef pCallback)
Register a User USART Callback To be used instead of the weak predefined callback.
static void USART_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
DMA USART transmit process half complete callback.
uint32_t HAL_RCC_GetPCLK1Freq(void)
Return the PCLK1 frequency.
void HAL_USARTEx_RxFifoFullCallback(USART_HandleTypeDef *husart)
USART RX Fifo full callback.
HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size)
Send an amount of data in interrupt mode.
assert_param(IS_RTC_WAKEUP_CLOCK(WakeUpClock))
void(* TxCpltCallback)(struct __USART_HandleTypeDef *husart)
uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma)
Return the DMA error code.
void HAL_USART_MspDeInit(USART_HandleTypeDef *husart)
DeInitialize the USART MSP.